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263 lines
9.0 KiB
C
263 lines
9.0 KiB
C
/*
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* @brief LPC540XX SPI driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __SPI_540XX_H_
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#define __SPI_540XX_H_
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#include "spi_common_5410x.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup SPI_LEGACY 540XX CHIP: LPC540XX SPI legacy driver
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* @ingroup SPI_COMMON_540XX
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* @{
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*/
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typedef enum {
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SLAVE0 = ((~(1 << 0)) & 0xf),
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SLAVE1 = ((~(1 << 1)) & 0xf),
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SLAVE2 = ((~(1 << 2)) & 0xf),
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SLAVE3 = ((~(1 << 3)) & 0xf)
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} SLAVE_T;
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#define SPI_TXDATCTL_SSELN(s) ((s) << 16)
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/** @brief SPI Mode*/
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typedef enum {
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SPI_MODE_MASTER = SPI_CFG_MASTER_EN, /* Master Mode */
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SPI_MODE_SLAVE = SPI_CFG_SLAVE_EN, /* Slave Mode */
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} SPI_MODE_T;
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/** @brief SPI Data Order Mode*/
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typedef enum IP_SPI_DATA_ORDER {
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SPI_DATA_MSB_FIRST = SPI_CFG_MSB_FIRST_EN, /* Standard Order */
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SPI_DATA_LSB_FIRST = SPI_CFG_LSB_FIRST_EN, /* Reverse Order */
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} SPI_DATA_ORDER_T;
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/** @brief SPI SSEL Polarity definition*/
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typedef enum IP_SPI_SSEL_POL {
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SPI_SSEL_ACTIVE_LO = SPI_CFG_SPOL_LO, /* SSEL is active Low*/
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SPI_SSEL_ACTIVE_HI = SPI_CFG_SPOL_HI, /* SSEL is active High */
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} SPI_SSEL_POL_T;
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/**
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* @brief SPI Configure Struct
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*/
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typedef struct {
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SPI_MODE_T Mode; /* Mode Select */
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SPI_CLOCK_MODE_T ClockMode; /* CPHA CPOL Select */
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SPI_DATA_ORDER_T DataOrder; /* MSB/LSB First */
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SPI_SSEL_POL_T SSELPol; /* SSEL Polarity Select */
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uint16_t ClkDiv; /* SPI Clock Divider Value */
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} SPI_MODECONFIG_T;
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/**
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* @brief SPI data setup structure
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*/
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typedef struct {
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uint16_t *pTx; /**< Pointer to data buffer*/
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uint32_t TxCnt;/* Transmit Counter */
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uint16_t *pRx; /**< Pointer to data buffer*/
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uint32_t RxCnt;/* Transmit Counter */
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uint32_t Length; /**< Data Length*/
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uint16_t DataSize; /** < The size of a frame (1-16)*/
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uint32_t completion_flag;
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} SPI_DATA_SETUP_T;
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/**
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* @brief Initialize the SPI
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* @param pSPI : The base SPI peripheral on the chip
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* @param pConfig : SPI Configuration
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* @return Nothing
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*/
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void Chip_SPI_IF_Init(LPC_SPI_T *pSPI, SPI_MODECONFIG_T *pConfig);
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/**
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* @brief Calculate the divider for SPI clock
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* @param pSPI : The base of SPI peripheral on the chip
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* @param bitRate : Expected clock rate
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* @return Divider value
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*/
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uint32_t Chip_SPI_CalClkRateDivider(LPC_SPI_T *pSPI, uint32_t bitRate);
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/**
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* @brief Enable/Disable SPI interrupt
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* @param pSPI : The base SPI peripheral on the chip
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* @param IntMask : Interrupt mask
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* @param NewState : ENABLE or DISABLE interrupt
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* @return Nothing
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*/
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void Chip_SPI_Int_Cmd(LPC_SPI_T *pSPI, uint32_t IntMask, FunctionalState NewState);
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/**
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* @brief Set control information including SSEL, EOT, EOF RXIGNORE and FLEN
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* @param pSPI : The base of SPI peripheral on the chip
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* @param Flen : Data size (1-16)
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* @param Flag : Flag control (Or-ed values of SPI_TXCTL_*)
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* @note The control information has no effect unless data is later written to TXDAT
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* @return Nothing
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*/
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STATIC INLINE void Chip_SPI_SetControlInfo(LPC_SPI_T *pSPI, uint8_t Flen, uint32_t Flag)
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{
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pSPI->TXCTRL = Flag | SPI_TXDATCTL_FLEN(Flen - 1);
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}
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/**
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* @brief Send the first Frame of a transfer (Rx Ignore)
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* @param pSPI : The base of SPI peripheral on the chip
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* @param Data : Transmit data
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* @param DataSize : Data Size (1-16)
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* @return Nothing
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*/
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STATIC INLINE void Chip_SPI_SendFirstFrame_RxIgnore(LPC_SPI_T *pSPI, uint16_t Data, uint8_t DataSize)
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{
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pSPI->TXDATCTL = SPI_TXDATCTL_ASSERT_SSEL | SPI_TXDATCTL_EOF | SPI_TXDATCTL_RXIGNORE | SPI_TXDATCTL_FLEN(
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DataSize - 1) | SPI_TXDATCTL_DATA(Data);
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}
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/**
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* @brief Send the first Frame of a transfer
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* @param pSPI : The base of SPI peripheral on the chip
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* @param Data : Transmit data
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* @param DataSize : Data Size (1-16)
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* @return Nothing
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*/
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STATIC INLINE void Chip_SPI_SendFirstFrame(LPC_SPI_T *pSPI, uint16_t Data, uint8_t DataSize)
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{
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pSPI->TXDATCTL = SPI_TXDATCTL_ASSERT_SSEL | SPI_TXDATCTL_EOF | SPI_TXDATCTL_FLEN(DataSize - 1) | SPI_TXDATCTL_DATA(
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Data);
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}
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/**
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* @brief Send the middle Frame of a transfer
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* @param pSPI : The base of SPI peripheral on the chip
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* @param Data : Transmit data
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* @return Nothing
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*/
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STATIC INLINE void Chip_SPI_SendMidFrame(LPC_SPI_T *pSPI, uint16_t Data)
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{
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pSPI->TXDAT = SPI_TXDAT_DATA(Data);
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}
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/**
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* @brief Send the last Frame of a transfer (Rx Ignore)
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* @param pSPI : The base of SPI peripheral on the chip
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* @param Data : Transmit data
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* @param DataSize : Data Size (1-16)
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* @return Nothing
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*/
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STATIC INLINE void Chip_SPI_SendLastFrame_RxIgnore(LPC_SPI_T *pSPI, uint16_t Data, uint8_t DataSize)
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{
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pSPI->TXDATCTL = SPI_TXDATCTL_ASSERT_SSEL | SPI_TXDATCTL_EOF | SPI_TXDATCTL_EOT | SPI_TXDATCTL_RXIGNORE |
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SPI_TXDATCTL_FLEN(DataSize - 1) | SPI_TXDATCTL_DATA(Data);
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}
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/**
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* @brief Send the last Frame of a transfer
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* @param pSPI : The base of SPI peripheral on the chip
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* @param Data : Transmit data
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* @param DataSize : Data Size (1-16)
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* @return Nothing
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*/
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STATIC INLINE void Chip_SPI_SendLastFrame(LPC_SPI_T *pSPI, uint16_t Data, uint8_t DataSize)
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{
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pSPI->TXDATCTL = SPI_TXDATCTL_ASSERT_SSEL | SPI_TXDATCTL_EOF | SPI_TXDATCTL_EOT |
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SPI_TXDATCTL_FLEN(DataSize - 1) | SPI_TXDATCTL_DATA(Data);
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}
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/**
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* @brief Read data received
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* @param pSPI : The base of SPI peripheral on the chip
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* @return Receive data
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*/
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STATIC INLINE uint16_t Chip_SPI_ReceiveFrame(LPC_SPI_T *pSPI)
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{
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return SPI_RXDAT_DATA(pSPI->RXDAT);
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}
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/**
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* @brief SPI Interrupt Read/Write
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* @param pSPI : The base SPI peripheral on the chip
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* @param xf_setup : Pointer to a SPI_DATA_SETUP_T structure that contains specified
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* information about transmit/receive data configuration
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* @return SUCCESS or ERROR
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*/
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Status Chip_SPI_Int_RWFrames(LPC_SPI_T *pSPI, SPI_DATA_SETUP_T *xf_setup);
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/**
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* @brief SPI Polling Read/Write in blocking mode
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* @param pSPI : The base SPI peripheral on the chip
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* @param pXfSetup : Pointer to a SPI_DATA_SETUP_T structure that contains specified
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* information about transmit/receive data configuration
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* @return Actual data length has been transferred
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* @note
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* This function can be used in both master and slave mode. It starts with writing phase and after that,
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* a reading phase is generated to read any data available in RX_FIFO. All needed information is prepared
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* through xf_setup param.
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*/
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uint32_t Chip_SPI_RWFrames_Blocking(LPC_SPI_T *pSPI, SPI_DATA_SETUP_T *pXfSetup);
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/**
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* @brief SPI Polling Write in blocking mode
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* @param pSPI : The base SPI peripheral on the chip
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* @param pXfSetup :Pointer to a SPI_DATA_SETUP_T structure that contains specified
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* information about transmit/receive data configuration
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* @return Actual data length has been transferred
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* @note
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* This function can be used in both master and slave mode. First, a writing operation will send
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* the needed data. After that, a dummy reading operation is generated to clear data buffer
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*/
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uint32_t Chip_SPI_WriteFrames_Blocking(LPC_SPI_T *pSPI, SPI_DATA_SETUP_T *pXfSetup);
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/**
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* @brief SPI Polling Read in blocking mode
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* @param pSPI : The base SPI peripheral on the chip
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* @param pXfSetup :Pointer to a SPI_DATA_SETUP_T structure that contains specified
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* information about transmit/receive data configuration
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* @return Actual data length has been read
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* @note
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* This function can be used in both master and slave mode. First, a writing operation will send
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* the needed data. After that, a dummy reading operation is generated to clear data buffer
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*/
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uint32_t Chip_SPI_ReadFrames_Blocking(LPC_SPI_T *pSPI, SPI_DATA_SETUP_T *pXfSetup);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __SPI_540XX_H_ */
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