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70 lines
1.6 KiB
C
70 lines
1.6 KiB
C
/*
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* Copyright (C) 2008-2013 Marvell International Ltd.
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* All Rights Reserved.
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*/
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#ifndef _BOOT2_H_
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#define _BOOT2_H_
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#include <stdint.h>
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/* Nvram address word to store debugging information */
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#define NVRAM_ADDR 0x480C0020
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#define SB_ERR_ADDR 0x480C0028
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/* Boot2 progress status */
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#define SYS_INIT (1<<0)
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#define FLASH_INIT (1<<1)
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#define PRIMARY_FIRMWARE (1<<2)
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/* Boot2 error status */
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#define BAD_PART_TABLE_CRC (1<<16)
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#define BAD_PART_ENTRY_CRC (1<<17)
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#define BAD_FIRMWARE_CRC (1<<18)
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#define BAD_PART_TABLE_MAGIC (1<<19)
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#define BAD_FIRMWARE_SIG (1<<20)
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#define BAD_FIRMWARE_IMG (1<<21)
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#define BAD_FLASH_JEDECID (1<<22)
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#define CANNOT_CONFIG_JEDECID (1<<23)
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/* Boot2 success or failure status */
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#define BOOT_SUCCESS (0x80000000)
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#define BOOT_FAILED (0x00800000)
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extern unsigned long _bss;
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extern unsigned long _ebss;
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extern unsigned long _estack;
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#ifdef UART_DEBUG
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#define dbg(_fmt_, ...) \
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uart_dbg("[boot2] "_fmt_, ## __VA_ARGS__)
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void uart_dbg(const char *format, ...);
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void uart_cleanup(void);
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#elif SEMIHOST_DEBUG
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#define dbg printf
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#else
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#define dbg(...)
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#endif
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extern unsigned long *nvram_addr;
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extern unsigned long *sb_e;
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static inline void writel(uint32_t data, void *addr)
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{
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*((volatile uint32_t *)addr) = data;
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}
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static inline uint32_t readel(void *addr)
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{
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return *((volatile uint32_t *)addr);
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}
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int boot2_main( uint8_t will_load_firmware );
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extern unsigned long _heap_end, _heap_start, _keystore_start;
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void *ROM_pvPortMalloc(size_t xWantedSize);
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void ROM_vPortFree(void *pv);
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void *ROM_pvPortReAlloc(void *pv, size_t xWantedSize);
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void ROM_prvHeapInit(unsigned char *startAddress, unsigned char *endAddress);
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#endif
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