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389 lines
11 KiB
C
389 lines
11 KiB
C
/**
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******************************************************************************
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* @file stm32f2xx_platform.c
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* @author William Xu
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* @version V1.0.0
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* @date 05-May-2014
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* @brief This file provide functions called by MICO to drive stm32f2xx
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* platform: - e.g. power save, reboot, platform initialize
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******************************************************************************
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* UNPUBLISHED PROPRIETARY SOURCE CODE
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* Copyright (c) 2016 MXCHIP Inc.
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*
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* The contents of this file may not be disclosed to third parties, copied or
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* duplicated in any form, in whole or in part, without the prior written
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* permission of MXCHIP Corporation.
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******************************************************************************
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*/
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#include "platform_peripheral.h"
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#include "platform.h"
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#include "platform_config.h"
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#include "mico_platform.h"
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#include "mico_rtos.h"
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#include "platform_logging.h"
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#include <string.h> // For memcmp
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#include "crt0.h"
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#include "platform_init.h"
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#ifdef __GNUC__
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#include "../../GCC/stdio_newlib.h"
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#endif /* ifdef __GNUC__ */
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/******************************************************
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* Macros
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******************************************************/
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/******************************************************
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* Constants
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******************************************************/
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#ifndef STDIO_BUFFER_SIZE
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#define STDIO_BUFFER_SIZE 64
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#endif
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/******************************************************
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* Enumerations
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******************************************************/
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/******************************************************
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* Type Definitions
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******************************************************/
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/******************************************************
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* Structures
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******************************************************/
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/******************************************************
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* Function Declarations
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******************************************************/
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extern OSStatus host_platform_init( void );
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/******************************************************
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* Variables Definitions
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******************************************************/
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extern platform_uart_t platform_uart_peripherals[];
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extern platform_uart_driver_t platform_uart_drivers[];
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// rocky: add global definitions of peripheral for watch window
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USED LPC_SYSCON_T * g_pSys = LPC_SYSCON;
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USED LPC_ASYNC_SYSCON_T *g_pASys = LPC_ASYNC_SYSCON;
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USED LPC_IOCON_T *g_pIO = LPC_IOCON;
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USED LPC_GPIO_T *g_pGP = LPC_GPIO;
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USED LPC_INMUX_T *g_pInMux = LPC_INMUX;
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USED LPC_DMA_T *g_pDMA = LPC_DMA;
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USED LPC_SPI_T *g_pSPI0 = LPC_SPI0;
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USED LPC_SPI_T *g_pSPI1 = LPC_SPI1;
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USED LPC_PMU_T *g_pPMU = LPC_PMU;
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USED LPC_FIFO_T *g_pFIFO = LPC_FIFO;
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USED NVIC_Type *g_pNVIC = NVIC;
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USED SCB_Type *g_pSCB = SCB;
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USED SysTick_Type *g_pSysTick = SysTick;
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/* mico_cpu_clock_hz is used by MICO RTOS */
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//volatile uint32_t mico_cpu_clock_hz;
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#ifndef MICO_DISABLE_STDIO
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static const mico_uart_config_t stdio_uart_config =
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{
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.baud_rate = STDIO_UART_BAUDRATE,
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.data_width = DATA_WIDTH_8BIT,
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.parity = NO_PARITY,
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.stop_bits = STOP_BITS_1,
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.flow_control = FLOW_CONTROL_DISABLED,
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.flags = 0,
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};
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static volatile ring_buffer_t stdio_rx_buffer;
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static volatile uint8_t stdio_rx_data[STDIO_BUFFER_SIZE];
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mico_mutex_t stdio_rx_mutex;
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mico_mutex_t stdio_tx_mutex;
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#endif /* #ifndef MICO_DISABLE_STDIO */
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/******************************************************
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* Function Definitions
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******************************************************/
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#if defined ( __ICCARM__ )
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static inline void __jump_to( uint32_t addr )
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{
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__asm( "MOV R1, #0x00000001" );
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__asm( "ORR R0, R0, R1" ); /* Last bit of jump address indicates whether destination is Thumb or ARM code */
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__asm( "BLX R0" );
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}
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#elif defined ( __GNUC__ )
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__attribute__( ( always_inline ) ) static __INLINE void __jump_to( uint32_t addr )
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{
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addr |= 0x00000001; /* Last bit of jump address indicates whether destination is Thumb or ARM code */
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__ASM volatile ("BX %0" : : "r" (addr) );
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}
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#elif defined ( __CC_ARM )
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static void __asm __jump_to( uint32_t addr )
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{
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MOV R1, #0x00000001
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ORR R0, R0, R1 /* Last bit of jump address indicates whether destination is Thumb or ARM code */
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BLX R0
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}
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#endif
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/*Boot to mico application form APPLICATION_START_ADDRESS defined in platform_common_config.h */
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void startApplication( uint32_t app_addr )
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{
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uint32_t* stack_ptr;
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uint32_t* start_ptr;
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//if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) != 0x20000000)
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//app_addr += 0x200;
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/* Test if user code is programmed starting from address "ApplicationAddress" */
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// if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) == 0x20000000)
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{
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SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
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/* Clear all interrupt enabled by bootloader */
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for (int i = 0; i < 8; i++ )
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NVIC->ICER[i] = 0xFFFFFFFF;
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stack_ptr = (uint32_t*) app_addr; /* Initial stack pointer is first 4 bytes of vector table */
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start_ptr = ( stack_ptr + 1 ); /* Reset vector is second 4 bytes of vector table */
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#if defined ( __ICCARM__)
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__ASM( "MOV LR, #0xFFFFFFFF" );
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__ASM( "MOV R1, #0x01000000" );
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__ASM( "MSR APSR_nzcvq, R1" );
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__ASM( "MOV R1, #0x00000000" );
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__ASM( "MSR PRIMASK, R1" );
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__ASM( "MSR FAULTMASK, R1" );
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__ASM( "MSR BASEPRI, R1" );
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__ASM( "MSR CONTROL, R1" );
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#endif
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__set_MSP( *stack_ptr );
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__jump_to( *start_ptr );
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}
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}
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void platform_mcu_reset( void )
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{
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NVIC_SystemReset();
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}
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#include "power_control.h"
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void DMAInit(void)
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{
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static uint8_t ls_isDMAInited;
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if (ls_isDMAInited == 0)
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{
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ls_isDMAInited = 1;
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// enable clock for DMA
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g_pSys->AHBCLKCTRLSET[0] = 1UL << 20;
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// make DMA has highest bus matrix priority
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g_pSys->AHBMATPRIO |= 3UL<<8;
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// reset, and clear reset of DMA
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g_pSys->PRESETCTRLSET[0] = 1UL << 20;
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g_pSys->PRESETCTRLCLR[0] = 1UL << 20;
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g_pDMA->CTRL = 1; // enable DMA controller
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g_pDMA->SRAMBASE = (uint32_t)(Chip_DMA_Table); // set desc table addr
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NVIC_EnableIRQ(DMA_IRQn);
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}
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}
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void AsyncClockCfg(void)
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{
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// make sure SystemCoreClock is multiples of 12MHz
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if (SystemCoreClock % (48 * 1000 * 1000) == 0
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)
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{
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// configure 48MHz
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g_pASys->ASYNCCLKDIV = SystemCoreClock / 48000000;
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}
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else if (SystemCoreClock % (24 * 1000 * 1000) == 0)
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{
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// configure 24MHz
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g_pASys->ASYNCCLKDIV = SystemCoreClock / 24000000;
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}
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else if (SystemCoreClock % (12 * 1000 * 1000) == 0)
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{
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// make ASync clock at 12MHz
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g_pASys->ASYNCCLKDIV = SystemCoreClock / 12000000;
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}
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else
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while(1);
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// make USART clock = AsyncClk * 22 / 256, so it is multiples of 11.0592MHz
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g_pASys->FRGCTRL = 255 | 22<<8;
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}
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/* MCU common clock initialisation function
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* This brings up enough clocks to allow the processor to run quickly while initialising memory.
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* Other platform specific clock init can be done in init_platform() or init_architecture()
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*/
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extern void PwrCtlStateReset(void);
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void init_clocks( void )
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{
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// >>> rocky: make sure linker does not remove
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g_pSys = g_pSys;
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g_pASys = g_pASys;
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g_pIO = g_pIO;
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g_pGP = g_pGP ;
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g_pInMux = g_pInMux;
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g_pDMA = g_pDMA;
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g_pSPI0 = g_pSPI0;
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g_pSPI1 = g_pSPI1;
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g_pPMU = g_pPMU;
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// <<<
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g_pSys = LPC_SYSCON;
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g_pSys->PDRUNCFGCLR = 0x0FUL<<13; // Turn on power for all SRAM blocks
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g_pSys->AHBCLKCTRL[0] |= 0x18; // Turn on clock for all SRAM blocks
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g_pSys->AHBMATPRIO = 2UL<<0 | 3UL<<2; // set ICode and DCode bus priority high
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// extern void *__Vectors;
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// SCB->VTOR = (uint32_t) &__Vectors;
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fpuInit();
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PwrCtlStateReset();
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// SystemCoreClockUpdate();
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#if (defined FIRMWARE_DOWNLOAD) || (defined BOOTLOADER)
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//#ifdef FIRMWARE_DOWNLOAD
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//#if 0
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// enable clock to InMux, PinINT, IOCON, GPIO0 & 1
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g_pSys->AHBCLKCTRLSET[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
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// reset InMux, PinINT, IOCON, GPIO0 & 1
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g_pSys->PRESETCTRLSET[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
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g_pSys->PRESETCTRLCLR[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
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/* Turn on the IRC by clearing the power down bit */
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Chip_SYSCON_PowerUp(SYSCON_PDRUNCFG_PD_IRC_OSC | SYSCON_PDRUNCFG_PD_IRC);
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/* Set main clock source to the system PLL. This will drive 24MHz
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for the main clock and 24MHz for the system clock */
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Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_IRC);
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/* Set system clock divider to 1 */
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Chip_Clock_SetSysClockDiv(1);
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Chip_SYSCON_Enable_ASYNC_Syscon(true);
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g_pASys->ASYNCAPBCLKCTRL = 1; // enable Async APB
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// select main clock (CPU clock) as ASync clock for faster SPI
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g_pASys->ASYNCAPBCLKSELA = 0;
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g_pASys->ASYNCAPBCLKSELB = 0;
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Chip_Clock_SetAsyncSysconClockSource(SYSCON_ASYNC_MAINCLK);
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/* Setup FLASH access to 1 clock */
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Chip_FMC_SetFLASHAccess(FLASHTIM_20MHZ_CPU);
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// set frequency for mico task
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TaskProcNotify(MICO_TASK, 1);
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AsyncClockCfg();
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#endif
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#ifdef NO_MICO_RTOS
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SysTick_Config( SystemCoreClock / 1000 );
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#endif
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//mico_cpu_clock_hz = SystemCoreClock;
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g_pSys->AHBCLKCTRL[0] |= 0x18; // Opened SRAM1 and SRAM2
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}
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WEAK void init_memory( void )
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{
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}
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// RockyS : set up timer interrupt
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// extern uint32_t CFG_PRIO_BITS;
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void init_architecture( void )
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{
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init_clocks();
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DMAInit();
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platform_init_peripheral_irq_priorities();
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g_pSys->FIFOCTRL =0;
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/* Initialise GPIO IRQ manager */
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platform_gpio_irq_manager_init();
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#ifndef MICO_DISABLE_STDIO
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#ifndef NO_MICO_RTOS
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mico_rtos_init_mutex( &stdio_tx_mutex );
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mico_rtos_unlock_mutex ( &stdio_tx_mutex );
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mico_rtos_init_mutex( &stdio_rx_mutex );
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mico_rtos_unlock_mutex ( &stdio_rx_mutex );
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#endif
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ring_buffer_init ( (ring_buffer_t*)&stdio_rx_buffer, (uint8_t*)stdio_rx_data, STDIO_BUFFER_SIZE );
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platform_uart_init( &platform_uart_drivers[STDIO_UART], &platform_uart_peripherals[STDIO_UART], &stdio_uart_config, (ring_buffer_t*)&stdio_rx_buffer );
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#endif
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/* Ensure 802.11 device is in reset. */
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host_platform_init( );
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/* Initialise nanosecond clock counter */
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platform_init_nanosecond_clock();
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#ifdef BOOTLOADER
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return;
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#else
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/* Initialise RTC */
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platform_rtc_init( );
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#ifndef MICO_DISABLE_MCU_POWERSAVE
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/* Initialise MCU powersave */
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platform_mcu_powersave_init( );
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#endif /* ifndef MICO_DISABLE_MCU_POWERSAVE */
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platform_mcu_powersave_disable( );
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#endif
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}
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OSStatus stdio_hardfault( char* data, uint32_t size )
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{
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#ifndef MICO_DISABLE_STDIO
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uint32_t idx;
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for(idx = 0; idx < size; idx++){
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// Magicoe TODO delete
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// while ( ( platform_uart_peripherals[ STDIO_UART ].port->SR & USART_SR_TXE ) == 0 );
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// platform_uart_peripherals[ STDIO_UART ].port->DR = (data[idx] & (uint16_t)0x01FF);
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while ((Chip_UART_GetStatus(platform_uart_peripherals[STDIO_UART].port) & UART_STAT_TXRDY) == 0);
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Chip_UART_SendByte(platform_uart_peripherals[STDIO_UART].port, (data[idx] & (uint16_t)0x00FF) );
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}
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#endif
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return kNoErr;
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}
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/******************************************************
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* NO-OS Functions
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******************************************************/
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#ifdef NO_MICO_RTOS
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static volatile uint32_t no_os_tick = 0;
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void SysTick_Handler(void)
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{
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no_os_tick ++;
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platform_watchdog_kick( );
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}
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uint32_t mico_get_time_no_os(void)
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{
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return no_os_tick;
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}
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#endif
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// end file --- MG.Niu ---
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