mirror of
https://github.com/oopuuu/zTC1.git
synced 2025-12-14 05:58:13 +08:00
188 lines
8.9 KiB
Plaintext
188 lines
8.9 KiB
Plaintext
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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//define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
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define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000;
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define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF;
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define symbol __ICFEDIT_region_BD_RAM_start__ = 0x10000000;
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define symbol __ICFEDIT_region_BD_RAM_end__ = 0x10005FFF;
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define symbol __ICFEDIT_region_FWLOADER_start__ = 0x10006000;
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define symbol __ICFEDIT_region_FWLOADER_end__ = 0x1000DFFF;
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define symbol __ICFEDIT_region_IMG2_TEMP_start__ = 0x1000E000;
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define symbol __ICFEDIT_region_IMG2_TEMP_end__ = 0x1006FFFF;
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/*-Sizes-*/
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/*define symbol __ICFEDIT_size_cstack__ = 0x400;*/
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/*define symbol __ICFEDIT_size_heap__ = 0x800;*/
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__];
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define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__];
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define region FWLOADER_region = mem:[from __ICFEDIT_region_FWLOADER_start__ to __ICFEDIT_region_FWLOADER_end__];
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define region IMG2_TEMP_region = mem:[from __ICFEDIT_region_IMG2_TEMP_start__ to __ICFEDIT_region_IMG2_TEMP_end__];
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/*define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };*/
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/*define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };*/
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//initialize by copy { readwrite };
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//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
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//do not initialize { section * };
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//place at address mem:__ICFEDIT_intvec_start__ { readonly section .vectors_table };
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/*place in RAM_region { readwrite, block CSTACK, block HEAP };*/
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//place in TCM_region { readwrite };
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/****************************************
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* ROM Section config *
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****************************************/
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keep { section .rom };
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place at start of ROM_region { readonly, section .rom };
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/****************************************
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* BD RAM Section config *
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****************************************/
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keep { section .ram_dedecated_vector_table* };
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define block .vector_table with fixed order{section .ram_dedecated_vector_table*};
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keep { section .ram_user_define_irq_table* };
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define block .user_vector_table with fixed order{section .ram_user_define_irq_table*};
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keep { section .ram_user_define_data_table* };
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define block .user_data_table with fixed order{section .ram_user_define_data_table*};
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define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o,
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section .hal.ram.bss* object hal_pinmux.o,
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section .hal.ram.bss* object diag.o,
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section .hal.ram.bss* object rtl8195a_ssi_rom.o,
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section .hal.ram.bss* object rtl8195a_gpio.o,
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section .hal.ram.bss*,
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section .timer2_7_vector_table.data*,
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section .infra.ram.bss*,
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section .mon.ram.bss*,
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section .wlan_ram_map* object rom_wlan_ram_map.o,
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section .wlan_ram_map*,
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section .libc.ram.bss*
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};
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define block IMAGE1 with fixed order { section LOADER };
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keep { section .fwloader.start_ram.data* };
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define block .fwloader.start.table1 with fixed order{ section .fwloader.start_ram.data* };
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keep { section .fwloader.validate.rodata* };
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define block .fwloader.start.table2 with fixed order{ section .fwloader.validate.rodata* };
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keep { section .fwloader.ram.data* };
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define block .fwloader_ram.data with fixed order{ section .fwloader.ram.data*,
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section .data*,
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// section .bss*,
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section .rodata*
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};
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define block .fwloader_ram.bss with fixed order{
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section .bss*
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};
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keep { section .fwloader.ram.start* };
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define block .fwloader_ram.text with fixed order{ section .fwloader.ram.start*,
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section .text*
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};
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define block .spi_flash.data with fixed order{ section .hal.flash.data*, section .hal.ram.data*, section .hal.gpio.data* };
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define block .spi_flash.text with fixed order{ section .hal.ram.text*, section .hal.flash.text*, section .hal.gpio.text*, };
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define block FWLOADER with fixed order { block .fwloader.start.table1,
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block .fwloader.start.table2,
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block .fwloader_ram.text,
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block .fwloader_ram.data,
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block .fwloader_ram.bss,
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block .spi_flash.data,
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block .spi_flash.text
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};
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define block .updata_for_ota.data with fixed order{ section .bss* object Update_for_OTA.o };
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keep { section .image2.ram.data* };
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define block .image2.start.table1 with fixed order{ section .image2.ram.data* };
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keep { section .image2.validate.rodata*};
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define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*};
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define block .ram_image2.text with fixed order{ section .infra.ram.start*,
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section .mon.ram.text*
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};
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define block .heap with fixed order{ section .heap* };
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place at start of BD_RAM_region { readwrite,
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block .vector_table,
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block .user_vector_table,
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block .user_data_table,
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block .rom.bss,
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block IMAGE1,
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block .heap
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};
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place at start of FWLOADER_region { readwrite, block FWLOADER };
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place at end of IMG2_TEMP_region { readwrite, block .updata_for_ota.data};
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define block .ram.data with fixed order{ section .iar.init_table };
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define block IMAGE2 with fixed order { block .image2.start.table1, block .image2.start.table2, block .ram_image2.text, block .ram.data };
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define block .ram.bss with fixed order{
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section COMMON,
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section .bdsram.data*
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};
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define block .bf_data with fixed order{ section .bfsram.data* };
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place at start of IMG2_TEMP_region { readwrite,
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block IMAGE2,
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block .ram.bss,
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block .bf_data
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};
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define exported symbol __rom_bss_start__ = 0x10000300; // use in rom
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define exported symbol __rom_bss_end__ = 0x10000bc8; // use in rom
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define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom
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define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code
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// unnecessay symbol
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define exported symbol ShowRamBuildInfo=0;
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define exported symbol En32KCalibration=0;
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define exported symbol _AppStart=0;
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define exported symbol vPortSVCHandler=0;
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define exported symbol xPortSysTickHandler=0;
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define exported symbol xPortPendSVHandler=0;
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define exported symbol vTaskDelete=0;
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define exported symbol RtlUpSemaFromISR=0; |