mirror of
https://github.com/oopuuu/zTC1.git
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235 lines
9.8 KiB
ArmAsm
235 lines
9.8 KiB
ArmAsm
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; UNPUBLISHED PROPRIETARY SOURCE CODE
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; Copyright (c) 2016 MXCHIP Inc.
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;
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; The contents of this file may not be disclosed to third parties, copied or
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; duplicated in any form, in whole or in part, without the prior written
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; permission of MXCHIP Corporation.
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;
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; Amount of memory (in bytes) allocated for Stack
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; Tailor this value to your application needs
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00012000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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IMPORT vPortSVCHandler
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IMPORT xPortPendSVHandler
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IMPORT xPortSysTickHandler
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD vPortSVCHandler ; SVCall Handler
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DCD 0 ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD xPortPendSVHandler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD GpioInterrupt ; Window WatchDog
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DCD RtcInterrupt ; PVD through EXTI Line detection
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DCD IrInterrupt ; Tamper and TimeStamps through the EXTI line
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DCD FuartInterrupt ; RTC Wakeup through the EXTI line
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DCD BuartInterrupt ; FLASH
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DCD PwcInterrupt ; RCC
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DCD Timer0Interrupt ; EXTI Line0
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DCD UsbInterrupt ; Line1
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DCD DmaCh0Interrupt ; EXTI Line2
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DCD DmaCh1Interrupt ; EXTI Line3
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DCD audio_decoder_interrupt_handler ; EXTI Line4
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DCD SpisInterrupt ; DMA1 Stream 0
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DCD SdInterrupt ; DMA1 Stream 1
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DCD SpimInterrupt ; DMA1 Stream 2
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DCD Timer1Interrupt ; DMA1 Stream 3
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DCD WatchDogInterrupt ; DMA1 Stream 4
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT __low_level_init
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IMPORT __main
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LDR R0, =__low_level_init
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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IMPORT hard_fault_handler_c
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TST LR, #4
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ITE EQ
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MRSEQ R0, MSP
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MRSNE R0, PSP
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B hard_fault_handler_c
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ENDP
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MemManage_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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IMPORT hard_fault_handler_c
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TST LR, #4
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ITE EQ
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MRSEQ R0, MSP
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MRSNE R0, PSP
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B hard_fault_handler_c
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ENDP
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BusFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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IMPORT hard_fault_handler_c
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TST LR, #4
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ITE EQ
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MRSEQ R0, MSP
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MRSNE R0, PSP
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B hard_fault_handler_c
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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IMPORT hard_fault_handler_c
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TST LR, #4
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ITE EQ
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MRSEQ R0, MSP
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MRSNE R0, PSP
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B hard_fault_handler_c
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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IMPORT vPortSVCHandler
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B vPortSVCHandler
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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IMPORT xPortPendSVHandler
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B xPortPendSVHandler
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ENDP
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Default_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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EXPORT GpioInterrupt [WEAK]
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EXPORT RtcInterrupt [WEAK]
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EXPORT IrInterrupt [WEAK]
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EXPORT FuartInterrupt [WEAK]
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EXPORT BuartInterrupt [WEAK]
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EXPORT PwcInterrupt [WEAK]
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EXPORT Timer0Interrupt [WEAK]
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EXPORT UsbInterrupt [WEAK]
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EXPORT DmaCh0Interrupt [WEAK]
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EXPORT DmaCh1Interrupt [WEAK]
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EXPORT audio_decoder_interrupt_handler [WEAK]
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EXPORT SpisInterrupt [WEAK]
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EXPORT SdInterrupt [WEAK]
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EXPORT SpimInterrupt [WEAK]
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EXPORT Timer1Interrupt [WEAK]
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EXPORT WatchDogInterrupt [WEAK]
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SysTick_Handler
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GpioInterrupt
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RtcInterrupt
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IrInterrupt
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FuartInterrupt
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BuartInterrupt
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PwcInterrupt
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Timer0Interrupt
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UsbInterrupt
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DmaCh0Interrupt
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DmaCh1Interrupt
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audio_decoder_interrupt_handler
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SpisInterrupt
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SdInterrupt
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SpimInterrupt
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Timer1Interrupt
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WatchDogInterrupt
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B .
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ENDP
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ALIGN
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;*******************************************************************************
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; User Stack and Heap initialization
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;*******************************************************************************
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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EXPORT Heap_Mem
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EXPORT Stack_Mem
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
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