#
# Copyright (C) 2008-2014, Marvell International Ltd.
# All Rights Reserved.
#

# OpenOCD config script for mc200 and mw300

set CHIP_RAM_START   0x00100000

# yhb changed to support SWD
proc swj_newdap {chip tag args} {
 if [using_hla] {
     eval hla newtap $chip $tag $args
 } elseif [using_jtag] {
     eval jtag newtap $chip $tag $args
 } elseif [using_swd] {
     eval swd newdap $chip $tag $args
 }
}

# yhb set SWD
transport select swd

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME wmcore
}

if { [info exists ENDIAN] } {
   set  _ENDIAN $ENDIAN
} else {
   set  _ENDIAN little
}

# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
   set  _WORKAREASIZE $WORKAREASIZE
} else {
   set  _WORKAREASIZE 0x4000
}

# JTAG speed should be <= F_CPU/6. F_CPU after reset is 32MHz,
# and it has been found not to work reliably at 5MHz,
# so use F_JTAG = 3MHz
adapter_khz 2000

adapter_nsrst_delay 100
if {[using_jtag]} {
jtag_ntrst_delay 100
}


#jtag scan chain
if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x4ba00477
}

swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID


set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME -rtos auto

$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
if { [info exists CONFIG_FLASH] } {
   flash bank wm0.flash mrvlqspi 0x0 0 0 0 $_TARGETNAME 0x46010000
   flash bank wm1.flash mrvlqspi 0x400000 0 0 0 $_TARGETNAME 0x46090000
}

#gdb_report_data_abort enable

$_TARGETNAME configure -event gdb-attach {
    echo "MiCO: GDB ATTACHED"
    reset halt
    mww 0x480C0100 0x00c89346
}

#shutdown OpenOCD daemon when gdb detaches
$_TARGETNAME configure -event gdb-detach { reset halt; mww 0x480C0100 0x0; sleep 5; resume; shutdown }

#yhb copy from stm32f4x.cfg
#reset_config srst_nogate

# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq