source [find mico-os/makefiles/OpenOCD/interface/swj-dp.tcl]

adapter_khz 1000
reset_config srst_only srst_push_pull

set CHIP_FLASH_START 0x00000000
set CHIP_RAM_START   0x02000000

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME lpc4350
}

#
# M4 JTAG mode TAP
#
if { [info exists M4_JTAG_TAPID] } {
	set _M4_JTAG_TAPID $M4_JTAG_TAPID
} else {
	set _M4_JTAG_TAPID 0x4ba00477
}

#
# M4 SWD mode TAP
#
if { [info exists M4_SWD_TAPID] } {
	set _M4_SWD_TAPID $M4_SWD_TAPID
} else {
	set _M4_SWD_TAPID 0x2ba01477
}

if { [using_jtag] } {
	set _M4_TAPID $_M4_JTAG_TAPID
} {
	set _M4_TAPID $_M4_SWD_TAPID
}

#
# M0 TAP
#
if { [info exists M0_JTAG_TAPID] } {
	set _M0_JTAG_TAPID $M0_JTAG_TAPID
} else {
	set _M0_JTAG_TAPID 0x0ba01477
}

swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
				-expected-id $_M4_TAPID
				
set _TARGETNAME $_CHIPNAME.m4				
target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.m4

if { [using_jtag] } {
	swj_newdap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
				-expected-id $_M0_JTAG_TAPID
	target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0
}

if {![using_hla]} {
   # on this CPU we should use VECTRESET to perform a soft reset and
   # manually reset the periphery
   # SRST or SYSRESETREQ disable the debug interface for the time of
   # the reset and will not fit our requirements for a consistent debug
   # session
   cortex_m reset_config vectreset
}

#Reset target when gdb attaches
$_TARGETNAME configure -event gdb-attach { reset halt; sleep 1; mww 0xE0042004 3; mww 0xE0042008 0xffffffff }

#shutdown OpenOCD daemon when gdb detaches
$_TARGETNAME configure -event gdb-detach { mww 0xE0042008 0x00000000; reset halt; sleep 5; resume; shutdown }