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https://github.com/oopuuu/zTC1.git
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修改了Web后台的部分界面，增加了HAmqtt中的总电量传感器，后台新增mqtt上报频率设置
This commit is contained in:
OOP
420
mico-os/platform/MCU/ATSAMG55/peripherals/platform_uart.c
Normal file
420
mico-os/platform/MCU/ATSAMG55/peripherals/platform_uart.c
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@@ -0,0 +1,420 @@
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/**
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******************************************************************************
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* @file platform_uart.c
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* @author William Xu
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* @version V1.0.0
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* @date 05-May-2014
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* @brief This file provide UART driver functions.
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******************************************************************************
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* UNPUBLISHED PROPRIETARY SOURCE CODE
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* Copyright (c) 2016 MXCHIP Inc.
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*
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* The contents of this file may not be disclosed to third parties, copied or
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* duplicated in any form, in whole or in part, without the prior written
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* permission of MXCHIP Corporation.
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******************************************************************************
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*/
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#include "platform.h"
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#include "platform_peripheral.h"
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#include "platform_logging.h"
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/******************************************************
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* Constants
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******************************************************/
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#define DMA_INTERRUPT_FLAGS ( DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_FE )
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/******************************************************
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* Enumerations
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******************************************************/
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/******************************************************
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* Type Definitions
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******************************************************/
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/******************************************************
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* Structures
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******************************************************/
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/******************************************************
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* Variables Definitions
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******************************************************/
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static IRQn_Type platform_flexcom_irq_numbers[] =
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{
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[0] = FLEXCOM0_IRQn,
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[1] = FLEXCOM1_IRQn,
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[2] = FLEXCOM2_IRQn,
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[3] = FLEXCOM3_IRQn,
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[4] = FLEXCOM4_IRQn,
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[5] = FLEXCOM5_IRQn,
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[6] = FLEXCOM6_IRQn,
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[7] = FLEXCOM7_IRQn,
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};
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/******************************************************
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* Static Function Declarations
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******************************************************/
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/******************************************************
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* Function Definitions
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******************************************************/
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OSStatus platform_uart_init( platform_uart_driver_t* driver, const platform_uart_t* peripheral, const platform_uart_config_t* config, ring_buffer_t* optional_ring_buffer )
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{
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pdc_packet_t pdc_uart_packet, pdc_uart_tx_packet;
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OSStatus err = kNoErr;
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sam_usart_opt_t settings;
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bool hardware_shaking = false;
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platform_mcu_powersave_disable();
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require_action_quiet( ( driver != NULL ) && ( peripheral != NULL ) && ( config != NULL ), exit, err = kParamErr);
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require_action_quiet( (optional_ring_buffer->buffer != NULL ) && (optional_ring_buffer->size != 0), exit, err = kUnsupportedErr);
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driver->rx_size = 0;
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driver->tx_size = 0;
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driver->rx_ring_buffer = optional_ring_buffer;
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driver->last_transmit_result = kNoErr;
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driver->last_receive_result = kNoErr;
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driver->peripheral = (platform_uart_t*)peripheral;
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#ifndef NO_MICO_RTOS
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mico_rtos_init_semaphore( &driver->tx_complete, 1 );
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mico_rtos_init_semaphore( &driver->rx_complete, 1 );
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mico_rtos_init_semaphore( &driver->sem_wakeup, 1 );
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mico_rtos_init_mutex ( &driver->tx_mutex );
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#else
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driver->tx_complete = false;
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driver->rx_complete = false;
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#endif
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/* Set Tx and Rx pin mode to UART peripheral */
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platform_gpio_peripheral_pin_init( peripheral->tx_pin, ( peripheral->tx_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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platform_gpio_peripheral_pin_init( peripheral->rx_pin, ( peripheral->rx_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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/* Init CTS and RTS pins (if available) */
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if ( peripheral->cts_pin != NULL && (config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
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{
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hardware_shaking = true;
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platform_gpio_peripheral_pin_init( peripheral->cts_pin, ( peripheral->cts_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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}
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if ( peripheral->rts_pin != NULL && (config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
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{
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hardware_shaking = true;
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platform_gpio_peripheral_pin_init( peripheral->rts_pin, ( peripheral->rts_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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}
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/* Enable the clock. */
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if( pmc_is_periph_clk_enabled( peripheral->peripheral_id ) == 0 ){
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flexcom_enable( peripheral->flexcom_base );
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}
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flexcom_set_opmode( peripheral->flexcom_base, FLEXCOM_USART );
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/* Enable the receiver and transmitter. */
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usart_reset_tx( peripheral->port );
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usart_reset_rx( peripheral->port );
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/* Disable all the interrupts. */
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usart_disable_interrupt( peripheral->port, 0xffffffff );
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switch ( config->parity ) {
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case NO_PARITY:
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settings.parity_type = US_MR_PAR_NO;
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break;
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case EVEN_PARITY:
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settings.parity_type = US_MR_PAR_EVEN;
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break;
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case ODD_PARITY:
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settings.parity_type = US_MR_PAR_ODD;
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break;
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default:
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err = kParamErr;
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goto exit;
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}
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switch ( config->data_width) {
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case DATA_WIDTH_5BIT:
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settings.char_length = US_MR_CHRL_5_BIT;
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break;
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case DATA_WIDTH_6BIT:
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settings.char_length = US_MR_CHRL_6_BIT;
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break;
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case DATA_WIDTH_7BIT:
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settings.char_length = US_MR_CHRL_7_BIT;
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break;
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case DATA_WIDTH_8BIT:
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settings.char_length = US_MR_CHRL_8_BIT;
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break;
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case DATA_WIDTH_9BIT:
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settings.char_length = US_MR_MODE9;
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break;
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default:
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err = kParamErr;
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goto exit;
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}
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settings.baudrate = config->baud_rate;
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settings.stop_bits = ( config->stop_bits == STOP_BITS_1 ) ? US_MR_NBSTOP_1_BIT : US_MR_NBSTOP_2_BIT;
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settings.channel_mode= US_MR_CHMODE_NORMAL;
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/* Configure USART in serial mode. */
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if (!hardware_shaking) {
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usart_init_rs232( peripheral->port, &settings, sysclk_get_peripheral_hz());
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} else {
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usart_init_hw_handshaking( peripheral->port, &settings, sysclk_get_peripheral_hz());
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}
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/* Enable uart interrupt */
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NVIC_SetPriority( platform_flexcom_irq_numbers[peripheral->uart_id], 0x06 );
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NVIC_EnableIRQ( platform_flexcom_irq_numbers[peripheral->uart_id] );
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/* Enable PDC transmit */
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pdc_enable_transfer( usart_get_pdc_base( peripheral->port ), PERIPH_PTCR_TXTEN | PERIPH_PTCR_RXTEN );
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pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->port ), PERIPH_PTCR_TXTDIS );
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pdc_uart_packet.ul_addr = (uint32_t)driver->rx_ring_buffer->buffer;
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pdc_uart_packet.ul_size = (uint32_t)driver->rx_ring_buffer->size;
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pdc_rx_init( usart_get_pdc_base( peripheral->port ), &pdc_uart_packet, &pdc_uart_packet );
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pdc_uart_tx_packet.ul_addr = (uint32_t)0;
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pdc_uart_tx_packet.ul_size = (uint32_t)1;
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pdc_tx_init( usart_get_pdc_base( driver->peripheral->port ), &pdc_uart_tx_packet, NULL );
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usart_enable_interrupt( peripheral->port, US_IER_ENDRX | US_IER_RXBUFF | US_IER_RXRDY | US_IER_ENDTX );
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/* Enable the receiver and transmitter. */
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usart_enable_tx( peripheral->port );
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usart_enable_rx( peripheral->port );
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exit:
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platform_mcu_powersave_enable( );
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return err;
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}
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OSStatus platform_uart_deinit( platform_uart_driver_t* driver )
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{
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OSStatus err = kNoErr;
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platform_mcu_powersave_disable();
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require_action_quiet( ( driver != NULL ), exit, err = kParamErr);
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usart_disable_interrupt( driver->peripheral->port, 0xffffffff );
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NVIC_DisableIRQ( platform_flexcom_irq_numbers[driver->peripheral->uart_id] );
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pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->port ), PERIPH_PTCR_TXTDIS | PERIPH_PTCR_RXTDIS );
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usart_disable_tx( driver->peripheral->port );
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usart_disable_rx( driver->peripheral->port );
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if( pmc_is_periph_clk_enabled( driver->peripheral->peripheral_id ) == 1 ){
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flexcom_disable( driver->peripheral->flexcom_base );
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}
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platform_gpio_deinit( driver->peripheral->tx_pin );
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platform_gpio_deinit( driver->peripheral->rx_pin );
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if ( driver->peripheral->cts_pin != NULL )
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{
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platform_gpio_deinit( driver->peripheral->cts_pin );
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}
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if ( driver->peripheral->rts_pin != NULL )
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{
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platform_gpio_deinit( driver->peripheral->rts_pin );
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}
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#ifndef NO_MICO_RTOS
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mico_rtos_deinit_semaphore(&driver->rx_complete);
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mico_rtos_deinit_semaphore(&driver->tx_complete);
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#endif
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driver->peripheral = NULL;
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memset( driver, 0, sizeof(platform_uart_driver_t) );
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exit:
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platform_mcu_powersave_enable();
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return err;
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}
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OSStatus platform_uart_transmit_bytes( platform_uart_driver_t* driver, const uint8_t* data_out, uint32_t size )
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{
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OSStatus err = kNoErr;
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pdc_packet_t pdc_uart_packet;
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platform_mcu_powersave_disable();
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#ifndef NO_MICO_RTOS
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mico_rtos_lock_mutex( &driver->tx_mutex );
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#endif
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require_action_quiet( ( driver != NULL ) && ( data_out != NULL ) && ( size != 0 ), exit, err = kParamErr);
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/* reset DMA transmission result. the result is assigned in interrupt handler */
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driver->last_transmit_result = kGeneralErr;
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driver->tx_size = size;
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pdc_uart_packet.ul_addr = (uint32_t) data_out;
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pdc_uart_packet.ul_size = size;
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pdc_tx_init( usart_get_pdc_base( driver->peripheral->port ), &pdc_uart_packet, NULL);
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/* Enable Tx DMA transmission */
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pdc_enable_transfer( usart_get_pdc_base( driver->peripheral->port ), PERIPH_PTCR_TXTEN );
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#ifndef NO_MICO_RTOS
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mico_rtos_get_semaphore( &driver->tx_complete, MICO_NEVER_TIMEOUT );
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#else
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while( driver->tx_complete == false);
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driver->tx_complete = false;
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#endif
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exit:
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#ifndef NO_MICO_RTOS
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mico_rtos_unlock_mutex( &driver->tx_mutex );
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#endif
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platform_mcu_powersave_enable();
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return err;
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}
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OSStatus platform_uart_receive_bytes( platform_uart_driver_t* driver, uint8_t* data_in, uint32_t expected_data_size, uint32_t timeout_ms )
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{
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OSStatus err = kNoErr;
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uint32_t transfer_size;
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//platform_mcu_powersave_disable();
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require_action_quiet( ( driver != NULL ) && ( data_in != NULL ) && ( expected_data_size != 0 ), exit, err = kParamErr);
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require_action_quiet( driver->rx_ring_buffer != NULL , exit, err = kUnsupportedErr);
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while ( expected_data_size != 0 )
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{
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transfer_size = MIN(driver->rx_ring_buffer->size / 2, expected_data_size);
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/* Check if ring buffer already contains the required amount of data. */
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if ( transfer_size > ring_buffer_used_space( driver->rx_ring_buffer ) )
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{
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/* Set rx_size and wait in rx_complete semaphore until data reaches rx_size or timeout occurs */
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driver->rx_size = transfer_size;
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#ifndef NO_MICO_RTOS
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if ( mico_rtos_get_semaphore( &driver->rx_complete, timeout_ms ) != kNoErr )
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{
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driver->rx_size = 0;
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err = kTimeoutErr;
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goto exit;
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}
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/* Reset rx_size to prevent semaphore being set while nothing waits for the data */
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driver->rx_size = 0;
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#else
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driver->rx_complete = false;
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int delay_start = mico_rtos_get_time();
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while(driver->rx_complete == false){
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if(mico_rtos_get_time() >= delay_start + timeout_ms && timeout_ms != MICO_NEVER_TIMEOUT){
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driver->rx_size = 0;
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err = kTimeoutErr;
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goto exit;
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}
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}
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driver->rx_size = 0;
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#endif
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}
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expected_data_size -= transfer_size;
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// Grab data from the buffer
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do
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{
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uint8_t* available_data;
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uint32_t bytes_available;
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ring_buffer_get_data( driver->rx_ring_buffer, &available_data, &bytes_available );
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bytes_available = MIN( bytes_available, transfer_size );
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memcpy( data_in, available_data, bytes_available );
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transfer_size -= bytes_available;
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data_in = ( (uint8_t*)data_in + bytes_available );
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ring_buffer_consume( driver->rx_ring_buffer, bytes_available );
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}
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while ( transfer_size != 0 );
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}
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require_action( expected_data_size == 0, exit, err = kReadErr);
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exit:
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//platform_mcu_powersave_enable();
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return err;
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}
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uint32_t platform_uart_get_length_in_buffer( platform_uart_driver_t* driver )
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{
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return ring_buffer_used_space( driver->rx_ring_buffer );
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}
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/******************************************************
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* Interrupt Service Routines
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******************************************************/
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void platform_uart_irq( platform_uart_driver_t* driver )
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{
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uint32_t status = usart_get_status( driver->peripheral->port );
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uint32_t mask = usart_get_interrupt_mask( driver->peripheral->port );
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Pdc* pdc_register = usart_get_pdc_base( driver->peripheral->port );
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/* ENDTX flag is set when Tx DMA transfer is done */
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if ( ( mask & US_IMR_ENDTX ) && ( status & US_CSR_ENDTX ) )
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{
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pdc_packet_t dma_packet;
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/* ENDTX is cleared when TCR or TNCR is set to a non-zero value, which effectively
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* starts another Tx DMA transaction. To work around this, disable Tx before
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* performing a dummy Tx init.
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*/
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pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->port ), PERIPH_PTCR_TXTDIS );
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dma_packet.ul_addr = (uint32_t)0;
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dma_packet.ul_size = (uint32_t)1;
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pdc_tx_init( usart_get_pdc_base( driver->peripheral->port ), &dma_packet, NULL );
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/* Notifies waiting thread that Tx DMA transfer is complete */
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#ifndef NO_MICO_RTOS
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mico_rtos_set_semaphore( &driver->tx_complete );
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#else
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driver->tx_complete = true;
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#endif
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}
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/* ENDRX flag is set when RCR is 0. RNPR and RNCR values are then copied into
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* RPR and RCR, respectively, while the RX tranfer continues. We now need to
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* prepare RNPR and RNCR for the next iteration.
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*/
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if ( ( mask & US_IMR_ENDRX ) && ( status & US_CSR_ENDRX ) )
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{
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pdc_register->PERIPH_RNPR = (uint32_t)driver->rx_ring_buffer->buffer;
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pdc_register->PERIPH_RNCR = (uint32_t)driver->rx_ring_buffer->size;
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}
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/* RXRDY interrupt is triggered and flag is set when a new character has been
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* received but not yet read from the US_RHR. When this interrupt executes,
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* the DMA engine already read the character out from the US_RHR and RXRDY flag
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* is no longer asserted. The code below updates the ring buffer parameters
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* to keep them current
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*/
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if ( ( mask & US_IMR_RXRDY ) )
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{
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driver->rx_ring_buffer->tail = driver->rx_ring_buffer->size - pdc_register->PERIPH_RCR;
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// Notify thread if sufficient data are available
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if ( ( driver->rx_size > 0 ) && ( ring_buffer_used_space( driver->rx_ring_buffer ) >= driver->rx_size ) )
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{
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#ifndef NO_MICO_RTOS
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mico_rtos_set_semaphore( &driver->rx_complete );
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#else
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driver->rx_complete = true;
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#endif
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driver->rx_size = 0;
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}
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}
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}
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