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https://github.com/oopuuu/zTC1.git
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修改了Web后台的部分界面，增加了HAmqtt中的总电量传感器，后台新增mqtt上报频率设置
This commit is contained in:
OOP
376
mico-os/platform/Cortex-M4F/hardfault_handler.c
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376
mico-os/platform/Cortex-M4F/hardfault_handler.c
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@@ -0,0 +1,376 @@
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/**
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* UNPUBLISHED PROPRIETARY SOURCE CODE
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* Copyright (c) 2016 MXCHIP Inc.
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*
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* The contents of this file may not be disclosed to third parties, copied or
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* duplicated in any form, in whole or in part, without the prior written
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* permission of MXCHIP Corporation.
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*
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*/
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#include <common.h>
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#include "platform_cmsis.h"
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//#include "platform_constants.h"
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#include "platform_isr.h"
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//#include "platform_isr_interface.h"
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#include "platform_assert.h"
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/******************************************************
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* Macros
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******************************************************/
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/******************************************************
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* Constants
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******************************************************/
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#ifdef DEBUG
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#define DEBUG_HARDFAULT
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#endif /* ifdef DEBUG */
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/* Bit Definitions for SCB_CFSR */
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#define SCB_CFSR_IACCVIOL ((uint32_t)0x00000001)
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#define SCB_CFSR_DACCVIOL ((uint32_t)0x00000002)
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#define SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008)
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#define SCB_CFSR_MSTKERR ((uint32_t)0x00000010)
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#define SCB_CFSR_MMARVALID ((uint32_t)0x00000080)
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#define SCB_CFSR_IBUSERR ((uint32_t)0x00000100)
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#define SCB_CFSR_PRECISERR ((uint32_t)0x00000200)
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#define SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400)
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#define SCB_CFSR_UNSTKERR ((uint32_t)0x00000800)
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#define SCB_CFSR_STKERR ((uint32_t)0x00001000)
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#define SCB_CFSR_BFARVALID ((uint32_t)0x00008000)
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#define SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000)
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#define SCB_CFSR_INVSTATE ((uint32_t)0x00020000)
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#define SCB_CFSR_INVPC ((uint32_t)0x00040000)
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#define SCB_CFSR_NOCP ((uint32_t)0x00080000)
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#define SCB_CFSR_UNALIGNED ((uint32_t)0x01000000)
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#define SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000)
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/******************************************************
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* Enumerations
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******************************************************/
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/******************************************************
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* Type Definitions
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******************************************************/
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/******************************************************
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* Structures
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******************************************************/
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typedef struct exception_stacked_registers_struct
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{
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/* Stacked registers */
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uint32_t R0;
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uint32_t R1;
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uint32_t R2;
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uint32_t R3;
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uint32_t R12;
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uint32_t LR;
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uint32_t PC; /* (Return Address) */
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uint32_t PSR;
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} exception_stacked_registers_t;
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typedef enum EXC_RETURN_enum
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{
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HANDLER_MSP_MSP = 0xF1, /* Return to Handler mode. Exception return gets state from MSP. Execution uses MSP after return. */
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THREAD_MSP_MSP = 0xF9, /* Return to Thread mode. Exception return gets state from MSP. Execution uses MSP after return. */
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THREAD_PSP_PSP = 0xFD /* Return to Thread mode. Exception return gets state from PSP. Execution uses PSP after return. */
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} EXC_RETURN_t;
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/******************************************************
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* Static Function Declarations
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******************************************************/
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void HardFaultException_handler( uint32_t MSP, uint32_t PSP, uint32_t LR );
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/******************************************************
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* Variable Definitions
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******************************************************/
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/******************************************************
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* Function Definitions
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******************************************************/
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OSStatus stdio_hardfault( char* data, uint32_t size );
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#ifdef DEBUG_HARDFAULT
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PLATFORM_DEFINE_NAKED_ISR( HardFault_Handler )
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{
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// __ASM("MRS R0, MSP" );
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// __ASM("MRS R1, PSP" );
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// __ASM("MOV R2, LR" );
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// __ASM("B HardFaultException_handler");
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__ASM("TST LR, #4" );
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__ASM("ITE EQ" );
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__ASM("MRSEQ R0, MSP" );
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__ASM("MRSNE R0, PSP" );
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__ASM("MOV SP, R0" );
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__ASM("B hard_fault_handler_c");
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}
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void hard_fault_handler_c (unsigned int * hardfault_args)
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{
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unsigned int stacked_r0;
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unsigned int stacked_r1;
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unsigned int stacked_r2;
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unsigned int stacked_r3;
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unsigned int stacked_r12;
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unsigned int stacked_lr;
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unsigned int stacked_pc;
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unsigned int stacked_psr;
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char logString[50];
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stacked_r0 = ((unsigned long) hardfault_args[0]);
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stacked_r1 = ((unsigned long) hardfault_args[1]);
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stacked_r2 = ((unsigned long) hardfault_args[2]);
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stacked_r3 = ((unsigned long) hardfault_args[3]);
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stacked_r12 = ((unsigned long) hardfault_args[4]);
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stacked_lr = ((unsigned long) hardfault_args[5]);
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stacked_pc = ((unsigned long) hardfault_args[6]);
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stacked_psr = ((unsigned long) hardfault_args[7]);
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sprintf (logString,"\n>>>>>>>>>>>>>>[");
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stdio_hardfault( logString, strlen(logString)+1 );
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switch(__get_IPSR())
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{
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case 3:
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sprintf (logString, "Hard Fault");
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stdio_hardfault( logString, strlen(logString)+1 );
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break;
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case 4:
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sprintf (logString, "Memory Manage");
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stdio_hardfault( logString, strlen(logString)+1 );
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break;
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case 5:
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sprintf (logString, "Bus Fault");
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stdio_hardfault( logString, strlen(logString)+1 );
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break;
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case 6:
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sprintf (logString, "Usage Fault");
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stdio_hardfault( logString, strlen(logString)+1 );
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break;
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default:
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sprintf (logString, "Unknown Fault %ld", __get_IPSR());
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stdio_hardfault( logString, strlen(logString)+1 );
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break;
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}
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sprintf (logString, ",corrupt,dump registers]>>>>>>>>>>>>>>>>>>\n\r");
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "R0 = 0x%08x\r\n", stacked_r0);
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "R1 = 0x%08x\r\n", stacked_r1);
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "R2 = 0x%08x\r\n", stacked_r2);
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "R3 = 0x%08x\r\n", stacked_r3);
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "R12 = 0x%08x\r\n", stacked_r12);
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "LR [R14] = 0x%08x subroutine call return address\r\n", stacked_lr);
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "PC [R15] = 0x%08X program counter\r\n", stacked_pc);
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "PSR = 0x%08X\r\n", stacked_psr);
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "BFAR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED38))));
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "CFSR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED28))));
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "HFSR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED2C))));
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "DFSR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED30))));
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stdio_hardfault( logString, strlen(logString)+1 );
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sprintf (logString, "AFSR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED3C))));
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stdio_hardfault( logString, strlen(logString)+1 );
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while (1);
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}
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#if defined( __GNUC__ ) && ( ! defined( __clang__ ) )
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#pragma GCC optimize ("O0")
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#endif /* if defined( __GNUC__ ) && ( ! defined( __clang__ ) ) */
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void HardFaultException_handler( uint32_t MSP, uint32_t PSP, uint32_t LR )
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{
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exception_stacked_registers_t* stackframe;
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uint32_t MMFAR = 0;
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uint32_t BFAR = 0;
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/* Get the Link Register value which contains the EXC_RETURN code */
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EXC_RETURN_t EXC_RETURN = (EXC_RETURN_t)(LR & 0xff);
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/* The location of the stack frame of the offending code is indicated by the EXC_RETURN code */
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if ( ( EXC_RETURN & 0x00000004 ) != 0 )
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{
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stackframe = (exception_stacked_registers_t*) PSP;
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}
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else
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{
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stackframe = (exception_stacked_registers_t*) MSP;
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}
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(void) stackframe; /* may be unused */
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/* Disable interrupts - this is so that when debugger continues, it will go to caller, not an interrupt routine */
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/* This will mean the system cannot run properly when returning */
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__set_PRIMASK( 0x01 );
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/* Find cause of hardfault */
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if ( ( SCB->HFSR & SCB_HFSR_VECTTBL_Msk ) != 0 )
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{
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MICO_TRIGGER_BREAKPOINT(); /* Vector Table Hard Fault - Bus fault during vector table read during exception processing. */
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}
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else if ( ( SCB->HFSR & SCB_HFSR_FORCED_Msk ) != 0 )
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{
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/* Hard Fault is an escalated fault that was not handled */
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/* Need to read the other fault status registers */
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if ( ( SCB->CFSR & SCB_CFSR_MMARVALID ) != 0 )
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{
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/* Memory Management Fault address register is valid - read it. */
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MMFAR = SCB->MMFAR;
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}
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if ( ( SCB->CFSR & SCB_CFSR_BFARVALID ) != 0 )
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{
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/* Bus Fault address register is valid - read it. */
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BFAR = SCB->BFAR;
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}
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if ( ( SCB->CFSR & SCB_CFSR_IACCVIOL ) != 0 )
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{
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/* Memory Management Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Instruction Access Violation - Attempt to execute an instruction from a region marked Execute Never */
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(void) stackframe->LR; /* Check this variable for the jump instruction that jumped to an invalid region */
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(void) stackframe->PC; /* Check this variable for the location that was attempted to be executed */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_DACCVIOL ) != 0 )
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{
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/* Memory Management Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Data Access Violation */
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(void) stackframe->PC; /* Check this variable for the location of the offending instruction */
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(void) MMFAR; /* Check this variable for the address of the attempted access */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_MUNSTKERR ) != 0 )
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{
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/* Memory Management Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Unstacking fault returning from an exception - stack possibly corrupted during exception handler */
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/* New stackframe is not saved in this case */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_MSTKERR ) != 0 )
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{
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/* Memory Management Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Stacking fault whilst entering an exception - probably a bad stack pointer */
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/* Stack frame may be incorrect due to bad stack pointer */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_IBUSERR ) != 0 )
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{
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/* Bus Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Instruction Bus Error whilst fetching an instruction*/
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}
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else if ( ( SCB->CFSR & SCB_CFSR_PRECISERR ) != 0 )
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{
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/* Bus Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Precise Data Bus Error - i.e. Data Bus fault at well defined location */
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(void) stackframe->PC; /* Check this variable for the location of the offending instruction */
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(void) BFAR; /* Check this variable for the faulting address */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_IMPRECISERR ) != 0 )
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{
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/* Bus Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Imprecise Data Bus Error - i.e. Data Bus fault occurred but details have been lost due to priorities delaying processing of the fault */
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/* No fault details are available in this case*/
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_UNSTKERR ) != 0 )
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{
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/* Bus Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Unstacking fault returning from an exception - stack possibly corrupted during exception handler */
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/* New stackframe is not saved in this case */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_STKERR ) != 0 )
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{
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/* Bus Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Stacking fault whilst entering an exception - probably a bad stack pointer */
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/* Stack frame may be incorrect due to bad stack pointer */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_UNDEFINSTR ) != 0 )
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{
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/* Usage Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Undefined Instruction Usage fault - probably corrupted memory in code space */
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(void) stackframe->PC; /* Check this variable for the location of the offending instruction */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_INVSTATE ) != 0 )
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{
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/* Usage Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Invalid State usage fault - This is probably due to a branch with the LSB=0 - i.e. attempt to execute non-thumb code - Illegal use of EPSR was attempted */
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(void) stackframe->PC; /* Check this variable for the location of the offending instruction */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_INVPC ) != 0 )
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{
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/* Usage Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Invalid PC load usage fault - the EXC_RETURN value in LR was invalid on return from an exception - possibly stack corruption in exception */
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(void) stackframe->PC; /* Check this variable for the location of the offending instruction */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_NOCP ) != 0 )
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{
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/* Usage Fault */
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MICO_TRIGGER_BREAKPOINT(); /* No Coprocessor usage fault - coprocessor instruction attempted on processor without support for them */
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(void) stackframe->PC; /* Check this variable for the location of the offending instruction */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_UNALIGNED ) != 0 )
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{
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/* Usage Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Unaligned access usage fault - Unaligned access whilst UNALIGN_TRP bit of SCB_CCR is set, or any unaligned access to LDM, STM, LDRD or STRD */
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(void) stackframe->PC; /* Check this variable for the location of the offending instruction */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else if ( ( SCB->CFSR & SCB_CFSR_DIVBYZERO ) != 0 )
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{
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/* Usage Fault */
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MICO_TRIGGER_BREAKPOINT(); /* Divide by zero usage fault */
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(void) stackframe->PC; /* Check this variable for the location of the offending instruction */
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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else
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{
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/* Unknown Fault */
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MICO_TRIGGER_BREAKPOINT();
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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}
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else
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{
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/* Unknown Hard Fault cause */
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MICO_TRIGGER_BREAKPOINT();
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/* You may try stepping past the return of this handler, which may return near the location of the error */
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}
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(void) MMFAR; /* This is for debug usage and need not be used programmatically */
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(void) BFAR; /* This is for debug usage and need not be used programmatically */
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}
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#if defined( __GNUC__ ) && ( ! defined( __clang__ ) )
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#pragma GCC reset_options
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#endif /* if defined( __GNUC__ ) && ( ! defined( __clang__ ) ) */
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#endif /* ifdef DEBUG_HARDFAULT */
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