mirror of
https://github.com/oopuuu/zTC1.git
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修改了Web后台的部分界面,增加了HAmqtt中的总电量传感器,后台新增mqtt上报频率设置
This commit is contained in:
63
mico-os/board/MKF205/MKF205.mk
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63
mico-os/board/MKF205/MKF205.mk
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@@ -0,0 +1,63 @@
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###############################################################################
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#
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# The MIT License
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||||
# Copyright (c) 2016 MXCHIP Inc.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
# of this software and associated documentation files (the "Software"), to deal
|
||||
# in the Software without restriction, including without limitation the rights
|
||||
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
# copies of the Software, and to permit persons to whom the Software is furnished
|
||||
# to do so, subject to the following conditions:
|
||||
#
|
||||
# The above copyright notice and this permission notice shall be included in
|
||||
# all copies or substantial portions of the Software.
|
||||
#
|
||||
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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||||
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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||||
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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||||
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
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# IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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###############################################################################
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NAME := Board_MKF205
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WLAN_CHIP := 43362
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WLAN_CHIP_REVISION := A2
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WLAN_CHIP_FAMILY := 43362
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WLAN_CHIP_FIRMWARE_VER := 5.90.230.12
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MODULE := 1062
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HOST_MCU_FAMILY := STM32F2xx
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HOST_MCU_VARIANT := STM32F205
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HOST_MCU_PART_NUMBER := STM32F205RGT6
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BUS := SPI
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# Extra build target in mico_standard_targets.mk, include bootloader, and copy output file to eclipse debug file (copy_output_for_eclipse)
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EXTRA_TARGET_MAKEFILES += $(MAKEFILES_PATH)/mico_standard_targets.mk
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# Global includes
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GLOBAL_INCLUDES := .
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# Global defines
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# HSE_VALUE = STM32 crystal frequency = 26MHz (needed to make UART work correctly)
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GLOBAL_DEFINES += $$(if $$(NO_CRLF_STDIO_REPLACEMENT),,CRLF_STDIO_REPLACEMENT)
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GLOBAL_LDFLAGS += -L $(MICO_OS_PATH)/board/MKF205
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# Components
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$(NAME)_COMPONENTS += drivers/keypad/gpio_button \
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drivers/spi_flash
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# Source files
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$(NAME)_SOURCES := platform.c
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ifndef NO_WIFI_FIRMWARE
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WIFI_FIRMWARE := $(MICO_OS_PATH)/resources/wifi_firmware/$(WLAN_CHIP)/$(WLAN_CHIP)$(WLAN_CHIP_REVISION)$(WLAN_CHIP_BIN_TYPE)-$(WLAN_CHIP_FIRMWARE_VER).bin
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endif
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WIFI_FIRMWARE_SECTOR_START := 2 #0x2000
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FILESYSTEM_IMAGE_SECTOR_START := 256 #0x100000
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39
mico-os/board/MKF205/bootloaderLinkerForIAR.icf
Normal file
39
mico-os/board/MKF205/bootloaderLinkerForIAR.icf
Normal file
@@ -0,0 +1,39 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x20020000;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x1000;
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define symbol __ICFEDIT_size_heap__ = 0x100;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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define symbol RAM_intvec_start = 0x20000000;
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initialize by copy { readonly, readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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"RAM_intvec_start":
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place at address mem:RAM_intvec_start { section .intvec_RAM };
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"ROM_region":
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place in ROM_region { readonly };
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"RAM_region":
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place in RAM_region { readwrite,
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block CSTACK, block HEAP };
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20
mico-os/board/MKF205/bootloaderLinkerForKeil.sct
Normal file
20
mico-os/board/MKF205/bootloaderLinkerForKeil.sct
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@@ -0,0 +1,20 @@
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; *************************************************************
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; *** Scatter-Loading Description File generated by uVision ***
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; *************************************************************
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LR_IROM1 0x08000000 0x00008000 {
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ER_IROM1 0x08000000 0x00008000
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{
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*.o (RESET, +First)
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*(InRoot$$Sections)
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startup_stm32f2xx_bootloader_RVMDK.o
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}
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ER_IROM2 0x20000000 0x00008000 {
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.ANY (+RO)
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}
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RW_IRAM1 0x20008000 0x00012000
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{
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.ANY (+RW +ZI)
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}
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}
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BIN
mico-os/board/MKF205/flash_prog.elf
Normal file
BIN
mico-os/board/MKF205/flash_prog.elf
Normal file
Binary file not shown.
31
mico-os/board/MKF205/memory.ld
Normal file
31
mico-os/board/MKF205/memory.ld
Normal file
@@ -0,0 +1,31 @@
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/**
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******************************************************************************
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*
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* The MIT License
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||||
* Copyright (c) 2016 MXCHIP Inc.
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||||
*
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||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
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* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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******************************************************************************
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*/
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MEMORY
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{
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BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
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APP_FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 992K
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SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
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}
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30
mico-os/board/MKF205/micoLinkerForIAR.icf
Normal file
30
mico-os/board/MKF205/micoLinkerForIAR.icf
Normal file
@@ -0,0 +1,30 @@
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||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
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||||
/*-Editor annotation file-*/
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||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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||||
/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08008000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x08008000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x200;
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define symbol __ICFEDIT_size_heap__ = 0x14A00;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block CSTACK, block HEAP };
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599
mico-os/board/MKF205/platform.c
Normal file
599
mico-os/board/MKF205/platform.c
Normal file
@@ -0,0 +1,599 @@
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/**
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******************************************************************************
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* @file platform.c
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* @author William Xu
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* @version V1.0.0
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* @date 05-May-2014
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* @brief This file provides all MICO Peripherals mapping table and platform
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* specific functions.
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******************************************************************************
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*
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* The MIT License
|
||||
* Copyright (c) 2014 MXCHIP Inc.
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||||
*
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||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
|
||||
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
******************************************************************************
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*/
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#include "stdio.h"
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#include "string.h"
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#include "platform.h"
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#include "platform_config.h"
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#include "platform_peripheral.h"
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#include "platform_logging.h"
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#include "mico_platform.h"
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#include "wlan_platform_common.h"
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#include "spi_flash_platform_interface.h"
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/******************************************************
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* Macros
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******************************************************/
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/******************************************************
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* Constants
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******************************************************/
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||||
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/******************************************************
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* Enumerations
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******************************************************/
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||||
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||||
/******************************************************
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* Type Definitions
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******************************************************/
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||||
|
||||
/******************************************************
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* Structures
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******************************************************/
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||||
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||||
/******************************************************
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||||
* Function Declarations
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||||
******************************************************/
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||||
extern WEAK void PlatformEasyLinkButtonClickedCallback(void);
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extern WEAK void PlatformStandbyButtonClickedCallback(void);
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||||
extern WEAK void PlatformEasyLinkButtonLongPressedCallback(void);
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||||
extern WEAK void bootloader_start(void);
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||||
|
||||
/******************************************************
|
||||
* Variables Definitions
|
||||
******************************************************/
|
||||
|
||||
static uint32_t _default_start_time = 0;
|
||||
static mico_timer_t _button_EL_timer;
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||||
|
||||
const platform_gpio_t platform_gpio_pins[] =
|
||||
{
|
||||
/* Common GPIOs for internal use */
|
||||
[MICO_SYS_LED] = { GPIOB, 7 },
|
||||
[MICO_RF_LED] = { GPIOB, 6 },
|
||||
[BOOT_SEL] = { GPIOB, 1 },
|
||||
[MFG_SEL] = { GPIOB, 9 },
|
||||
[Standby_SEL] = { GPIOA, 0 },
|
||||
[EasyLink_BUTTON] = { GPIOB, 8 },
|
||||
[STDIO_UART_RX] = { GPIOA, 9 },
|
||||
[STDIO_UART_TX] = { GPIOA, 10 },
|
||||
[STDIO_UART_CTS] = { GPIOA, 12 },
|
||||
[STDIO_UART_RTS] = { GPIOA, 11 },
|
||||
[FLASH_PIN_SPI_CS ] = { GPIOA, 4 },
|
||||
[FLASH_PIN_SPI_CLK ] = { GPIOA, 5 },
|
||||
[FLASH_PIN_SPI_MOSI] = { GPIOA, 7 },
|
||||
[FLASH_PIN_SPI_MISO] = { GPIOA, 6 },
|
||||
|
||||
/* GPIOs for external use */
|
||||
[MICO_GPIO_0] = { GPIOC, 6 },
|
||||
[MICO_GPIO_1] = { GPIOC, 7 },
|
||||
[MICO_GPIO_2] = { GPIOC, 8 },
|
||||
[MICO_GPIO_3] = { GPIOC, 9 },
|
||||
[MICO_GPIO_4] = { GPIOC, 12 },
|
||||
[MICO_GPIO_5] = { GPIOC, 13 },
|
||||
[MICO_GPIO_6] = { GPIOC, 10 },
|
||||
[MICO_GPIO_7] = { GPIOC, 11 },
|
||||
[MICO_GPIO_8] = { GPIOD, 2 },
|
||||
// [MICO_GPIO_9]
|
||||
[MICO_GPIO_10] = { GPIOA, 4 },
|
||||
[MICO_GPIO_11] = { GPIOA, 7 },
|
||||
[MICO_GPIO_12] = { GPIOA, 6 },
|
||||
[MICO_GPIO_13] = { GPIOA, 5 },
|
||||
// [MICO_GPIO_14]
|
||||
[MICO_GPIO_15] = { GPIOB, 2 },
|
||||
[MICO_GPIO_16] = { GPIOB, 10 },
|
||||
[MICO_GPIO_17] = { GPIOB, 11 },
|
||||
[MICO_GPIO_18] = { GPIOC, 5 },
|
||||
[MICO_GPIO_19] = { GPIOC, 4 },
|
||||
[MICO_GPIO_20] = { GPIOC, 3 },
|
||||
[MICO_GPIO_21] = { GPIOC, 2 },
|
||||
[MICO_GPIO_22] = { GPIOC, 1 },
|
||||
[MICO_GPIO_23] = { GPIOC, 0 },
|
||||
};
|
||||
|
||||
/*
|
||||
* Possible compile time inputs:
|
||||
* - Set which ADC peripheral to use for each ADC. All on one ADC allows sequential conversion on all inputs. All on separate ADCs allows concurrent conversion.
|
||||
*/
|
||||
/* TODO : These need fixing */
|
||||
const platform_adc_t platform_adc_peripherals[] =
|
||||
{
|
||||
[MICO_ADC_1] = {ADC1, ADC_Channel_10, RCC_APB2Periph_ADC1, 1, &platform_gpio_pins[MICO_GPIO_23]},
|
||||
[MICO_ADC_2] = {ADC1, ADC_Channel_11, RCC_APB2Periph_ADC1, 1, &platform_gpio_pins[MICO_GPIO_22]},
|
||||
[MICO_ADC_3] = {ADC1, ADC_Channel_12, RCC_APB2Periph_ADC1, 1, &platform_gpio_pins[MICO_GPIO_21]},
|
||||
[MICO_ADC_4] = {ADC1, ADC_Channel_13, RCC_APB2Periph_ADC1, 1, &platform_gpio_pins[MICO_GPIO_20]},
|
||||
[MICO_ADC_5] = {ADC1, ADC_Channel_14, RCC_APB2Periph_ADC1, 1, &platform_gpio_pins[MICO_GPIO_19]},
|
||||
[MICO_ADC_6] = {ADC1, ADC_Channel_15, RCC_APB2Periph_ADC1, 1, &platform_gpio_pins[MICO_GPIO_18]},
|
||||
};
|
||||
|
||||
|
||||
/* PWM mappings */
|
||||
const platform_pwm_t platform_pwm_peripherals[] =
|
||||
{
|
||||
[MICO_PWM_1] = {TIM3, 4, RCC_APB1Periph_TIM3, GPIO_AF_TIM3, &platform_gpio_pins[MICO_GPIO_3]},
|
||||
/* TODO: fill in the other options here ... */
|
||||
};
|
||||
|
||||
const platform_spi_t platform_spi_peripherals[] =
|
||||
{
|
||||
[MICO_SPI_1] =
|
||||
{
|
||||
.port = SPI1,
|
||||
.gpio_af = GPIO_AF_SPI1,
|
||||
.peripheral_clock_reg = RCC_APB2Periph_SPI1,
|
||||
.peripheral_clock_func = RCC_APB2PeriphClockCmd,
|
||||
.pin_mosi = &platform_gpio_pins[MICO_GPIO_8],
|
||||
.pin_miso = &platform_gpio_pins[MICO_GPIO_7],
|
||||
.pin_clock = &platform_gpio_pins[MICO_GPIO_6],
|
||||
.tx_dma =
|
||||
{
|
||||
.controller = DMA2,
|
||||
.stream = DMA2_Stream5,
|
||||
.channel = DMA_Channel_3,
|
||||
.irq_vector = DMA2_Stream5_IRQn,
|
||||
.complete_flags = DMA_HISR_TCIF5,
|
||||
.error_flags = ( DMA_HISR_TEIF5 | DMA_HISR_FEIF5 | DMA_HISR_DMEIF5 ),
|
||||
},
|
||||
.rx_dma =
|
||||
{
|
||||
.controller = DMA2,
|
||||
.stream = DMA2_Stream0,
|
||||
.channel = DMA_Channel_3,
|
||||
.irq_vector = DMA2_Stream0_IRQn,
|
||||
.complete_flags = DMA_LISR_TCIF0,
|
||||
.error_flags = ( DMA_LISR_TEIF0 | DMA_LISR_FEIF0 | DMA_LISR_DMEIF0 ),
|
||||
},
|
||||
},
|
||||
[MICO_SPI_2] =
|
||||
{
|
||||
.port = SPI1,
|
||||
.gpio_af = GPIO_AF_SPI1,
|
||||
.peripheral_clock_reg = RCC_APB2Periph_SPI1,
|
||||
.peripheral_clock_func = RCC_APB2PeriphClockCmd,
|
||||
.pin_mosi = &platform_gpio_pins[FLASH_PIN_SPI_MOSI],
|
||||
.pin_miso = &platform_gpio_pins[FLASH_PIN_SPI_MISO],
|
||||
.pin_clock = &platform_gpio_pins[FLASH_PIN_SPI_CLK],
|
||||
.tx_dma =
|
||||
{
|
||||
.controller = DMA1,
|
||||
.stream = DMA1_Stream4,
|
||||
.channel = DMA_Channel_0,
|
||||
.irq_vector = DMA1_Stream4_IRQn,
|
||||
.complete_flags = DMA_HISR_TCIF4,
|
||||
.error_flags = ( DMA_HISR_TEIF4 | DMA_HISR_FEIF4 ),
|
||||
},
|
||||
.rx_dma =
|
||||
{
|
||||
.controller = DMA1,
|
||||
.stream = DMA1_Stream3,
|
||||
.channel = DMA_Channel_0,
|
||||
.irq_vector = DMA1_Stream3_IRQn,
|
||||
.complete_flags = DMA_LISR_TCIF3,
|
||||
.error_flags = ( DMA_LISR_TEIF3 | DMA_LISR_FEIF3 | DMA_LISR_DMEIF3 ),
|
||||
},
|
||||
}
|
||||
};
|
||||
|
||||
const platform_uart_t platform_uart_peripherals[] =
|
||||
{
|
||||
[MICO_UART_1] =
|
||||
{
|
||||
.port = USART1,
|
||||
.pin_tx = &platform_gpio_pins[STDIO_UART_TX],
|
||||
.pin_rx = &platform_gpio_pins[STDIO_UART_RX],
|
||||
.pin_cts = &platform_gpio_pins[STDIO_UART_CTS],
|
||||
.pin_rts = &platform_gpio_pins[STDIO_UART_RTS],
|
||||
.tx_dma_config =
|
||||
{
|
||||
.controller = DMA2,
|
||||
.stream = DMA2_Stream7,
|
||||
.channel = DMA_Channel_4,
|
||||
.irq_vector = DMA2_Stream7_IRQn,
|
||||
.complete_flags = DMA_HISR_TCIF7,
|
||||
.error_flags = ( DMA_HISR_TEIF7 | DMA_HISR_FEIF7 ),
|
||||
},
|
||||
.rx_dma_config =
|
||||
{
|
||||
.controller = DMA2,
|
||||
.stream = DMA2_Stream2,
|
||||
.channel = DMA_Channel_4,
|
||||
.irq_vector = DMA2_Stream2_IRQn,
|
||||
.complete_flags = DMA_LISR_TCIF2,
|
||||
.error_flags = ( DMA_LISR_TEIF2 | DMA_LISR_FEIF2 | DMA_LISR_DMEIF2 ),
|
||||
},
|
||||
},
|
||||
[MICO_UART_2] =
|
||||
{
|
||||
.port = USART6,
|
||||
.pin_tx = &platform_gpio_pins[MICO_GPIO_0],
|
||||
.pin_rx = &platform_gpio_pins[MICO_GPIO_1],
|
||||
.pin_cts = NULL,
|
||||
.pin_rts = NULL,
|
||||
.tx_dma_config =
|
||||
{
|
||||
.controller = DMA2,
|
||||
.stream = DMA2_Stream6,
|
||||
.channel = DMA_Channel_5,
|
||||
.irq_vector = DMA2_Stream6_IRQn,
|
||||
.complete_flags = DMA_HISR_TCIF6,
|
||||
.error_flags = ( DMA_HISR_TEIF6 | DMA_HISR_FEIF6 ),
|
||||
},
|
||||
.rx_dma_config =
|
||||
{
|
||||
.controller = DMA2,
|
||||
.stream = DMA2_Stream1,
|
||||
.channel = DMA_Channel_5,
|
||||
.irq_vector = DMA2_Stream1_IRQn,
|
||||
.complete_flags = DMA_LISR_TCIF1,
|
||||
.error_flags = ( DMA_LISR_TEIF1 | DMA_LISR_FEIF1 | DMA_LISR_DMEIF1 ),
|
||||
},
|
||||
},
|
||||
};
|
||||
platform_uart_driver_t platform_uart_drivers[MICO_UART_MAX];
|
||||
|
||||
|
||||
const platform_i2c_t platform_i2c_peripherals[] =
|
||||
{
|
||||
[MICO_I2C_1] =
|
||||
{
|
||||
.port = I2C2,
|
||||
.pin_scl = &platform_gpio_pins[MICO_GPIO_16],
|
||||
.pin_sda = &platform_gpio_pins[MICO_GPIO_17],
|
||||
.peripheral_clock_reg = RCC_APB1Periph_I2C2,
|
||||
.tx_dma = DMA1,
|
||||
.tx_dma_peripheral_clock = RCC_AHB1Periph_DMA1,
|
||||
.tx_dma_stream = DMA1_Stream7,
|
||||
.rx_dma_stream = DMA1_Stream5,
|
||||
.tx_dma_stream_id = 7,
|
||||
.rx_dma_stream_id = 5,
|
||||
.tx_dma_channel = DMA_Channel_1,
|
||||
.rx_dma_channel = DMA_Channel_1,
|
||||
.gpio_af = GPIO_AF_I2C2
|
||||
},
|
||||
};
|
||||
platform_i2c_driver_t platform_i2c_drivers[MICO_I2C_MAX];
|
||||
|
||||
platform_spi_driver_t platform_spi_drivers[MICO_SPI_MAX];
|
||||
|
||||
|
||||
const platform_flash_t platform_flash_peripherals[] =
|
||||
{
|
||||
[MICO_FLASH_EMBEDDED] =
|
||||
{
|
||||
.flash_type = FLASH_TYPE_EMBEDDED,
|
||||
.flash_start_addr = 0x08000000,
|
||||
.flash_length = 0x100000,
|
||||
},
|
||||
[MICO_FLASH_SPI] =
|
||||
{
|
||||
.flash_type = FLASH_TYPE_SPI,
|
||||
.flash_start_addr = 0x000000,
|
||||
.flash_length = 0x200000,
|
||||
},
|
||||
};
|
||||
|
||||
platform_flash_driver_t platform_flash_drivers[MICO_FLASH_MAX];
|
||||
|
||||
/* Logic partition on flash devices */
|
||||
const mico_logic_partition_t mico_partitions[] =
|
||||
{
|
||||
[MICO_PARTITION_BOOTLOADER] =
|
||||
{
|
||||
.partition_owner = MICO_FLASH_EMBEDDED,
|
||||
.partition_description = "Bootloader",
|
||||
.partition_start_addr = 0x08000000,
|
||||
.partition_length = 0x8000, //16k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
|
||||
},
|
||||
[MICO_PARTITION_APPLICATION] =
|
||||
{
|
||||
.partition_owner = MICO_FLASH_EMBEDDED,
|
||||
.partition_description = "Application",
|
||||
.partition_start_addr = 0x08008000,
|
||||
.partition_length = 0xF8000, //992k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
|
||||
},
|
||||
[MICO_PARTITION_RF_FIRMWARE] =
|
||||
{
|
||||
.partition_owner = MICO_FLASH_SPI,
|
||||
.partition_description = "RF Firmware",
|
||||
.partition_start_addr = 0x2000,
|
||||
.partition_length = 0x4D000, //308k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
|
||||
},
|
||||
[MICO_PARTITION_OTA_TEMP] =
|
||||
{
|
||||
.partition_owner = MICO_FLASH_SPI,
|
||||
.partition_description = "OTA Storage",
|
||||
.partition_start_addr = 0x00050000,
|
||||
.partition_length = 0x100000, //1Mbytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[MICO_PARTITION_PARAMETER_1] =
|
||||
{
|
||||
.partition_owner = MICO_FLASH_SPI,
|
||||
.partition_description = "PARAMETER1",
|
||||
.partition_start_addr = 0x0,
|
||||
.partition_length = 0x1000, // 4k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[MICO_PARTITION_PARAMETER_2] =
|
||||
{
|
||||
.partition_owner = MICO_FLASH_SPI,
|
||||
.partition_description = "PARAMETER1",
|
||||
.partition_start_addr = 0x1000,
|
||||
.partition_length = 0x1000, //4k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[MICO_PARTITION_ATE] =
|
||||
{
|
||||
.partition_owner = MICO_FLASH_NONE,
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#if defined ( USE_MICO_SPI_FLASH )
|
||||
const mico_spi_device_t mico_spi_flash =
|
||||
{
|
||||
.port = MICO_SPI_2,
|
||||
.chip_select = FLASH_PIN_SPI_CS,
|
||||
.speed = 40000000,
|
||||
.mode = (SPI_CLOCK_RISING_EDGE | SPI_CLOCK_IDLE_HIGH | SPI_NO_DMA | SPI_MSB_FIRST),
|
||||
.bits = 8
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
/* Wi-Fi control pins. Used by platform/MCU/wlan_platform_common.c
|
||||
* SDIO: EMW1062_PIN_BOOTSTRAP[1:0] = b'00
|
||||
* gSPI: EMW1062_PIN_BOOTSTRAP[1:0] = b'01
|
||||
*/
|
||||
const platform_gpio_t wifi_control_pins[] =
|
||||
{
|
||||
[WIFI_PIN_RESET ] = { GPIOA, 3 },
|
||||
#if defined ( MICO_USE_WIFI_32K_CLOCK_MCO )
|
||||
[WIFI_PIN_32K_CLK ] = { GPIOA, 8 },
|
||||
#else
|
||||
[WIFI_PIN_32K_CLK ] = { GPIOA, 8 },
|
||||
#endif
|
||||
[WIFI_PIN_BOOTSTRAP_0] = { GPIOB, 5 },
|
||||
[WIFI_PIN_BOOTSTRAP_1] = { GPIOA, 2 },
|
||||
};
|
||||
|
||||
/* Wi-Fi gSPI bus pins. Used by platform/MCU/STM32F2xx/EMW1062_driver/wlan_spi.c */
|
||||
const platform_gpio_t wifi_spi_pins[] =
|
||||
{
|
||||
[WIFI_PIN_SPI_IRQ ] = { GPIOA, 1 },
|
||||
[WIFI_PIN_SPI_CS ] = { GPIOB, 12 },
|
||||
[WIFI_PIN_SPI_CLK ] = { GPIOB, 13 },
|
||||
[WIFI_PIN_SPI_MOSI] = { GPIOB, 15 },
|
||||
[WIFI_PIN_SPI_MISO] = { GPIOB, 14 },
|
||||
};
|
||||
|
||||
const platform_spi_t wifi_spi =
|
||||
{
|
||||
.port = SPI2,
|
||||
.gpio_af = GPIO_AF_SPI2,
|
||||
.peripheral_clock_reg = RCC_APB1Periph_SPI2,
|
||||
.peripheral_clock_func = RCC_APB1PeriphClockCmd,
|
||||
.pin_mosi = &wifi_spi_pins[WIFI_PIN_SPI_MOSI],
|
||||
.pin_miso = &wifi_spi_pins[WIFI_PIN_SPI_MISO],
|
||||
.pin_clock = &wifi_spi_pins[WIFI_PIN_SPI_CLK],
|
||||
.tx_dma =
|
||||
{
|
||||
.controller = DMA1,
|
||||
.stream = DMA1_Stream4,
|
||||
.channel = DMA_Channel_0,
|
||||
.irq_vector = DMA1_Stream4_IRQn,
|
||||
.complete_flags = DMA_HISR_TCIF4,
|
||||
.error_flags = ( DMA_HISR_TEIF4 | DMA_HISR_FEIF4 ),
|
||||
},
|
||||
.rx_dma =
|
||||
{
|
||||
.controller = DMA1,
|
||||
.stream = DMA1_Stream3,
|
||||
.channel = DMA_Channel_0,
|
||||
.irq_vector = DMA1_Stream3_IRQn,
|
||||
.complete_flags = DMA_LISR_TCIF3,
|
||||
.error_flags = ( DMA_LISR_TEIF3 | DMA_LISR_FEIF3 | DMA_LISR_DMEIF3 ),
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
|
||||
/******************************************************
|
||||
* Interrupt Handler Definitions
|
||||
******************************************************/
|
||||
#ifndef MICO_NO_WIFI
|
||||
MICO_RTOS_DEFINE_ISR( DMA1_Stream3_IRQHandler )
|
||||
{
|
||||
platform_wifi_spi_rx_dma_irq( );
|
||||
}
|
||||
#endif
|
||||
|
||||
MICO_RTOS_DEFINE_ISR( USART1_IRQHandler )
|
||||
{
|
||||
platform_uart_irq( &platform_uart_drivers[MICO_UART_1] );
|
||||
}
|
||||
|
||||
MICO_RTOS_DEFINE_ISR( USART6_IRQHandler )
|
||||
{
|
||||
platform_uart_irq( &platform_uart_drivers[MICO_UART_2] );
|
||||
}
|
||||
|
||||
MICO_RTOS_DEFINE_ISR( DMA2_Stream7_IRQHandler )
|
||||
{
|
||||
platform_uart_tx_dma_irq( &platform_uart_drivers[MICO_UART_1] );
|
||||
}
|
||||
|
||||
MICO_RTOS_DEFINE_ISR( DMA2_Stream6_IRQHandler )
|
||||
{
|
||||
platform_uart_tx_dma_irq( &platform_uart_drivers[MICO_UART_2] );
|
||||
}
|
||||
|
||||
MICO_RTOS_DEFINE_ISR( DMA2_Stream2_IRQHandler )
|
||||
{
|
||||
platform_uart_rx_dma_irq( &platform_uart_drivers[MICO_UART_1] );
|
||||
}
|
||||
|
||||
MICO_RTOS_DEFINE_ISR( DMA2_Stream1_IRQHandler )
|
||||
{
|
||||
platform_uart_rx_dma_irq( &platform_uart_drivers[MICO_UART_2] );
|
||||
}
|
||||
|
||||
|
||||
/******************************************************
|
||||
* Function Definitions
|
||||
******************************************************/
|
||||
|
||||
static void _button_EL_irq_handler( void* arg )
|
||||
{
|
||||
(void)(arg);
|
||||
int interval = -1;
|
||||
|
||||
if ( MicoGpioInputGet( (mico_gpio_t)EasyLink_BUTTON ) == 0 ) {
|
||||
_default_start_time = mico_rtos_get_time()+1;
|
||||
mico_start_timer(&_button_EL_timer);
|
||||
} else {
|
||||
interval = mico_rtos_get_time() + 1 - _default_start_time;
|
||||
if ( (_default_start_time != 0) && interval > 50 && interval < RestoreDefault_TimeOut){
|
||||
/* EasyLink button clicked once */
|
||||
PlatformEasyLinkButtonClickedCallback();
|
||||
}
|
||||
mico_stop_timer(&_button_EL_timer);
|
||||
_default_start_time = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void _button_STANDBY_irq_handler( void* arg )
|
||||
{
|
||||
(void)(arg);
|
||||
PlatformStandbyButtonClickedCallback();
|
||||
}
|
||||
|
||||
static void _button_EL_Timeout_handler( void* arg )
|
||||
{
|
||||
(void)(arg);
|
||||
_default_start_time = 0;
|
||||
PlatformEasyLinkButtonLongPressedCallback();
|
||||
}
|
||||
|
||||
void platform_init_peripheral_irq_priorities( void )
|
||||
{
|
||||
/* Interrupt priority setup. Called by MiCO/platform/MCU/STM32F2xx/platform_init.c */
|
||||
NVIC_SetPriority( RTC_WKUP_IRQn , 1 ); /* RTC Wake-up event */
|
||||
NVIC_SetPriority( SDIO_IRQn , 2 ); /* WLAN SDIO */
|
||||
NVIC_SetPriority( DMA2_Stream3_IRQn, 3 ); /* WLAN SDIO DMA */
|
||||
NVIC_SetPriority( DMA1_Stream3_IRQn, 3 ); /* WLAN SPI DMA */
|
||||
NVIC_SetPriority( USART1_IRQn , 6 ); /* MICO_UART_1 */
|
||||
NVIC_SetPriority( USART6_IRQn , 6 ); /* MICO_UART_2 */
|
||||
NVIC_SetPriority( DMA2_Stream7_IRQn, 7 ); /* MICO_UART_1 TX DMA */
|
||||
NVIC_SetPriority( DMA2_Stream2_IRQn, 7 ); /* MICO_UART_1 RX DMA */
|
||||
NVIC_SetPriority( DMA2_Stream6_IRQn, 7 ); /* MICO_UART_2 TX DMA */
|
||||
NVIC_SetPriority( DMA2_Stream1_IRQn, 7 ); /* MICO_UART_2 RX DMA */
|
||||
NVIC_SetPriority( EXTI0_IRQn , 14 ); /* GPIO */
|
||||
NVIC_SetPriority( EXTI1_IRQn , 14 ); /* GPIO */
|
||||
NVIC_SetPriority( EXTI2_IRQn , 14 ); /* GPIO */
|
||||
NVIC_SetPriority( EXTI3_IRQn , 14 ); /* GPIO */
|
||||
NVIC_SetPriority( EXTI4_IRQn , 14 ); /* GPIO */
|
||||
NVIC_SetPriority( EXTI9_5_IRQn , 14 ); /* GPIO */
|
||||
NVIC_SetPriority( EXTI15_10_IRQn , 14 ); /* GPIO */
|
||||
}
|
||||
|
||||
void init_platform( void )
|
||||
{
|
||||
MicoGpioInitialize( (mico_gpio_t)MICO_SYS_LED, OUTPUT_PUSH_PULL );
|
||||
MicoGpioOutputHigh( (mico_gpio_t)MICO_SYS_LED );
|
||||
MicoGpioInitialize( (mico_gpio_t)MICO_RF_LED, OUTPUT_OPEN_DRAIN_NO_PULL );
|
||||
MicoGpioOutputHigh( (mico_gpio_t)MICO_RF_LED );
|
||||
|
||||
// Initialise EasyLink buttons
|
||||
MicoGpioInitialize( (mico_gpio_t)EasyLink_BUTTON, INPUT_PULL_UP );
|
||||
mico_init_timer(&_button_EL_timer, RestoreDefault_TimeOut, _button_EL_Timeout_handler, NULL);
|
||||
MicoGpioEnableIRQ( (mico_gpio_t)EasyLink_BUTTON, IRQ_TRIGGER_BOTH_EDGES, _button_EL_irq_handler, NULL );
|
||||
|
||||
// Initialise Standby/wakeup switcher
|
||||
MicoGpioInitialize( (mico_gpio_t)Standby_SEL, INPUT_PULL_UP );
|
||||
MicoGpioEnableIRQ( (mico_gpio_t)Standby_SEL , IRQ_TRIGGER_FALLING_EDGE, _button_STANDBY_irq_handler, NULL);
|
||||
}
|
||||
|
||||
void init_platform_bootloader( void )
|
||||
{
|
||||
MicoGpioInitialize( (mico_gpio_t)MICO_SYS_LED, OUTPUT_PUSH_PULL );
|
||||
MicoGpioOutputHigh( (mico_gpio_t)MICO_SYS_LED );
|
||||
MicoGpioInitialize( (mico_gpio_t)MICO_RF_LED, OUTPUT_OPEN_DRAIN_NO_PULL );
|
||||
MicoGpioOutputHigh( (mico_gpio_t)MICO_RF_LED );
|
||||
|
||||
MicoGpioInitialize(BOOT_SEL, INPUT_PULL_UP);
|
||||
MicoGpioInitialize(MFG_SEL, INPUT_PULL_UP);
|
||||
}
|
||||
|
||||
void MicoSysLed(bool onoff)
|
||||
{
|
||||
if (onoff) {
|
||||
MicoGpioOutputLow( (mico_gpio_t)MICO_SYS_LED );
|
||||
} else {
|
||||
MicoGpioOutputHigh( (mico_gpio_t)MICO_SYS_LED );
|
||||
}
|
||||
}
|
||||
|
||||
void MicoRfLed(bool onoff)
|
||||
{
|
||||
if (onoff) {
|
||||
MicoGpioOutputLow( (mico_gpio_t)MICO_RF_LED );
|
||||
} else {
|
||||
MicoGpioOutputHigh( (mico_gpio_t)MICO_RF_LED );
|
||||
}
|
||||
}
|
||||
|
||||
bool MicoShouldEnterMFGMode(void)
|
||||
{
|
||||
if(MicoGpioInputGet((mico_gpio_t)BOOT_SEL)==false && MicoGpioInputGet((mico_gpio_t)MFG_SEL)==false)
|
||||
return true;
|
||||
else
|
||||
return false;
|
||||
}
|
||||
|
||||
bool MicoShouldEnterBootloader(void)
|
||||
{
|
||||
if(MicoGpioInputGet((mico_gpio_t)BOOT_SEL)==false && MicoGpioInputGet((mico_gpio_t)MFG_SEL)==true)
|
||||
return true;
|
||||
else
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
340
mico-os/board/MKF205/platform.h
Normal file
340
mico-os/board/MKF205/platform.h
Normal file
@@ -0,0 +1,340 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file platform.h
|
||||
* @author William Xu
|
||||
* @version V1.0.0
|
||||
* @date 05-May-2014
|
||||
* @brief This file provides all MICO Peripherals defined for current platform.
|
||||
******************************************************************************
|
||||
*
|
||||
* The MIT License
|
||||
* Copyright (c) 2014 MXCHIP Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
|
||||
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __PLATFORM_H__
|
||||
#define __PLATFORM_H__
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/******************************************************
|
||||
* Macros
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Constants
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Enumerations
|
||||
******************************************************/
|
||||
|
||||
/*
|
||||
MICO-EVB-1 platform pin definitions ...
|
||||
+-------------------------------------------------------------------------+
|
||||
| Enum ID |Pin | STM32| Peripheral | Board | Peripheral |
|
||||
| | # | Port | Available | Connection | Alias |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_0 | 0 | C 6 | GPIO | | MICO_UART_2_TX |
|
||||
| | | | TIM8_CH1 | | |
|
||||
| | | | I2S2_MCK | | |
|
||||
| | | | USART6_TX | | |
|
||||
| | | | TIM3_CH1 | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_1 | 1 | C 7 | GPIO | | MICO_UART_2_RX |
|
||||
| | | | I2S2_MCK | | |
|
||||
| | | | TIM8_CH2 | | |
|
||||
| | | | SDIO_D7 | | |
|
||||
| | | | USART6_RX | | |
|
||||
| | | | TIM3_CH2 | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_2 | 2 | C 8 | GPIO | | |
|
||||
| | | | TIM8_CH3 | | |
|
||||
| | | | SDIO_D0 | | |
|
||||
| | | | TIM3_CH3 | | |
|
||||
| | | | USART6_CK | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_3 | 3 | C 9 | GPIO | | MICO_PWM_1 |
|
||||
| | | | I2S2_CKIN | | |
|
||||
| | | | TIM8_CH4 | | |
|
||||
| | | | SDIO_D1 | | |
|
||||
| | | | I2C3_SDA | | |
|
||||
| | | | TIM3_CH4 | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_4 | 4 | C 12| GPIO | | |
|
||||
| | | | UART5_TX | | |
|
||||
| | | | SDIO_CK | | |
|
||||
| | | | SPI3_MOSI | | |
|
||||
| | | | I2S3_SD | | |
|
||||
| | | | UART3_CK | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_5 | 5 | C 13| GPIO | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_6 | 6 | C 10| GPIO | | |
|
||||
| | | | SPI3_SCK | | |
|
||||
| | | | I2S3_SCK | | |
|
||||
| | | | UART4_TX | | |
|
||||
| | | | SDIO_D2 | | |
|
||||
| | | | UART3_TX | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_7 | 7 | C 11| GPIO | | |
|
||||
| | | | UART4_RX | | |
|
||||
| | | | SPI3_MISO | | |
|
||||
| | | | SDIO_D3 | | |
|
||||
| | | | UART3_RX | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| MICO_GPIO_8 | 8 | D 2 | GPIO | | |
|
||||
| | | | TIM3_ETR | | |
|
||||
| | | | USART5_RX | | |
|
||||
| | | | SDIO_CMD | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| | 9 | BOOT | | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_10 | 10 | A 4 | GPIO | | MICO_SPI_1_NSS |
|
||||
| | | | SPI1_NSS | | |
|
||||
| | | | SPI3_NSS | | |
|
||||
| | | | USART2_CK | | |
|
||||
| | | | I2S3_WS | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_11 | 11 | A 7 | GPIO | | MICO_SPI_1_MOSI|
|
||||
| | | | SPI1_MOSI | | |
|
||||
| | | | TIM8_CH1N | | |
|
||||
| | | | TIM14_CH1 | | |
|
||||
| | | | TIM3_CH2 | | |
|
||||
| | | | TIM1_CH1N | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_12 | 12 | A 6 | GPIO | | MICO_SPI_1_MISO|
|
||||
| | | | SPI1_MISO | | |
|
||||
| | | | TIM8_BKIN | | |
|
||||
| | | | TIM13_CH1 | | |
|
||||
| | | | TIM1_BKIN | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_13 | 13 | A 5 | GPIO | | MICO_SPI_1_CLK |
|
||||
| | | | SPI1_CLK | | |
|
||||
| | | | TIM2_CH1_ETR| | |
|
||||
| | | | TIM8_CH1N | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| | 14 | GND | | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_15 | 15 | B 2 | GPIO | | |
|
||||
| | | | TIM4_CH4 | | |
|
||||
| | | | TIM11_CH1 | | |
|
||||
| | | | I2C1_SDA | | |
|
||||
| | | | CAN1_TX | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_16 | 16 | B 10| GPIO | | MICO_I2C_1_SCL |
|
||||
| | | | SPI2_SCK | | |
|
||||
| | | | I2S2_SCK | | |
|
||||
| | | | I2C2_SCL | | |
|
||||
| | | | USART3_TX | | |
|
||||
| | | | TIM2_CH3 | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_17 | 17 | B 11| GPIO | | MICO_I2C_1_SDA |
|
||||
| | | | I2C2_SDA | | |
|
||||
| | | | USART3_RX | | |
|
||||
| | | | TIM2_CH4 | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_18 | 18 | C 5 | GPIO | | MICO_ADC_6 |
|
||||
| | | | ADC123_IN15 | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_19 | 19 | C 4 | GPIO | | MICO_ADC_5 |
|
||||
| | | | ADC123_IN14 | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_20 | 20 | C 3 | GPIO | | MICO_ADC_4 |
|
||||
| | | | SPI2_MOSI | | |
|
||||
| | | | ADC123_IN13 | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_21 | 21 | C 2 | GPIO | | MICO_ADC_3 |
|
||||
| | | | SPI2_MISO | | |
|
||||
| | | | ADC123_IN12 | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_22 | 22 | C 1 | GPIO | | MICO_ADC_2 |
|
||||
| | | | ADC123_IN11 | | |
|
||||
+---------------+----+------+-------------+--------------+----------------+
|
||||
| MICO_GPIO_23 | 23 | C 0 | GPIO | | MICO_ADC_1 |
|
||||
| | | | ADC123_IN10 | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| | 24 | - | | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| | 25 | GND | | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| | 26 | GND | | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| | 27 | VDD | 5V | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| | 28 | VDD | 3.3V | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| | 29 | RESET| | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| | 30 | VDD | 5V | | |
|
||||
|---------------+----+------+-------------+--------------+----------------|
|
||||
| | 31 | - | | | |
|
||||
|-------------------------------------------------------------------------|
|
||||
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_SYS_LED,
|
||||
MICO_RF_LED,
|
||||
BOOT_SEL,
|
||||
MFG_SEL,
|
||||
Standby_SEL,
|
||||
EasyLink_BUTTON,
|
||||
STDIO_UART_RX,
|
||||
STDIO_UART_TX,
|
||||
STDIO_UART_CTS,
|
||||
STDIO_UART_RTS,
|
||||
FLASH_PIN_SPI_CS,
|
||||
FLASH_PIN_SPI_CLK,
|
||||
FLASH_PIN_SPI_MOSI,
|
||||
FLASH_PIN_SPI_MISO,
|
||||
|
||||
MICO_GPIO_0,
|
||||
MICO_GPIO_1,
|
||||
MICO_GPIO_2,
|
||||
MICO_GPIO_3,
|
||||
MICO_GPIO_4,
|
||||
MICO_GPIO_5,
|
||||
MICO_GPIO_6,
|
||||
MICO_GPIO_7,
|
||||
MICO_GPIO_8,
|
||||
// MICO_GPIO_9, BOOT
|
||||
MICO_GPIO_10,
|
||||
MICO_GPIO_11,
|
||||
MICO_GPIO_12,
|
||||
MICO_GPIO_13,
|
||||
// MICO_GPIO_14, GND
|
||||
MICO_GPIO_15,
|
||||
MICO_GPIO_16,
|
||||
MICO_GPIO_17,
|
||||
MICO_GPIO_18,
|
||||
MICO_GPIO_19,
|
||||
MICO_GPIO_20,
|
||||
MICO_GPIO_21,
|
||||
MICO_GPIO_22,
|
||||
MICO_GPIO_23,
|
||||
// MICO_GPIO_24
|
||||
// MICO_GPIO_25,
|
||||
// MICO_GPIO_26,
|
||||
// MICO_GPIO_27,
|
||||
// MICO_GPIO_28,
|
||||
// MICO_GPIO_29,
|
||||
// MICO_GPIO_30,
|
||||
// MICO_GPIO_31,
|
||||
MICO_GPIO_MAX, /* Denotes the total number of GPIO port aliases. Not a valid GPIO alias */
|
||||
MICO_GPIO_NONE,
|
||||
} mico_gpio_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_SPI_1,
|
||||
MICO_SPI_2,
|
||||
MICO_SPI_MAX, /* Denotes the total number of SPI port aliases. Not a valid SPI alias */
|
||||
MICO_SPI_NONE,
|
||||
} mico_spi_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_I2C_1,
|
||||
MICO_I2C_MAX, /* Denotes the total number of I2C port aliases. Not a valid I2C alias */
|
||||
MICO_I2C_NONE,
|
||||
} mico_i2c_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_IIS_MAX, /* Denotes the total number of IIS port aliases. Not a valid IIS alias */
|
||||
MICO_IIS_NONE,
|
||||
} mico_iis_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_PWM_1,
|
||||
MICO_PWM_2,
|
||||
MICO_PWM_3,
|
||||
MICO_PWM_MAX, /* Denotes the total number of PWM port aliases. Not a valid PWM alias */
|
||||
MICO_PWM_NONE,
|
||||
} mico_pwm_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_ADC_1,
|
||||
MICO_ADC_2,
|
||||
MICO_ADC_3,
|
||||
MICO_ADC_4,
|
||||
MICO_ADC_5,
|
||||
MICO_ADC_6,
|
||||
MICO_ADC_MAX, /* Denotes the total number of ADC port aliases. Not a valid ADC alias */
|
||||
MICO_ADC_NONE,
|
||||
} mico_adc_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_UART_1,
|
||||
MICO_UART_2,
|
||||
MICO_UART_MAX, /* Denotes the total number of UART port aliases. Not a valid UART alias */
|
||||
MICO_UART_NONE,
|
||||
} mico_uart_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_FLASH_EMBEDDED,
|
||||
MICO_FLASH_SPI,
|
||||
MICO_FLASH_MAX,
|
||||
MICO_FLASH_NONE,
|
||||
} mico_flash_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_PARTITION_USER_MAX
|
||||
} mico_user_partition_t;
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
#define STDIO_UART MICO_UART_1
|
||||
#define STDIO_UART_BAUDRATE (115200)
|
||||
#else
|
||||
#define STDIO_UART MICO_UART_1
|
||||
#define STDIO_UART_BAUDRATE (115200)
|
||||
#endif
|
||||
|
||||
#define UART_FOR_APP MICO_UART_2
|
||||
#define MFG_TEST MICO_UART_1
|
||||
#define CLI_UART MICO_UART_1
|
||||
|
||||
#define USE_MICO_SPI_FLASH
|
||||
//#define SFLASH_SUPPORT_MACRONIX_PARTS
|
||||
//#define SFLASH_SUPPORT_SST_PARTS
|
||||
#define SFLASH_SUPPORT_WINBOND_PARTS
|
||||
|
||||
/* I/O connection <-> Peripheral Connections */
|
||||
#define MICO_I2C_CP (MICO_I2C_1)
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /*extern "C" */
|
||||
#endif
|
||||
|
||||
#endif // __PLATFORM__H__
|
||||
|
||||
155
mico-os/board/MKF205/platform_config.h
Normal file
155
mico-os/board/MKF205/platform_config.h
Normal file
@@ -0,0 +1,155 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file platform_config.h
|
||||
* @author William Xu
|
||||
* @version V1.0.0
|
||||
* @date 05-May-2014
|
||||
* @brief This file provides common configuration for current platform.
|
||||
******************************************************************************
|
||||
*
|
||||
* The MIT License
|
||||
* Copyright (c) 2014 MXCHIP Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
|
||||
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __PLATFORM_CONFIG_H__
|
||||
#define __PLATFORM_CONFIG_H__
|
||||
|
||||
#pragma once
|
||||
|
||||
/******************************************************
|
||||
* Macros
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Constants
|
||||
******************************************************/
|
||||
|
||||
#define HARDWARE_REVISION "MKF205_1"
|
||||
#define DEFAULT_NAME "MiCOKit F205"
|
||||
#define MODEL "MiCOKit-205"
|
||||
|
||||
/* MICO RTOS tick rate in Hz */
|
||||
#define MICO_DEFAULT_TICK_RATE_HZ (1000)
|
||||
/************************************************************************
|
||||
* Uncomment to disable watchdog. For debugging only */
|
||||
//#define MICO_DISABLE_WATCHDOG
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to disable standard IO, i.e. printf(), etc. */
|
||||
//#define MICO_DISABLE_STDIO
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to disable MCU powersave API functions */
|
||||
//#define MICO_DISABLE_MCU_POWERSAVE
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable MCU real time clock */
|
||||
#define MICO_ENABLE_MCU_RTC
|
||||
|
||||
/************************************************************************
|
||||
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
|
||||
#define RestoreDefault_TimeOut (3000)
|
||||
|
||||
/************************************************************************
|
||||
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
|
||||
#define MCU_CLOCK_HZ (120000000)
|
||||
|
||||
/************************************************************************
|
||||
* How many bits are used in NVIC priority configuration */
|
||||
#define CORTEX_NVIC_PRIO_BITS (4)
|
||||
|
||||
/************************************************************************
|
||||
* Enable write protection to write-disabled embedded flash sectors */
|
||||
//#define MCU_EBANLE_FLASH_PROTECT
|
||||
|
||||
#define HSE_SOURCE RCC_HSE_ON /* Use external crystal */
|
||||
#define AHB_CLOCK_DIVIDER RCC_SYSCLK_Div1 /* AHB clock = System clock */
|
||||
#define APB1_CLOCK_DIVIDER RCC_HCLK_Div4 /* APB1 clock = AHB clock / 4 */
|
||||
#define APB2_CLOCK_DIVIDER RCC_HCLK_Div2 /* APB2 clock = AHB clock / 2 */
|
||||
#define PLL_SOURCE RCC_PLLSource_HSE /* PLL source = external crystal */
|
||||
#define PLL_M_CONSTANT 26 /* PLLM = 26 */
|
||||
#define PLL_N_CONSTANT 240 /* PLLN = 240 */
|
||||
#define PLL_P_CONSTANT 2 /* PLLP = 2 */
|
||||
#define PPL_Q_CONSTANT 5 /* PLLQ = 5 */
|
||||
#define SYSTEM_CLOCK_SOURCE RCC_SYSCLKSource_PLLCLK /* System clock source = PLL clock */
|
||||
#define SYSTICK_CLOCK_SOURCE SysTick_CLKSource_HCLK /* SysTick clock source = AHB clock */
|
||||
#define INT_FLASH_WAIT_STATE FLASH_Latency_3 /* Internal flash wait state = 3 cycles */
|
||||
|
||||
/******************************************************
|
||||
* EMW1062 Options
|
||||
******************************************************/
|
||||
/* Wi-Fi chip module */
|
||||
#define EMW1062
|
||||
|
||||
/* GPIO pins are used to bootstrap Wi-Fi to SDIO or gSPI mode */
|
||||
#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP
|
||||
|
||||
/* Wi-Fi GPIO0 pin is used for out-of-band interrupt */
|
||||
#define MICO_WIFI_OOB_IRQ_GPIO_PIN ( 0 )
|
||||
|
||||
/* Wi-Fi power pin is present */
|
||||
//#define MICO_USE_WIFI_POWER_PIN
|
||||
|
||||
/* Wi-Fi reset pin is present */
|
||||
#define MICO_USE_WIFI_RESET_PIN
|
||||
|
||||
/* Wi-Fi 32K pin is present */
|
||||
#define MICO_USE_WIFI_32K_PIN
|
||||
|
||||
/* USE SDIO 1bit mode */
|
||||
//#define SDIO_1_BIT
|
||||
|
||||
/* Wi-Fi power pin is active high */
|
||||
//#define MICO_USE_WIFI_POWER_PIN_ACTIVE_HIGH
|
||||
|
||||
/* WLAN Powersave Clock Source
|
||||
* The WLAN sleep clock can be driven from one of two sources:
|
||||
* 1. MCO (MCU Clock Output) - default
|
||||
* NOTE: Versions of BCM943362WCD4 up to and including P200 require a hardware patch to enable this mode
|
||||
* - Connect STM32F205RGT6 pin 41 (PA8) to pin 44 (PA11)
|
||||
* 2. WLAN 32K internal oscillator (30% inaccuracy)
|
||||
* - Comment the following directive : MICO_USE_WIFI_32K_CLOCK_MCO
|
||||
*/
|
||||
#define MICO_USE_WIFI_32K_CLOCK_MCO
|
||||
|
||||
//#define MICO_USE_BUILTIN_RF_DRIVER
|
||||
|
||||
/******************************************************
|
||||
* Enumerations
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Type Definitions
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Structures
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Global Variables
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Function Declarations
|
||||
******************************************************/
|
||||
|
||||
#endif // __PLATFORM_CONFIG_H__
|
||||
Reference in New Issue
Block a user