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修改了Web后台的部分界面，增加了HAmqtt中的总电量传感器，后台新增mqtt上报频率设置

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OOP
2025-03-03 21:49:41 +08:00
parent e1e00b60ce
commit 9f9d4c7a56
4468 changed files with 1473046 additions and 10728 deletions
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81
mico-os/board/MK3239/MK3239.mk Normal file
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###############################################################################
#
# The MIT License
# Copyright (c) 2016 MXCHIP Inc.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is furnished
# to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
# IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
###############################################################################
NAME := Board_MiCOKit_3239
MODULE := 3239
WLAN_CHIP := 43438
WLAN_CHIP_REVISION := A1
WLAN_CHIP_FAMILY := 4343x
WLAN_CHIP_FIRMWARE_VER := 7.45.45.17
BT_CHIP := 43438
BT_CHIP_REVISION := A1
BT_CHIP_XTAL_FREQUENCY := 26MHz
HOST_MCU_FAMILY := STM32F4xx
HOST_MCU_VARIANT := STM32F412
HOST_MCU_PART_NUMBER := STM32F412RGT6
BUS := SDIO
VALID_BUSES := SDIO
# Extra build target in mico_standard_targets.mk, include bootloader, and copy output file to eclipse debug file (copy_output_for_eclipse)
EXTRA_TARGET_MAKEFILES += $(MAKEFILES_PATH)/mico_standard_targets.mk
# Global includes
GLOBAL_INCLUDES := .
# Global defines
# HSE_VALUE = STM32 crystal frequency = 26MHz (needed to make UART work correctly)
GLOBAL_DEFINES += HSE_VALUE=26000000
GLOBAL_DEFINES += $$(if $$(NO_CRLF_STDIO_REPLACEMENT),,CRLF_STDIO_REPLACEMENT)
GLOBAL_LDFLAGS += -L $(MICO_OS_PATH)/board/MK$(MODULE)
# Components
$(NAME)_COMPONENTS += drivers/spi_flash
$(NAME)_COMPONENTS += drivers/keypad/gpio_button
$(NAME)_COMPONENTS += drivers/MiCOKit_EXT
# Source files
$(NAME)_SOURCES := platform.c \
wifi_nvram.c
$(NAME)_LINK_FILES := wifi_nvram.o
ifndef NO_WIFI_FIRMWARE
WIFI_FIRMWARE := $(MICO_OS_PATH)/resources/wifi_firmware/$(WLAN_CHIP)/$(WLAN_CHIP)$(WLAN_CHIP_REVISION)$(WLAN_CHIP_BIN_TYPE)-$(WLAN_CHIP_FIRMWARE_VER).bin
endif
#ifndef NO_BT_PATCH_IMAGE
#BT_PATCH := $(MICO_OS_PATH)/resources/bt_patch/$(BT_CHIP)/$(BT_CHIP)$(BT_CHIP_REVISION).bin
#endif
WIFI_FIRMWARE_SECTOR_START := 2 #0x2000
BT_PATCH_SECTOR_START := 256 #0x100000

39
mico-os/board/MK3239/bootloaderLinkerForIAR.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20080000;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_heap__ = 0x100;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define symbol RAM_intvec_start = 0x20000000;
initialize by copy { readonly, readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
"RAM_intvec_start":
place at address mem:RAM_intvec_start { section .intvec_RAM };
"ROM_region":
place in ROM_region { readonly };
"RAM_region":
place in RAM_region { readwrite,
block CSTACK, block HEAP };

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mico-os/board/MK3239/flash_prog.elf Normal file
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50
mico-os/board/MK3239/gen_standard_images.mk Normal file
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###############################################################################
#
# The MIT License
# Copyright (c) 2016 MXCHIP Inc.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is furnished
# to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
# IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
###############################################################################
EXTRA_POST_BUILD_TARGETS += gen_standard_images
#bootloader
BOOT_BIN_FILE := $(BOOTLOADER_OUTFILE_BIN)
BOOT_OFFSET := 0x0
#application
APP_BIN_FILE :=$(BIN_OUTPUT_FILE)
APP_OFFSET:= 0x8000
#ate firmware
ATE_BIN_FILE := $(MICO_OS_PATH)/resources/ate_firmware/3165/ate.bin
ATE_OFFSET:= 0x100000
#wifi firmware
# Required to build Full binary file
GEN_COMMON_BIN_OUTPUT_FILE_SCRIPT:= $(SCRIPTS_PATH)/gen_common_bin_output_file.py
MOC_ALL_BIN_OUTPUT_FILE :=$(LINK_OUTPUT_FILE:$(LINK_OUTPUT_SUFFIX)=.all$(BIN_OUTPUT_SUFFIX))
gen_standard_images: build_done
$(QUIET)$(ECHO) Generate Standard Flash Images: $(MOC_ALL_BIN_OUTPUT_FILE)
$(QUIET)$(RM) $(MOC_ALL_BIN_OUTPUT_FILE)
$(PYTHON) $(GEN_COMMON_BIN_OUTPUT_FILE_SCRIPT) -o $(MOC_ALL_BIN_OUTPUT_FILE) -f $(BOOT_OFFSET) $(BOOT_BIN_FILE)
$(PYTHON) $(GEN_COMMON_BIN_OUTPUT_FILE_SCRIPT) -o $(MOC_ALL_BIN_OUTPUT_FILE) -f $(APP_OFFSET) $(APP_BIN_FILE)
$(PYTHON) $(GEN_COMMON_BIN_OUTPUT_FILE_SCRIPT) -o $(MOC_ALL_BIN_OUTPUT_FILE) -f $(ATE_OFFSET) $(ATE_BIN_FILE)

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mico-os/board/MK3239/memory.ld Normal file
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/**
******************************************************************************
*
* The MIT License
* Copyright (c) 2016 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
MEMORY
{
BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
APP_FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 992K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
}

30
mico-os/board/MK3239/micoLinkerForIAR.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08008000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08008000;
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
define symbol __ICFEDIT_size_heap__ = 0x34000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };

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mico-os/board/MK3239/platform.c Normal file
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/**
******************************************************************************
* @file platform.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides all MICO Peripherals mapping table and platform
* specific functions.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#include "mico_platform.h"
#include "platform.h"
#include "platform_config.h"
#include "platform_peripheral.h"
#include "platform_config.h"
#include "platform_logging.h"
#include "wlan_platform_common.h"
#include "platform_bluetooth.h"
#include "Keypad/gpio_button/button.h"
#ifdef USE_MiCOKit_EXT
#include "MiCOKit_EXT/micokit_ext.h"
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/******************************************************
* Structures
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
extern WEAK void PlatformEasyLinkButtonClickedCallback(void);
extern WEAK void PlatformEasyLinkButtonLongPressedCallback(void);
extern WEAK void bootloader_start(void);
/******************************************************
* Variables Definitions
******************************************************/
const platform_gpio_t platform_gpio_pins[] =
{
/* Common GPIOs for internal use */
[FLASH_PIN_QSPI_CS ] = { GPIOC, 11 },
[FLASH_PIN_QSPI_CLK] = { GPIOB, 1 },
[FLASH_PIN_QSPI_D0] = { GPIOA, 6 },
[FLASH_PIN_QSPI_D1] = { GPIOA, 7 },
[FLASH_PIN_QSPI_D2] = { GPIOC, 4 },
[FLASH_PIN_QSPI_D3] = { GPIOC, 5 },
/* GPIOs for external use */
[MICO_GPIO_2] = { GPIOB, 2 },
[MICO_GPIO_4] = { GPIOB, 15 }, // SPI_MOSI
[MICO_GPIO_5] = { GPIOB, 12 }, // SPI_CS
[MICO_GPIO_6] = { GPIOB, 13 }, // SPI_SCK
[MICO_GPIO_7] = { GPIOB, 14 }, // SPI_MISO
[MICO_GPIO_8] = { GPIOC , 6 }, // UART_TXD_DEBUG
[MICO_GPIO_9] = { GPIOA, 15 }, // EASY LINK
[MICO_GPIO_12] = { GPIOC, 7 }, // UART_RXD_DEBUG
[MICO_GPIO_14] = { GPIOC, 0 }, // WL_HOST_WAKE
[MICO_GPIO_16] = { GPIOC, 13 },
[MICO_GPIO_17] = { GPIOB, 8 }, // I2C_SCL
[MICO_GPIO_18] = { GPIOB, 9 }, // I2C_SDA
[MICO_GPIO_19] = { GPIOB, 10 },
[MICO_GPIO_27] = { GPIOB, 3 }, //
[MICO_GPIO_29] = { GPIOB, 7 }, // UART_RXD_USER
[MICO_GPIO_30] = { GPIOB, 6 }, // UART_TXD_USER
[MICO_GPIO_31] = { GPIOB, 4 }, // RF LED
[MICO_GPIO_33] = { GPIOA, 10 }, // SYS LED
[MICO_GPIO_34] = { GPIOA, 5 },
[MICO_GPIO_35] = { GPIOA, 11 },
[MICO_GPIO_36] = { GPIOA, 12 },
[MICO_GPIO_37] = { GPIOB, 0 },
[MICO_GPIO_38] = { GPIOA, 4 }, // ADC_1
};
const platform_pwm_t *platform_pwm_peripherals = NULL;
const platform_adc_t platform_adc_peripherals[] =
{
[MICO_ADC_1] = { ADC1, ADC_Channel_4, RCC_APB2Periph_ADC1, 1, (platform_gpio_t*)&platform_gpio_pins[MICO_GPIO_38] },
[MICO_ADC_2] = { ADC1, ADC_Channel_5, RCC_APB2Periph_ADC1, 1, (platform_gpio_t*)&platform_gpio_pins[MICO_GPIO_34] },
};
const platform_i2c_t platform_i2c_peripherals[] =
{
[MICO_I2C_1] =
{
.port = I2C1,
.pin_scl = &platform_gpio_pins[MICO_GPIO_17],
.pin_sda = &platform_gpio_pins[MICO_GPIO_18],
.peripheral_clock_reg = RCC_APB1Periph_I2C1,
.tx_dma = DMA1,
.tx_dma_peripheral_clock = RCC_AHB1Periph_DMA1,
.tx_dma_stream = DMA1_Stream1,
.rx_dma_stream = DMA1_Stream0,
.tx_dma_stream_id = 1,
.rx_dma_stream_id = 0,
.tx_dma_channel = DMA_Channel_0,
.rx_dma_channel = DMA_Channel_1,
.gpio_af_scl = GPIO_AF_I2C1,
.gpio_af_sda = GPIO_AF_I2C1
},
};
platform_i2c_driver_t platform_i2c_drivers[MICO_I2C_MAX];
const platform_uart_t platform_uart_peripherals[] =
{
[MICO_UART_1] =
{
.port = USART6,
.pin_tx = &platform_gpio_pins[MICO_GPIO_8],
.pin_rx = &platform_gpio_pins[MICO_GPIO_12],
.pin_cts = NULL,
.pin_rts = NULL,
.tx_dma_config =
{
.controller = DMA2,
.stream = DMA2_Stream6,
.channel = DMA_Channel_5,
.irq_vector = DMA2_Stream6_IRQn,
.complete_flags = DMA_HISR_TCIF6,
.error_flags = ( DMA_HISR_TEIF6 | DMA_HISR_FEIF6 ),
},
.rx_dma_config =
{
.controller = DMA2,
.stream = DMA2_Stream1,
.channel = DMA_Channel_5,
.irq_vector = DMA2_Stream1_IRQn,
.complete_flags = DMA_LISR_TCIF1,
.error_flags = ( DMA_LISR_TEIF1 | DMA_LISR_FEIF1 | DMA_LISR_DMEIF1 ),
},
},
[MICO_UART_2] =
{
.port = USART1,
.pin_tx = &platform_gpio_pins[MICO_GPIO_30],
.pin_rx = &platform_gpio_pins[MICO_GPIO_29],
.pin_cts = &platform_gpio_pins[MICO_GPIO_35],
.pin_rts = &platform_gpio_pins[MICO_GPIO_36],
.tx_dma_config =
{
.controller = DMA2,
.stream = DMA2_Stream7,
.channel = DMA_Channel_4,
.irq_vector = DMA2_Stream7_IRQn,
.complete_flags = DMA_HISR_TCIF7,
.error_flags = ( DMA_HISR_TEIF7 | DMA_HISR_FEIF7 ),
},
.rx_dma_config =
{
.controller = DMA2,
.stream = DMA2_Stream2,
.channel = DMA_Channel_4,
.irq_vector = DMA2_Stream2_IRQn,
.complete_flags = DMA_LISR_TCIF2,
.error_flags = ( DMA_LISR_TEIF2 | DMA_LISR_FEIF2 | DMA_LISR_DMEIF2 ),
},
},
};
platform_uart_driver_t platform_uart_drivers[MICO_UART_MAX];
const platform_spi_t platform_spi_peripherals[] =
{
[MICO_SPI_1] =
{
.port = SPI2,
.gpio_af = GPIO_AF_SPI2,
.peripheral_clock_reg = RCC_APB1Periph_SPI2,
.peripheral_clock_func = RCC_APB1PeriphClockCmd,
.pin_mosi = &platform_gpio_pins[MICO_GPIO_4],
.pin_miso = &platform_gpio_pins[MICO_GPIO_7],
.pin_clock = &platform_gpio_pins[MICO_GPIO_6],
.tx_dma =
{
.controller = DMA1,
.stream = DMA1_Stream4,
.channel = DMA_Channel_0,
.irq_vector = DMA1_Stream4_IRQn,
.complete_flags = DMA_HISR_TCIF4,
.error_flags = ( DMA_HISR_TEIF4 | DMA_HISR_FEIF4 ),
},
.rx_dma =
{
.controller = DMA1,
.stream = DMA1_Stream3,
.channel = DMA_Channel_0,
.irq_vector = DMA1_Stream3_IRQn,
.complete_flags = DMA_LISR_TCIF3,
.error_flags = ( DMA_LISR_TEIF3 | DMA_LISR_FEIF3 | DMA_LISR_DMEIF3 ),
},
}
};
platform_spi_driver_t platform_spi_drivers[MICO_SPI_MAX];
const platform_qspi_t platform_qspi_peripherals[] =
{
[MICO_QSPI_1] =
{
.port = QUADSPI,
.FSelect = QSPI_FSelect_2,
.peripheral_clock_reg = RCC_AHB3Periph_QSPI,
.peripheral_clock_func = RCC_AHB3PeriphClockCmd,
.pin_d0 = &platform_gpio_pins[FLASH_PIN_QSPI_D0],
.pin_d1 = &platform_gpio_pins[FLASH_PIN_QSPI_D1],
.pin_d2 = &platform_gpio_pins[FLASH_PIN_QSPI_D2],
.pin_d3 = &platform_gpio_pins[FLASH_PIN_QSPI_D3],
.pin_clock = &platform_gpio_pins[FLASH_PIN_QSPI_CLK],
.pin_cs = &platform_gpio_pins[FLASH_PIN_QSPI_CS],
#ifdef USE_QUAD_SPI_DMA
.dma =
{
.controller = DMA2,
.stream = DMA2_Stream7,
.channel = DMA_Channel_3,
.complete_flags = DMA_FLAG_TCIF7,
},
#endif
.gpio_af_d0 = GPIO_AF10_QUADSPI,
.gpio_af_d1 = GPIO_AF10_QUADSPI,
.gpio_af_d2 = GPIO_AF10_QUADSPI,
.gpio_af_d3 = GPIO_AF10_QUADSPI,
.gpio_af_clk = GPIO_AF9_QUADSPI,
.gpio_af_cs = GPIO_AF9_QUADSPI,
}
};
//platform_qspi_driver_t platform_qspi_drivers[MICO_QSPI_MAX];
/* Flash memory devices */
const platform_flash_t platform_flash_peripherals[] =
{
[MICO_FLASH_EMBEDDED] =
{
.flash_type = FLASH_TYPE_EMBEDDED,
.flash_start_addr = 0x08000000,
.flash_length = 0x100000,
},
[MICO_FLASH_QSPI] =
{
.flash_type = FLASH_TYPE_QSPI,
.flash_start_addr = 0x000000,
.flash_length = 0x200000,
},
};
platform_flash_driver_t platform_flash_drivers[MICO_FLASH_MAX];
/* Logic partition on flash devices */
const mico_logic_partition_t mico_partitions[] =
{
[MICO_PARTITION_BOOTLOADER] =
{
.partition_owner = MICO_FLASH_EMBEDDED,
.partition_description = "Bootloader",
.partition_start_addr = 0x08000000,
.partition_length = 0x8000, //32k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
},
[MICO_PARTITION_APPLICATION] =
{
.partition_owner = MICO_FLASH_EMBEDDED,
.partition_description = "Application",
.partition_start_addr = 0x08008000,
.partition_length = 0xF8000, //992k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
},
[MICO_PARTITION_ATE] =
{
.partition_owner = MICO_FLASH_EMBEDDED,
.partition_description = "ATEFirmware",
.partition_start_addr = 0x080A0000,
.partition_length = 0x60000, //384k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
},
// [MICO_PARTITION_PARAMETER_1] =
// {
// .partition_owner = MICO_FLASH_QSPI,
// .partition_description = "PARAMETER1",
// .partition_start_addr = 0x0,
// .partition_length = 0x1000, // 4k bytes
// .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
// },
// [MICO_PARTITION_PARAMETER_2] =
// {
// .partition_owner = MICO_FLASH_QSPI,
// .partition_description = "PARAMETER2",
// .partition_start_addr = 0x1000,
// .partition_length = 0x1000, //4k bytes
// .partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
// },
[MICO_PARTITION_RF_FIRMWARE] =
{
.partition_owner = MICO_FLASH_QSPI,
.partition_description = "RF Firmware",
.partition_start_addr = 0x2000,
.partition_length = 0x6E000, //440k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
},
[MICO_PARTITION_OTA_TEMP] =
{
.partition_owner = MICO_FLASH_QSPI,
.partition_description = "OTA Storage",
.partition_start_addr = 0x70000,
.partition_length = 0x98000, //608k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[MICO_PARTITION_FILESYS] =
{
.partition_owner = MICO_FLASH_QSPI,
.partition_description = "FILESYS",
.partition_start_addr = 0x118000,
.partition_length = 0x0E0000, //896k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[MICO_PARTITION_PARAMETER_1] =
{
.partition_owner = MICO_FLASH_QSPI,
.partition_description = "PARAMETER1",
.partition_start_addr = 0x1F8000,
.partition_length = 0x4000, // 16k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[MICO_PARTITION_PARAMETER_2] =
{
.partition_owner = MICO_FLASH_QSPI,
.partition_description = "PARAMETER2",
.partition_start_addr = 0x1FC000,
.partition_length = 0x4000, //16k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
};
#if defined ( USE_MICO_SPI_FLASH )
const mico_spi_device_t mico_spi_flash =
{
.port = MICO_SPI_1,
.chip_select = FLASH_PIN_SPI_CS,
.speed = 40000000,
.mode = (SPI_CLOCK_RISING_EDGE | SPI_CLOCK_IDLE_HIGH | SPI_USE_DMA | SPI_MSB_FIRST ),
.bits = 8
};
#endif
/* Wi-Fi control pins. Used by platform/MCU/wlan_platform_common.c
*/
const platform_gpio_t wifi_control_pins[] =
{
[WIFI_PIN_POWER ] = { GPIOA, 9 },
[WIFI_PIN_RESET ] = { GPIOA, 9 },
[WIFI_PIN_32K_CLK ] = { GPIOA, 8 },
[WIFI_PIN_BOOTSTRAP_1] = { GPIOC, 10 },
};
/* Wi-Fi SDIO bus pins. Used by platform/MCU/STM32F4xx/wlan_bus_driver/wlan_SDIO.c */
const platform_gpio_t wifi_sdio_pins[] =
{
[WIFI_PIN_SDIO_OOB_IRQ] = { GPIOC, 0 },
[WIFI_PIN_SDIO_CLK ] = { GPIOC, 12 },
[WIFI_PIN_SDIO_CMD ] = { GPIOD, 2 },
[WIFI_PIN_SDIO_D0 ] = { GPIOC, 8 },
[WIFI_PIN_SDIO_D1 ] = { GPIOC, 9 },
[WIFI_PIN_SDIO_D2 ] = { GPIOC, 10 },
[WIFI_PIN_SDIO_D3 ] = { GPIOB, 5 },
};
/* Bluetooth control pins.*/
static const platform_gpio_t internal_bt_control_pins[] =
{
/* Reset pin unavailable */
[MICO_BT_PIN_POWER ] = { GPIOC, 3 },
[MICO_BT_PIN_HOST_WAKE ] = { GPIOC, 2 },
[MICO_BT_PIN_DEVICE_WAKE] = { GPIOC, 1 }
};
const platform_gpio_t* mico_bt_control_pins[] =
{
/* Reset pin unavailable */
[MICO_BT_PIN_POWER ] = &internal_bt_control_pins[MICO_BT_PIN_POWER ],
[MICO_BT_PIN_HOST_WAKE ] = &internal_bt_control_pins[MICO_BT_PIN_HOST_WAKE ],
[MICO_BT_PIN_DEVICE_WAKE] = &internal_bt_control_pins[MICO_BT_PIN_DEVICE_WAKE],
[MICO_BT_PIN_RESET ] = NULL,
};
/* Bluetooth UART pins.*/
static const platform_gpio_t internal_bt_uart_pins[] =
{
[MICO_BT_PIN_UART_TX ] = { GPIOA, 2 },
[MICO_BT_PIN_UART_RX ] = { GPIOA, 3 },
[MICO_BT_PIN_UART_CTS] = { GPIOA, 0 },
[MICO_BT_PIN_UART_RTS] = { GPIOA, 1 },
};
const platform_gpio_t* mico_bt_uart_pins[] =
{
[MICO_BT_PIN_UART_TX ] = &internal_bt_uart_pins[MICO_BT_PIN_UART_TX ],
[MICO_BT_PIN_UART_RX ] = &internal_bt_uart_pins[MICO_BT_PIN_UART_RX ],
[MICO_BT_PIN_UART_CTS] = &internal_bt_uart_pins[MICO_BT_PIN_UART_CTS],
[MICO_BT_PIN_UART_RTS] = &internal_bt_uart_pins[MICO_BT_PIN_UART_RTS],
};
static const platform_uart_t internal_bt_uart_peripheral =
{
.port = USART2,
.pin_tx = &internal_bt_uart_pins[MICO_BT_PIN_UART_TX ],
.pin_rx = &internal_bt_uart_pins[MICO_BT_PIN_UART_RX ],
.pin_cts = &internal_bt_uart_pins[MICO_BT_PIN_UART_CTS ],
.pin_rts = &internal_bt_uart_pins[MICO_BT_PIN_UART_RTS ],
.tx_dma_config =
{
.controller = DMA1,
.stream = DMA1_Stream6,
.channel = DMA_Channel_4,
.irq_vector = DMA1_Stream6_IRQn,
.complete_flags = DMA_HISR_TCIF6,
.error_flags = ( DMA_HISR_TEIF6 | DMA_HISR_FEIF6 ),
},
.rx_dma_config =
{
.controller = DMA1,
.stream = DMA1_Stream5,
.channel = DMA_Channel_4,
.irq_vector = DMA1_Stream5_IRQn,
.complete_flags = DMA_HISR_TCIF5,
.error_flags = ( DMA_HISR_TEIF5 | DMA_HISR_FEIF5 | DMA_HISR_DMEIF5 ),
},
};
static platform_uart_driver_t internal_bt_uart_driver;
const platform_uart_t* mico_bt_uart_peripheral = &internal_bt_uart_peripheral;
platform_uart_driver_t* mico_bt_uart_driver = &internal_bt_uart_driver;
/* Bluetooth UART configuration. Used by libraries/bluetooth/internal/bus/UART/bt_bus.c */
const platform_uart_config_t mico_bt_uart_config =
{
.baud_rate = 115200,
.data_width = DATA_WIDTH_8BIT,
.parity = NO_PARITY,
.stop_bits = STOP_BITS_1,
.flow_control = FLOW_CONTROL_CTS_RTS, //FLOW_CONTROL_DISABLED,
};
/*BT chip specific configuration information*/
const platform_bluetooth_config_t mico_bt_config =
{
.patchram_download_mode = PATCHRAM_DOWNLOAD_MODE_MINIDRV_CMD,
.patchram_download_baud_rate = 115200,
.featured_baud_rate = 3000000
};
/******************************************************
* Interrupt Handler Definitions
******************************************************/
/* Remap UART IRQ to MiCO UART driver */
MICO_RTOS_DEFINE_ISR( USART6_IRQHandler )
{
platform_uart_irq( &platform_uart_drivers[MICO_UART_1] );
}
MICO_RTOS_DEFINE_ISR( USART1_IRQHandler )
{
platform_uart_irq( &platform_uart_drivers[MICO_UART_2] );
}
MICO_RTOS_DEFINE_ISR( USART2_IRQHandler )
{
platform_uart_irq( mico_bt_uart_driver );
}
/* Remap UART TX DMA to MiCO UART driver */
MICO_RTOS_DEFINE_ISR( DMA2_Stream6_IRQHandler )
{
platform_uart_tx_dma_irq( &platform_uart_drivers[MICO_UART_1] );
}
MICO_RTOS_DEFINE_ISR( DMA2_Stream7_IRQHandler )
{
platform_uart_tx_dma_irq( &platform_uart_drivers[MICO_UART_2] );
}
MICO_RTOS_DEFINE_ISR( DMA1_Stream6_IRQHandler )
{
platform_uart_tx_dma_irq( mico_bt_uart_driver );
}
/* Remap UART RX DMA to MiCO UART driver */
MICO_RTOS_DEFINE_ISR( DMA2_Stream1_IRQHandler )
{
platform_uart_rx_dma_irq( &platform_uart_drivers[MICO_UART_1] );
}
MICO_RTOS_DEFINE_ISR( DMA2_Stream2_IRQHandler )
{
platform_uart_rx_dma_irq( &platform_uart_drivers[MICO_UART_2] );
}
MICO_RTOS_DEFINE_ISR( DMA1_Stream5_IRQHandler )
{
platform_uart_rx_dma_irq( mico_bt_uart_driver );
}
/******************************************************
* Function Definitions
******************************************************/
void platform_init_peripheral_irq_priorities( void )
{
/* Interrupt priority setup. Called by MiCO/platform/MCU/STM32F4xx/platform_init.c */
NVIC_SetPriority( RTC_WKUP_IRQn , 1 ); /* RTC Wake-up event */
NVIC_SetPriority( SDIO_IRQn , 2 ); /* WLAN SDIO */
NVIC_SetPriority( DMA2_Stream3_IRQn, 3 ); /* WLAN SDIO DMA */
NVIC_SetPriority( USART6_IRQn , 6 ); /* MICO_UART_1 */
NVIC_SetPriority( DMA2_Stream6_IRQn, 7 ); /* MICO_UART_1 TX DMA */
NVIC_SetPriority( DMA2_Stream1_IRQn, 7 ); /* MICO_UART_1 RX DMA */
NVIC_SetPriority( USART2_IRQn , 6 ); /* BT UART */
NVIC_SetPriority( DMA1_Stream5_IRQn, 7 ); /* BT UART RX DMA */
NVIC_SetPriority( DMA1_Stream6_IRQn, 7 ); /* BT UART TX DMA */
NVIC_SetPriority( EXTI0_IRQn , 14 ); /* GPIO */
NVIC_SetPriority( EXTI1_IRQn , 14 ); /* GPIO */
NVIC_SetPriority( EXTI2_IRQn , 14 ); /* GPIO */
NVIC_SetPriority( EXTI3_IRQn , 14 ); /* GPIO */
NVIC_SetPriority( EXTI4_IRQn , 14 ); /* GPIO */
NVIC_SetPriority( EXTI9_5_IRQn , 14 ); /* GPIO */
NVIC_SetPriority( EXTI15_10_IRQn , 14 ); /* GPIO */
}
void init_platform( void )
{
button_init_t init;
MicoGpioInitialize( (mico_gpio_t)MICO_SYS_LED, OUTPUT_PUSH_PULL );
MicoGpioOutputLow( (mico_gpio_t)MICO_SYS_LED );
MicoGpioInitialize( (mico_gpio_t)MICO_RF_LED, OUTPUT_OPEN_DRAIN_NO_PULL );
MicoGpioOutputHigh( (mico_gpio_t)MICO_RF_LED );
MicoGpioInitialize((mico_gpio_t)BOOT_SEL, INPUT_PULL_UP);
MicoGpioInitialize((mico_gpio_t)MFG_SEL, INPUT_PULL_UP);
// Initialise EasyLink buttons
init.gpio = EasyLink_BUTTON;
init.pressed_func = PlatformEasyLinkButtonClickedCallback;
init.long_pressed_func = PlatformEasyLinkButtonLongPressedCallback;
init.long_pressed_timeout = 5000;
button_init( IOBUTTON_EASYLINK, init );
#ifdef USE_MiCOKit_EXT
dc_motor_init( );
dc_motor_set( 0 );
rgb_led_init();
rgb_led_open(0, 0, 0);
#endif
}
#ifdef BOOTLOADER
void init_platform_bootloader( void )
{
MicoGpioInitialize( (mico_gpio_t)MICO_SYS_LED, OUTPUT_PUSH_PULL );
MicoGpioOutputLow( (mico_gpio_t)MICO_SYS_LED );
MicoGpioInitialize( (mico_gpio_t)MICO_RF_LED, OUTPUT_OPEN_DRAIN_NO_PULL );
MicoGpioOutputHigh( (mico_gpio_t)MICO_RF_LED );
MicoGpioInitialize((mico_gpio_t)BOOT_SEL, INPUT_PULL_UP);
MicoGpioInitialize((mico_gpio_t)MFG_SEL, INPUT_PULL_UP);
#ifdef USE_MiCOKit_EXT
dc_motor_init( );
dc_motor_set( 0 );
rgb_led_init();
rgb_led_open(0, 0, 0);
#endif
}
#endif
void MicoSysLed(bool onoff)
{
if (onoff) {
MicoGpioOutputLow( (mico_gpio_t)MICO_SYS_LED );
} else {
MicoGpioOutputHigh( (mico_gpio_t)MICO_SYS_LED );
}
}
void MicoRfLed(bool onoff)
{
if (onoff) {
MicoGpioOutputLow( (mico_gpio_t)MICO_RF_LED );
} else {
MicoGpioOutputHigh( (mico_gpio_t)MICO_RF_LED );
}
}
bool MicoShouldEnterMFGMode(void)
{
if(MicoGpioInputGet((mico_gpio_t)BOOT_SEL)==false && MicoGpioInputGet((mico_gpio_t)MFG_SEL)==false)
return true;
else
return false;
}
bool MicoShouldEnterBootloader(void)
{
if(MicoGpioInputGet((mico_gpio_t)BOOT_SEL)==false && MicoGpioInputGet((mico_gpio_t)MFG_SEL)==true)
return true;
else
return false;
}

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/**
******************************************************************************
* @file platform.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides all MICO Peripherals defined for current platform.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/*
EMW3239 platform pin definitions ...
+-------------------------------------------------------------------------+
| Enum ID |Pin | STM32| Peripheral | Board | Peripheral |
| | # | Port | Available | Connection | Alias |
|---------------+----+------+-------------+--------------+----------------|
| | 1 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_2 | 2 | B 2 | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 3 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_4 | 4 | B 15 | TIM1_CH3N | | |
| | | | TIM8_CH3N | | |
| | | | SPI2_MOSI | | |
| | | | SDIO_CK | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_5 | 5 | B 12 | SPI2_NSS | | |
| | | | SPI4_NSS | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_6 | 6 | B 13 | TIM1_CH1N | | |
| | | | GPIO | | |
| | | | SPI2_SCK | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_7 | 7 | B 14 | GPIO | | |
| | | | SDIO_D6 | | |
| | | | TIM1_CH2N | | |
| | | | SPI2_MISO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_8 | 8 | C 6 | TIM3_CH1 | STDIO_UART_TX| MICO_UART_1_TX |
| | | | TIM8_CH1 | | |
| | | | USART6_TX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_9 | 9 | A 15 | TIM2_CH1 |EasyLink_BUTTON| |
| | | | JTDI | | |
| | | | USART1_TX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 10 | VBAT | |
|---------------+----+------+-------------+--------------+----------------|
| | 11 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_12 | 12 | C 7 | TIM3_CH2 | STDIO_UART_RX| MICO_UART_1_RX |
| | | | TIM8_CH2 | | |
| | | | SPI2_SCK | | |
| | | | SDIO_D7 | | |
| | | | USART6_RX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 13 | NRST | | | MICRO_RST_N |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_14 | 14 | C 0 | WAKE_UP | | |
|---------------+----+------+-------------+--------------+----------------|
| | 15 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_16 | 16 | C 13 | - | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_SYS_LED | 17 | B 8 | TIM4_CH3 | | |
| | | | I2C2_SCL | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_18 | 18 | B 9 | TIM4_CH3 | | |
| | | | TIM10_CH1 | | |
| | | | I2C1_SCL | | |
| | | | SDIO_D4 | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_19 | 19 | B 10 | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 20 | GND | | | |
+---------------+----+--------------------+--------------+----------------+
| | 21 | GND | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_22 | 22 | B 3 | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_23 | 23 | A 15 | GPIO | | JTAG_TDI |
| | | | USART1_TX | | SPI1_SSN |
| | | | TIM2_CH1 | | |
| | | | TIM2_ETR | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_24 | 24 | B 4 | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_25 | 25 | A 14 | JTCK-SWCLK | SWCLK | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
|MICO_GPIO_26 | 26 | A 13 | JTMS-SWDIO | SWDIO | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
|MICO_GPIO_27 | 27 | B 3 | TIM1_ETR | | |
| | | | USART1_RX | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 28 | NC | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_29 | 29 | B 7 | GPIO | | MICO_UART_2_RX |
| | | | TIM4_CH2 | | |
| | | | USART1_RX | | |
| | | | I2C1_SDA | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_30 | 30 | B 6 | GPIO | | MICO_UART_2_TX |
| | | | TIM4_CH1 | | |
| | | | USART1_TX | | |
| | | | I2C1_SCL | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_31 | 31 | B 4 | GPIO | MICO_RF_LED | |
| | | | TIM3_CH1 | | |
| | | | SDIO_D0 | | |
+---------------+----+--------------------+--------------+----------------+
| | 32 | NC | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_33 | 33 | A 10 | TIM1_CH3 | MICO_SYS_LED | |
| | | | SPI5_MOSI | | |
| | | | USB_FS_ID | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_34 | 34 | A 12 | TIM1_ETR | | |
| | | | USART1_RTS | | |
| | | | USB_FS_DP | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_35 | 35 | A 11 | TIM1_CH4 | | |
| | | | SPI4_MISO | | |
| | | | USART1_CTS | | |
| | | | USART6_TX | | |
| | | | USB_FS_DM | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_36 | 36 | A 5 | TIM2_CH1 | BOOT_SEL | |
| | | | TIM2_ETR | | |
| | | | TIM8_CH1N | | |
| | | | SPI1_SCK | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_37 | 37 | B 0 | TIM1_CH2N | MFG_SEL | |
| | | | TIM3_CH3 | | |
| | | | TIM8_CH2N | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_38 | 38 | A 4 | USART2_CK | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 39 | VDD | | | |
+---------------+----+--------------------+--------------+----------------+
| | 40 | VDD | | | |
+---------------+----+--------------------+--------------+----------------+
| | 41 | ANT | | | |
+---------------+----+--------------------+--------------+----------------+
*/
typedef enum
{
FLASH_PIN_QSPI_CS,
FLASH_PIN_QSPI_CLK,
FLASH_PIN_QSPI_D0,
FLASH_PIN_QSPI_D1,
FLASH_PIN_QSPI_D2,
FLASH_PIN_QSPI_D3,
MICO_GPIO_2,
MICO_GPIO_4,
MICO_GPIO_5,
MICO_GPIO_6,
MICO_GPIO_7,
MICO_GPIO_8,
MICO_GPIO_9,
MICO_GPIO_12,
MICO_GPIO_14,
MICO_GPIO_16,
MICO_GPIO_17,
MICO_GPIO_18,
MICO_GPIO_19,
MICO_GPIO_27,
MICO_GPIO_29,
MICO_GPIO_30,
MICO_GPIO_31,
MICO_GPIO_33,
MICO_GPIO_34,
MICO_GPIO_35,
MICO_GPIO_36,
MICO_GPIO_37,
MICO_GPIO_38,
MICO_GPIO_MAX, /* Denotes the total number of GPIO port aliases. Not a valid GPIO alias */
MICO_GPIO_NONE,
} mico_gpio_t;
typedef enum
{
MICO_SPI_1,
MICO_SPI_MAX, /* Denotes the total number of SPI port aliases. Not a valid SPI alias */
MICO_SPI_NONE,
} mico_spi_t;
typedef enum
{
MICO_QSPI_1,
MICO_QSPI_MAX,/* Denotes the total number of QSPI port aliases. Not a valid QSPI alias */
MICO_QSPI_NONE,
}mico_qspi_t;
typedef enum
{
MICO_I2C_1,
MICO_I2C_MAX, /* Denotes the total number of I2C port aliases. Not a valid I2C alias */
MICO_I2C_NONE,
} mico_i2c_t;
typedef enum
{
MICO_IIS_MAX, /* Denotes the total number of IIS port aliases. Not a valid IIS alias */
MICO_IIS_NONE,
} mico_iis_t;
typedef enum
{
MICO_PWM_MAX, /* Denotes the total number of PWM port aliases. Not a valid PWM alias */
MICO_PWM_NONE,
} mico_pwm_t;
typedef enum
{
MICO_ADC_1,
MICO_ADC_2,
MICO_ADC_MAX, /* Denotes the total number of ADC port aliases. Not a valid ADC alias */
MICO_ADC_NONE,
} mico_adc_t;
typedef enum
{
MICO_UART_1,
MICO_UART_2,
MICO_UART_MAX, /* Denotes the total number of UART port aliases. Not a valid UART alias */
MICO_UART_NONE,
} mico_uart_t;
typedef enum
{
MICO_FLASH_EMBEDDED,
MICO_FLASH_QSPI,
MICO_FLASH_MAX,
MICO_FLASH_NONE,
} mico_flash_t;
typedef enum
{
MICO_PARTITION_FILESYS,
MICO_PARTITION_USER_MAX
} mico_user_partition_t;
#ifdef BOOTLOADER
#define STDIO_UART (MICO_UART_2)
#define STDIO_UART_BAUDRATE (921600)
#else
#define STDIO_UART (MICO_UART_1)
#define STDIO_UART_BAUDRATE (115200)
#endif
#define UART_FOR_APP (MICO_UART_2)
#define MFG_TEST (MICO_UART_2)
#define CLI_UART (MICO_UART_1)
/* Components connected to external I/Os*/
#define USE_QUAD_SPI_FLASH
//#define USE_QUAD_SPI_DMA
#define BOOT_SEL (MICO_GPIO_36)
#define MFG_SEL (MICO_GPIO_37)
#define EasyLink_BUTTON (MICO_GPIO_9)
#define MICO_SYS_LED (MICO_GPIO_33)
#define MICO_RF_LED (MICO_GPIO_31)
/* Arduino extention connector */
#define Arduino_RXD (MICO_GPIO_29)
#define Arduino_TXD (MICO_GPIO_30)
#define Arduino_D2 (MICO_GPIO_NONE)
#define Arduino_D3 (MICO_GPIO_NONE)
#define Arduino_D4 (MICO_GPIO_19)
#define Arduino_D5 (MICO_GPIO_16)
#define Arduino_D6 (MICO_GPIO_14)
#define Arduino_D7 (MICO_GPIO_NONE)
#define Arduino_D8 (MICO_GPIO_2)
#define Arduino_D9 (MICO_GPIO_27)
#define Arduino_CS (MICO_GPIO_5)
#define Arduino_SI (MICO_GPIO_4)
#define Arduino_SO (MICO_GPIO_7)
#define Arduino_SCK (MICO_GPIO_6)
#define Arduino_SDA (MICO_GPIO_18)
#define Arduino_SCL (MICO_GPIO_17)
#define Arduino_A0 (MICO_ADC_NONE)
#define Arduino_A1 (MICO_ADC_NONE)
#define Arduino_A2 (MICO_ADC_1)
#define Arduino_A3 (MICO_ADC_2)
#define Arduino_A4 (MICO_ADC_NONE)
#define Arduino_A5 (MICO_ADC_NONE)
#define Arduino_I2C (MICO_I2C_1)
#define Arduino_SPI (MICO_SPI_1)
#define Arduino_UART (MICO_UART_2)
#ifdef USE_MiCOKit_EXT
#define MICO_I2C_CP (Arduino_I2C)
#include "micokit_ext_def.h"
#else
#define MICO_I2C_CP (MICO_I2C_NONE)
#endif //USE_MiCOKit_EXT
#ifdef __cplusplus
} /*extern "C" */
#endif

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/**
******************************************************************************
* @file platform_config.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides common configuration for current platform.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
#define HARDWARE_REVISION "1.0"
#define DEFAULT_NAME "MiCOKit-3239"
#define MODEL "EMW3239_1"
/* MICO RTOS tick rate in Hz */
#define MICO_DEFAULT_TICK_RATE_HZ (1000)
/************************************************************************
* Uncomment to disable watchdog. For debugging only */
//#define MICO_DISABLE_WATCHDOG
/************************************************************************
* Uncomment to disable standard IO, i.e. printf(), etc. */
//#define MICO_DISABLE_STDIO
/************************************************************************
* Uncomment to disable MCU powersave API functions */
//#define MICO_DISABLE_MCU_POWERSAVE
/************************************************************************
* Uncomment to enable MCU real time clock */
#define MICO_ENABLE_MCU_RTC
/************************************************************************
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
#define RestoreDefault_TimeOut (3000)
/************************************************************************
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
#define MCU_CLOCK_HZ (96000000)
/************************************************************************
* How many bits are used in NVIC priority configuration */
#define CORTEX_NVIC_PRIO_BITS (4)
/************************************************************************
* Enable write protection to write-disabled embedded flash sectors */
//#define MCU_ENABLE_FLASH_PROTECT
/************************************************************************
* This platform has bluetooth function, use part of core data as BT pairing table */
#define MICO_BLUETOOTH_ENABLE
#define HSE_SOURCE RCC_HSE_ON /* Use external crystal */
#define AHB_CLOCK_DIVIDER RCC_SYSCLK_Div1 /* AHB clock = System clock */
#define APB1_CLOCK_DIVIDER RCC_HCLK_Div2 /* APB1 clock = AHB clock / 2 */
#define APB2_CLOCK_DIVIDER RCC_HCLK_Div1 /* APB2 clock = AHB clock / 1 */
#define PLL_SOURCE RCC_PLLSource_HSE /* PLL source = external crystal */
#define PLL_M_CONSTANT 13 /* PLLM = 16 */
#define PLL_N_CONSTANT 192 /* PLLN = 400 */
#define PLL_P_CONSTANT 4 /* PLLP = 4 */
#define PPL_Q_CONSTANT 8 /* PLLQ = 7 */
#define PPL_R_CONSTANT 2 /* PLLR = 2 */
#define SYSTEM_CLOCK_SOURCE RCC_SYSCLKSource_PLLCLK /* System clock source = PLL clock */
#define SYSTICK_CLOCK_SOURCE SysTick_CLKSource_HCLK /* SysTick clock source = AHB clock */
#define INT_FLASH_WAIT_STATE FLASH_Latency_3 /* Internal flash wait state = 3 cycles */
#define PWR_WakeUp_Pin PWR_WakeUp_Pin2 /* PWR_Wake_Up_Pin */
/******************************************************
* EMW1062 Options
******************************************************/
/* GPIO pins are used to bootstrap Wi-Fi to SDIO or gSPI mode */
#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP_1
#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP_1_HIGH_FOR_SDIO
/* Wi-Fi GPIO0 pin is used for out-of-band interrupt */
#define MICO_WIFI_OOB_IRQ_GPIO_PIN ( 0 )
/* Wi-Fi power pin is present */
#define MICO_USE_WIFI_POWER_PIN
/* Wi-Fi reset pin is present */
//#define MICO_USE_WIFI_RESET_PIN
/* Wi-Fi 32K pin is present */
#define MICO_USE_WIFI_32K_PIN
/* USE SDIO 1bit mode */
//#define SDIO_1_BIT
/* Wi-Fi power pin is active high */
#define MICO_USE_WIFI_POWER_PIN_ACTIVE_HIGH
/* WLAN Powersave Clock Source
* The WLAN sleep clock can be driven from one of two sources:
* 1. MCO (MCU Clock Output) - default
* 2. WLAN 32K internal oscillator (30% inaccuracy)
*/
//#define MICO_USE_WIFI_32K_CLOCK_MCO
//#define MICO_USE_BUILTIN_RF_DRIVER
#ifdef __cplusplus
} /*extern "C" */
#endif

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mico-os/board/MK3239/wifi_nvram.c Normal file
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/**
******************************************************************************
* @file wifi_nvram.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief NVRAM read functions called by Wi-Fi driver.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#include <stdint.h>
#include <wifi_nvram_image.h>
uint32_t host_platform_memory_wifi_nvram_size( void )
{
return sizeof(wifi_nvram_image);
}
uint8_t* host_platform_read_wifi_nvram_image( int offset )
{
return (uint8_t*) &wifi_nvram_image[offset];
}

108
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/**
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
*
*/
/** @file
* NVRAM variables which define BCM43438A1 Parameters for the
* MXCHIP EMW3239 module.
*
*/
#ifndef INCLUDED_NVRAM_IMAGE_H_
#define INCLUDED_NVRAM_IMAGE_H_
#include <string.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define NVRAM_GENERATED_MAC_ADDRESS "macaddr=C8:93:46:00:00:01"
/**
* Character array of NVRAM image
*/
static const char wifi_nvram_image[] =
// # The following parameter values are just placeholders, need to be updated.
"manfid=0x2d0" "\x00"
"prodid=0x0726" "\x00"
"vendid=0x14e4" "\x00"
"devid=0x43e2" "\x00"
"boardtype=0x0726" "\x00"
"boardrev=0x1101" "\x00"
"boardnum=22" "\x00"
"xtalfreq=26000" "\x00"
"sromrev=11" "\x00"
"boardflags=0x00404201" "\x00"
"boardflags3=0x04000000" "\x00" //0x08000000 /* Force external lpo */
NVRAM_GENERATED_MAC_ADDRESS "\x00"
"nocrc=1" "\x00"
"ag0=255" "\x00"
"aa2g=1" "\x00"
"ccode=ALL" "\x00"
//#Antenna diversity
"swdiv_en=1" "\x00"
"swdiv_gpio=2" "\x00"
"pa0itssit=0x20" "\x00"
"extpagain2g=0" "\x00"
//#PA parameters for 2.4GHz, measured at CHIP OUTPUT
"pa2ga0=-194,5941,-695" "\x00"
"AvVmid_c0=0x0,0xc8" "\x00"
"cckpwroffset0=5" "\x00"
//# PPR params
"maxp2ga0=74" "\x00"
"txpwrbckof=6" "\x00"
"cckbw202gpo=0" "\x00" //0x1111
"legofdmbw202gpo=0x44444444" "\x00" //0x66666666
"mcsbw202gpo=0x88888888" "\x00" //0x88888888
"propbw202gpo=0xdd" "\x00"
//# OFDM IIR :
"ofdmdigfilttype=18" "\x00"
"ofdmdigfilttypebe=18" "\x00"
//# PAPD mode:
"papdmode=1" "\x00"
"papdvalidtest=1" "\x00"
"pacalidx2g=32" "\x00"
"papdepsoffset=-36" "\x00"
"papdendidx=61" "\x00"
//# LTECX flags
// "ltecxmux=1" "\x00"
//"ltecxpadnum=0x02030401" "\x00"
// "ltecxfnsel=0x3003" "\x00"
// "ltecxgcigpio=0x3012" "\x00"
//#il0macaddr=00:90:4c:c5:12:38
"wl0id=0x431b" "\x00"
"deadman_to=0xffffffff" "\x00"
//#OOB parameters
"hostwake=0x40" "\x00"
"hostrdy=0x41" "\x00"
//# muxenab: 0x1 for UART enable, 0x2 for GPIOs, 0x8 for JTAG, 0x10 for HW OOB
"muxenab=0x11" "\x00"
//# CLDO PWM voltage settings - 0x4 - 1.1 volt
//#cldo_pwm=0x4 "\x00"
//#VCO freq 326.4MHz
"spurconfig=0x3" "\x00"
//#CE 1.8.1
//"edonthd=-70" "\x00"
//"edoffthd=-76" "\x00"
"\x00\x00";
#ifdef __cplusplus
} /* extern "C" */
#endif
#else /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
#error Wi-Fi NVRAM image included twice
#endif /* ifndef INCLUDED_NVRAM_IMAGE_H_ */