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修复代码错误

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This commit is contained in:
nhkefus
2025-03-11 14:10:51 +08:00
parent a7f6e9379a
commit 3422912129
576 changed files with 39303 additions and 1012 deletions
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69
mico-os/board/NUCLEO_F412ZG/platform.c
View File

@@ -116,16 +116,8 @@ const platform_gpio_t platform_gpio_pins[] =
[MICO_GPIO_20] = { GPIOC, 4 },//PASS,Arduino_A4,WIFI WAKEIN
[MICO_GPIO_22] = { GPIOC, 5 },//PASS,Arduino_A5,WIFI WAKEOUT
[MICO_USART3_RX] = { GPIOD, 9 },//PASS,STDIO_UART_RX,USART3_RX,Nucleo STLK_RX
[MICO_USART3_TX] = { GPIOD, 8 },//PASS,STDIO_UART_TX,USART3_TX,Nucleo STLK_TX
[MICO_USART_NBIOT_TX] = { GPIOA, 9 },
[MICO_USART_NBIOT_RX] = { GPIOA, 10},
[MICO_USART_NBIOT_RTS] = { GPIOA, 12},
[MICO_USART_NBIOT_CTS] = { GPIOA, 11},
[MICO_GPIO_POWER] = { GPIOD, 2 },
[MICO_GPIO_GPRS_START] = { GPIOB, 5 },
[MICO_GPIO_GPRS_RST] = { GPIOA, 8 },
[MICO_GPIO_GPRS_WAKEUP] = { GPIOA, 1 },
[MICO_USART3_RX] = { GPIOD, 9 },//PASS,STDIO_UART_RX,USART3_RX,Nucleo STLK_RX
[MICO_USART3_TX] = { GPIOD, 8 },//PASS,STDIO_UART_TX,USART3_TX,Nucleo STLK_TX
};
const platform_pwm_t *platform_pwm_peripherals = NULL;
@@ -191,11 +183,11 @@ const platform_uart_t platform_uart_peripherals[] =
.tx_dma_config =
{
.controller = DMA2,
.stream = DMA2_Stream6,
.stream = DMA2_Stream7,
.channel = DMA_Channel_5,
.irq_vector = DMA2_Stream6_IRQn,
.complete_flags = DMA_HISR_TCIF6,
.error_flags = ( DMA_HISR_TEIF6 | DMA_HISR_FEIF6 ),
.irq_vector = DMA2_Stream7_IRQn,
.complete_flags = DMA_HISR_TCIF7,
.error_flags = ( DMA_HISR_TEIF7 | DMA_HISR_FEIF7 ),
},
.rx_dma_config =
{
@@ -207,32 +199,6 @@ const platform_uart_t platform_uart_peripherals[] =
.error_flags = ( DMA_LISR_TEIF1 | DMA_LISR_FEIF1 | DMA_LISR_DMEIF1 ),
},
},
[MICO_UART_3] =
{
.port = USART1,
.pin_tx = &platform_gpio_pins[MICO_USART_NBIOT_TX],
.pin_rx = &platform_gpio_pins[MICO_USART_NBIOT_RX],
.pin_cts = NULL,
.pin_rts = NULL,
.tx_dma_config =
{
.controller = DMA2,
.stream = DMA2_Stream7,
.channel = DMA_Channel_4,
.irq_vector = DMA2_Stream7_IRQn,
.complete_flags = DMA_HISR_TCIF7,
.error_flags = ( DMA_HISR_TEIF7 | DMA_HISR_FEIF7 ),
},
.rx_dma_config =
{
.controller = DMA2,
.stream = DMA2_Stream5,
.channel = DMA_Channel_4,
.irq_vector = DMA2_Stream5_IRQn,
.complete_flags = DMA_HISR_TCIF5,
.error_flags = ( DMA_HISR_TEIF5 | DMA_HISR_FEIF5 | DMA_HISR_DMEIF5 ),
},
},
};
platform_uart_driver_t platform_uart_drivers[MICO_UART_MAX];
@@ -423,7 +389,6 @@ const platform_spi_t wifi_spi =
/******************************************************
* Interrupt Handler Definitions
******************************************************/
@@ -444,24 +409,14 @@ MICO_RTOS_DEFINE_ISR( USART3_IRQHandler )
platform_uart_irq( &platform_uart_drivers[MICO_UART_1] );
}
MICO_RTOS_DEFINE_ISR( USART1_IRQHandler )
{
platform_uart_irq( &platform_uart_drivers[MICO_UART_3] );
}
MICO_RTOS_DEFINE_ISR( DMA1_Stream4_IRQHandler )
{
platform_uart_tx_dma_irq( &platform_uart_drivers[MICO_UART_1] );
}
MICO_RTOS_DEFINE_ISR( DMA2_Stream6_IRQHandler )
{
platform_uart_tx_dma_irq( &platform_uart_drivers[MICO_UART_2] );
}
MICO_RTOS_DEFINE_ISR( DMA2_Stream7_IRQHandler )
{
platform_uart_tx_dma_irq( &platform_uart_drivers[MICO_UART_3] );
platform_uart_tx_dma_irq( &platform_uart_drivers[MICO_UART_2] );
}
MICO_RTOS_DEFINE_ISR( DMA1_Stream1_IRQHandler )
@@ -475,11 +430,6 @@ MICO_RTOS_DEFINE_ISR( DMA2_Stream1_IRQHandler )
platform_uart_rx_dma_irq( &platform_uart_drivers[MICO_UART_2] );
}
MICO_RTOS_DEFINE_ISR( DMA2_Stream5_IRQHandler )
{
platform_uart_rx_dma_irq( &platform_uart_drivers[MICO_UART_3] );
}
/******************************************************
* Function Definitions
@@ -493,13 +443,10 @@ void platform_init_peripheral_irq_priorities( void )
NVIC_SetPriority( DMA2_Stream2_IRQn, 3 ); /* WLAN SPI DMA */
NVIC_SetPriority( USART3_IRQn , 6 ); /* MICO_UART_1 */
NVIC_SetPriority( USART6_IRQn , 6 ); /* MICO_UART_2 */
NVIC_SetPriority( USART1_IRQn , 6 ); /* MICO_UART_3 */
NVIC_SetPriority( DMA1_Stream4_IRQn, 7 ); /* MICO_UART_1 TX DMA */
NVIC_SetPriority( DMA1_Stream1_IRQn, 7 ); /* MICO_UART_1 RX DMA */
NVIC_SetPriority( DMA2_Stream6_IRQn, 7 ); /* MICO_UART_2 TX DMA */
NVIC_SetPriority( DMA2_Stream7_IRQn, 7 ); /* MICO_UART_2 TX DMA */
NVIC_SetPriority( DMA2_Stream1_IRQn, 7 ); /* MICO_UART_2 RX DMA */
NVIC_SetPriority( DMA2_Stream7_IRQn, 7 ); /* MICO_UART_3 TX DMA */
NVIC_SetPriority( DMA2_Stream5_IRQn, 7 ); /* MICO_UART_3 RX DMA */
NVIC_SetPriority( EXTI0_IRQn , 14 ); /* GPIO */
NVIC_SetPriority( EXTI1_IRQn , 14 ); /* GPIO */
NVIC_SetPriority( EXTI2_IRQn , 14 ); /* GPIO */

21
mico-os/board/NUCLEO_F412ZG/platform.h
View File

@@ -79,14 +79,7 @@ typedef enum
MICO_GPIO_22,
MICO_USART3_RX,
MICO_USART3_TX,
MICO_USART_NBIOT_TX,
MICO_USART_NBIOT_RX,
MICO_USART_NBIOT_RTS,
MICO_USART_NBIOT_CTS,
MICO_GPIO_POWER,
MICO_GPIO_GPRS_RST,
MICO_GPIO_GPRS_START,
MICO_GPIO_GPRS_WAKEUP,
MICO_GPIO_MAX, /* Denotes the total number of GPIO port aliases. Not a valid GPIO alias */
MICO_GPIO_NONE,
} mico_gpio_t;
@@ -106,12 +99,6 @@ typedef enum
MICO_I2C_NONE,
} mico_i2c_t;
typedef enum
{
MICO_IIS_MAX, /* Denotes the total number of IIS port aliases. Not a valid IIS alias */
MICO_IIS_NONE,
} mico_iis_t;
typedef enum
{
MICO_PWM_MAX, /* Denotes the total number of PWM port aliases. Not a valid PWM alias */
@@ -130,9 +117,6 @@ typedef enum
{
MICO_UART_1,
MICO_UART_2,
MICO_UART_3,
MICO_UART_4,
MICO_UART_5,
MICO_UART_MAX, /* Denotes the total number of UART port aliases. Not a valid UART alias */
MICO_UART_NONE,
} mico_uart_t;
@@ -159,8 +143,7 @@ typedef enum
#define STDIO_UART_BAUDRATE (115200)
#endif
#define UART_FOR_APP (MICO_UART_2)
#define UART_FOR_NBIOT (MICO_UART_3)
#define UART_FOR_APP (MICO_UART_1)
#define MFG_TEST (MICO_UART_1)
#define CLI_UART (MICO_UART_1)