mirror of
https://github.com/oopuuu/zTC1.git
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修复mico-sdk错误
This commit is contained in:
nhkefus
@@ -1,335 +1,335 @@
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/**
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******************************************************************************
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* @file platform_init.c
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* @author William Xu
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* @version V1.0.0
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* @date 05-May-2014
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* @brief This file provide functions called by MICO to drive stm32f2xx
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* platform: - e.g. power save, reboot, platform initialize
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******************************************************************************
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* UNPUBLISHED PROPRIETARY SOURCE CODE
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* Copyright (c) 2016 MXCHIP Inc.
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*
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* The contents of this file may not be disclosed to third parties, copied or
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* duplicated in any form, in whole or in part, without the prior written
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* permission of MXCHIP Corporation.
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******************************************************************************
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*/
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#include "platform_peripheral.h"
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#include "platform.h"
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#include "platform_config.h"
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#include "platform_logging.h"
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#include <string.h> // For memcmp
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#include "crt0.h"
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#include "mico_platform.h"
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#include "platform_init.h"
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/******************************************************
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* Macros
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******************************************************/
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/******************************************************
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* Constants
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******************************************************/
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#ifndef STDIO_BUFFER_SIZE
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#define STDIO_BUFFER_SIZE 64
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#endif
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/******************************************************
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* Enumerations
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******************************************************/
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/******************************************************
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* Type Definitions
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******************************************************/
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/******************************************************
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* Structures
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******************************************************/
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/******************************************************
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* Function Declarations
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******************************************************/
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extern OSStatus host_platform_init( void );
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/******************************************************
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* Variables Definitions
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******************************************************/
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extern platform_uart_t platform_uart_peripherals[];
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extern platform_uart_driver_t platform_uart_drivers[];
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extern const platform_flash_t platform_flash_peripherals[];
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extern platform_flash_driver_t platform_flash_drivers[];
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extern const mico_logic_partition_t mico_partitions[];
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#ifndef MICO_DISABLE_STDIO
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static const mico_uart_config_t stdio_uart_config =
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{
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.baud_rate = STDIO_UART_BAUDRATE,
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.data_width = DATA_WIDTH_8BIT,
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.parity = NO_PARITY,
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.stop_bits = STOP_BITS_1,
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.flow_control = FLOW_CONTROL_DISABLED,
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.flags = 0,
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};
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static volatile ring_buffer_t stdio_rx_buffer;
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static volatile uint8_t stdio_rx_data[STDIO_BUFFER_SIZE];
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mico_mutex_t stdio_rx_mutex;
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mico_mutex_t stdio_tx_mutex;
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#endif /* #ifndef MICO_DISABLE_STDIO */
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/******************************************************
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* Function Definitions
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******************************************************/
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#if defined ( __ICCARM__ )
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static inline void __jump_to( uint32_t addr )
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{
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__asm( "MOV R1, #0x00000001" );
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__asm( "ORR R0, R0, R1" ); /* Last bit of jump address indicates whether destination is Thumb or ARM code */
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__asm( "BLX R0" );
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}
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#elif defined ( __GNUC__ )
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__attribute__( ( always_inline ) ) static __INLINE void __jump_to( uint32_t addr )
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{
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addr |= 0x00000001; /* Last bit of jump address indicates whether destination is Thumb or ARM code */
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__ASM volatile ("BX %0" : : "r" (addr) );
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}
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#elif defined ( __CC_ARM )
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static void __asm __jump_to( uint32_t addr )
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{
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MOV R1, #0x00000001
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ORR R0, R0, R1 /* Last bit of jump address indicates whether destination is Thumb or ARM code */
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BLX R0
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}
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#endif
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void startApplication( uint32_t app_addr )
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{
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uint32_t* stack_ptr;
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uint32_t* start_ptr;
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if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) != 0x20000000)
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app_addr += 0x200;
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/* Test if user code is programmed starting from address "ApplicationAddress" */
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if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) == 0x20000000)
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{
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SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
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/* Clear all interrupt enabled by bootloader */
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for (int i = 0; i < 8; i++ )
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NVIC->ICER[i] = 0xFFFFFFFF;
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stack_ptr = (uint32_t*) app_addr; /* Initial stack pointer is first 4 bytes of vector table */
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start_ptr = ( stack_ptr + 1 ); /* Reset vector is second 4 bytes of vector table */
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#if defined ( __ICCARM__)
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__ASM( "MOV LR, #0xFFFFFFFF" );
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__ASM( "MOV R1, #0x01000000" );
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__ASM( "MSR APSR_nzcvq, R1" );
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__ASM( "MOV R1, #0x00000000" );
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__ASM( "MSR PRIMASK, R1" );
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__ASM( "MSR FAULTMASK, R1" );
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__ASM( "MSR BASEPRI, R1" );
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__ASM( "MSR CONTROL, R1" );
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#endif
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__set_MSP( *stack_ptr );
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__jump_to( *start_ptr );
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}
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}
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void platform_mcu_reset( void )
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{
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NVIC_SystemReset();
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}
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/* STM32F2 common clock initialisation function
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* This brings up enough clocks to allow the processor to run quickly while initialising memory.
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* Other platform specific clock init can be done in init_platform() or init_architecture()
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*/
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void init_clocks( void )
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{
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// /* Configure Clocks */
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ClkModuleDis(ALL_MODULE_CLK_SWITCH &(~(FSHC_CLK_EN)));
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ClkModuleEn( FSHC_CLK_EN );
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//ClkModuleEn( FSHC_CLK_EN | FUART_CLK_EN | SD_CLK_EN | BUART_CLK_EN ); //enable Fuart clock for debugging
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ClkModuleGateEn( ALL_MODULE_CLK_GATE_SWITCH ); //open all clk gating
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ClkPorRcToDpll(0); //clock src is 32768hz OSC
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ClkDpllClkGatingEn(1);
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CacheInit();
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//Disable Watchdog
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WdgDis();
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#ifdef NO_MICO_RTOS
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SysTick_Config( MCU_CLOCK_HZ / 1000 );
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#endif
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}
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WEAK void init_memory( void )
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{
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}
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void init_architecture( void )
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{
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NVIC_SetPriorityGrouping(__NVIC_PRIO_BITS + 1);
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/* Initialise the interrupt priorities to a priority lower than 0 so that the BASEPRI register can mask them */
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NVIC_SetPriority(MMFLT_IRQn, MMFLT_IRQn_PRIO);
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NVIC_SetPriority(BUSFLT_IRQn, BUSFLT_IRQn_PRIO);
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NVIC_SetPriority(USGFLT_IRQn, USGFLT_IRQn_PRIO);
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NVIC_SetPriority(SVCALL_IRQn, SVCALL_IRQn_PRIO);
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NVIC_SetPriority(DBGMON_IRQn, DBGMON_IRQn_PRIO);
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NVIC_SetPriority(PENDSV_IRQn, PENDSV_IRQn_PRIO);
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NVIC_SetPriority(SysTick_IRQn,SYSTICK_IRQn_PRIO);
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/*
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* enable 3 exception interrupt
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*/
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SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk;
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SCB->SHCSR |= SCB_SHCSR_BUSFAULTENA_Msk;
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SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
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/*
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* SOC interrupt(External Interrupt)
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*/
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NVIC_SetPriority(GPIO_IRQn, GPIO_IRQn_PRIO);
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NVIC_SetPriority(RTC_IRQn, RTC_IRQn_PRIO);
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NVIC_SetPriority(IR_IRQn, IR_IRQn_PRIO);
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NVIC_SetPriority(FUART_IRQn, FUART_IRQn_PRIO);
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NVIC_SetPriority(BUART_IRQn, BUART_IRQn_PRIO);
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NVIC_SetPriority(PWC_IRQn, PWC_IRQn_PRIO);
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NVIC_SetPriority(TMR0_IRQn, TMR0_IRQn_PRIO);
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NVIC_SetPriority(USB_IRQn, USB_IRQn_PRIO);
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NVIC_SetPriority(DMACH0_IRQn, DMACH0_IRQn_PRIO);
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NVIC_SetPriority(DMACH1_IRQn, DMACH1_IRQn_PRIO);
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NVIC_SetPriority(DECODER_IRQn,DECODER_IRQn_PRIO);
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NVIC_SetPriority(SPIS_IRQn, SPIS_IRQn_PRIO);
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NVIC_SetPriority(SD_IRQn, SD_IRQn_PRIO);
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NVIC_SetPriority(SPIM_IRQn, SPIM_IRQn_PRIO);
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NVIC_SetPriority(TMR1_IRQn, TMR1_IRQn_PRIO);
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NVIC_SetPriority(WDG_IRQn, WDG_IRQn_PRIO);
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GpioClrRegBits(GPIO_A_IE, 0xFFFFFFFF);
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GpioClrRegBits(GPIO_B_IE, 0xFFFFFFFF);
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GpioClrRegBits(GPIO_C_IE, 0x7FFF);
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GpioClrRegBits(GPIO_A_OE, 0xFFFFFFFF);
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GpioClrRegBits(GPIO_B_OE, 0xFFFFFFFF);
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GpioClrRegBits(GPIO_C_OE, 0x7FFF);
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GpioSetRegBits(GPIO_A_PU, 0xFFFFFFFF);
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GpioClrRegBits(GPIO_A_PD, 0x0);
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GpioSetRegBits(GPIO_B_PU, 0xFFFFFFFF);
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GpioClrRegBits(GPIO_B_PD, 0x0);
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GpioSetRegBits(GPIO_C_PU, 0x7FFF);
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GpioClrRegBits(GPIO_B_PD, 0x0);
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/* Initialise GPIO IRQ manager */
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platform_gpio_irq_manager_init();
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#ifndef MICO_DISABLE_STDIO
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#ifndef NO_MICO_RTOS
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mico_rtos_init_mutex( &stdio_tx_mutex );
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mico_rtos_unlock_mutex ( &stdio_tx_mutex );
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mico_rtos_init_mutex( &stdio_rx_mutex );
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mico_rtos_unlock_mutex ( &stdio_rx_mutex );
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#endif
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ring_buffer_init ( (ring_buffer_t*)&stdio_rx_buffer, (uint8_t*)stdio_rx_data, STDIO_BUFFER_SIZE );
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platform_uart_init( &platform_uart_drivers[STDIO_UART], &platform_uart_peripherals[STDIO_UART], &stdio_uart_config, (ring_buffer_t*)&stdio_rx_buffer );
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#endif
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/* Ensure 802.11 device is in reset. */
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host_platform_init( );
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/* Initialise nanosecond clock counter */
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platform_init_nanosecond_clock();
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#ifdef BOOTLOADER
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return;
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#endif
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/* Initialise RTC */
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platform_rtc_init( );
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#ifndef MICO_DISABLE_MCU_POWERSAVE
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/* Initialise MCU powersave */
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platform_mcu_powersave_init( );
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#endif /* ifndef MICO_DISABLE_MCU_POWERSAVE */
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platform_mcu_powersave_disable( );
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}
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OSStatus stdio_hardfault( char* data, uint32_t size )
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{
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#ifndef MICO_DISABLE_STDIO
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BuartIOctl(UART_IOCTL_TXINT_SET, 1);
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if(platform_uart_peripherals[STDIO_UART].uart == FUART){
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FuartSend( (uint8_t *)data, size);
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return kNoErr;
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}else if(platform_uart_peripherals[STDIO_UART].uart == BUART){
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BuartSend( (uint8_t *)data, size);
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return kNoErr;
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}else
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return kUnsupportedErr;
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#endif
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}
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static char global_cid[25] = { 0 };
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const char *mico_generate_cid(void)
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{
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uint8_t *chipid = (uint8_t*)(0x7C0000 + 0x7FDA);
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sprintf(global_cid, "%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X",
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0, 0, 0, 0, 0, 0,
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chipid[0], chipid[1], chipid[2], chipid[3], chipid[4], chipid[5]);
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return global_cid;
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}
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/******************************************************
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* NO-OS Functions
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******************************************************/
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#ifdef NO_MICO_RTOS
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static volatile uint32_t no_os_tick = 0;
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extern volatile uint32_t gSysTick;
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void SysTick_Handler(void)
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{
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no_os_tick ++;
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gSysTick ++;
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WdgFeed();
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}
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uint32_t mico_get_time_no_os(void)
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{
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return no_os_tick;
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}
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#else
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extern volatile uint32_t gSysTick;
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void xPortSysTickHandler(void);
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void SysTick_Handler(void)
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{
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gSysTick ++;
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xPortSysTickHandler();
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}
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#endif
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/**
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******************************************************************************
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* @file platform_init.c
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* @author William Xu
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* @version V1.0.0
|
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* @date 05-May-2014
|
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* @brief This file provide functions called by MICO to drive stm32f2xx
|
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* platform: - e.g. power save, reboot, platform initialize
|
||||
******************************************************************************
|
||||
* UNPUBLISHED PROPRIETARY SOURCE CODE
|
||||
* Copyright (c) 2016 MXCHIP Inc.
|
||||
*
|
||||
* The contents of this file may not be disclosed to third parties, copied or
|
||||
* duplicated in any form, in whole or in part, without the prior written
|
||||
* permission of MXCHIP Corporation.
|
||||
******************************************************************************
|
||||
*/
|
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|
||||
|
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#include "platform_peripheral.h"
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#include "platform.h"
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#include "platform_config.h"
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#include "platform_logging.h"
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#include <string.h> // For memcmp
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#include "crt0.h"
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#include "mico_platform.h"
|
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#include "platform_init.h"
|
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|
||||
|
||||
/******************************************************
|
||||
* Macros
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Constants
|
||||
******************************************************/
|
||||
|
||||
#ifndef STDIO_BUFFER_SIZE
|
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#define STDIO_BUFFER_SIZE 64
|
||||
#endif
|
||||
|
||||
/******************************************************
|
||||
* Enumerations
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Type Definitions
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Structures
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Function Declarations
|
||||
******************************************************/
|
||||
|
||||
extern OSStatus host_platform_init( void );
|
||||
|
||||
/******************************************************
|
||||
* Variables Definitions
|
||||
******************************************************/
|
||||
extern platform_uart_t platform_uart_peripherals[];
|
||||
extern platform_uart_driver_t platform_uart_drivers[];
|
||||
extern const platform_flash_t platform_flash_peripherals[];
|
||||
extern platform_flash_driver_t platform_flash_drivers[];
|
||||
extern const mico_logic_partition_t mico_partitions[];
|
||||
|
||||
|
||||
#ifndef MICO_DISABLE_STDIO
|
||||
static const mico_uart_config_t stdio_uart_config =
|
||||
{
|
||||
.baud_rate = STDIO_UART_BAUDRATE,
|
||||
.data_width = DATA_WIDTH_8BIT,
|
||||
.parity = NO_PARITY,
|
||||
.stop_bits = STOP_BITS_1,
|
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.flow_control = FLOW_CONTROL_DISABLED,
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.flags = 0,
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};
|
||||
|
||||
static volatile ring_buffer_t stdio_rx_buffer;
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||||
static volatile uint8_t stdio_rx_data[STDIO_BUFFER_SIZE];
|
||||
mico_mutex_t stdio_rx_mutex;
|
||||
mico_mutex_t stdio_tx_mutex;
|
||||
#endif /* #ifndef MICO_DISABLE_STDIO */
|
||||
|
||||
/******************************************************
|
||||
* Function Definitions
|
||||
******************************************************/
|
||||
#if defined ( __ICCARM__ )
|
||||
static inline void __jump_to( uint32_t addr )
|
||||
{
|
||||
__asm( "MOV R1, #0x00000001" );
|
||||
__asm( "ORR R0, R0, R1" ); /* Last bit of jump address indicates whether destination is Thumb or ARM code */
|
||||
__asm( "BLX R0" );
|
||||
}
|
||||
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
__attribute__( ( always_inline ) ) static __INLINE void __jump_to( uint32_t addr )
|
||||
{
|
||||
addr |= 0x00000001; /* Last bit of jump address indicates whether destination is Thumb or ARM code */
|
||||
__ASM volatile ("BX %0" : : "r" (addr) );
|
||||
}
|
||||
|
||||
|
||||
#elif defined ( __CC_ARM )
|
||||
static void __asm __jump_to( uint32_t addr )
|
||||
{
|
||||
MOV R1, #0x00000001
|
||||
ORR R0, R0, R1 /* Last bit of jump address indicates whether destination is Thumb or ARM code */
|
||||
BLX R0
|
||||
}
|
||||
#endif
|
||||
|
||||
void startApplication( uint32_t app_addr )
|
||||
{
|
||||
uint32_t* stack_ptr;
|
||||
uint32_t* start_ptr;
|
||||
|
||||
if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) != 0x20000000)
|
||||
app_addr += 0x200;
|
||||
/* Test if user code is programmed starting from address "ApplicationAddress" */
|
||||
if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) == 0x20000000)
|
||||
{
|
||||
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
|
||||
|
||||
/* Clear all interrupt enabled by bootloader */
|
||||
for (int i = 0; i < 8; i++ )
|
||||
NVIC->ICER[i] = 0xFFFFFFFF;
|
||||
|
||||
stack_ptr = (uint32_t*) app_addr; /* Initial stack pointer is first 4 bytes of vector table */
|
||||
start_ptr = ( stack_ptr + 1 ); /* Reset vector is second 4 bytes of vector table */
|
||||
|
||||
#if defined ( __ICCARM__)
|
||||
__ASM( "MOV LR, #0xFFFFFFFF" );
|
||||
__ASM( "MOV R1, #0x01000000" );
|
||||
__ASM( "MSR APSR_nzcvq, R1" );
|
||||
__ASM( "MOV R1, #0x00000000" );
|
||||
__ASM( "MSR PRIMASK, R1" );
|
||||
__ASM( "MSR FAULTMASK, R1" );
|
||||
__ASM( "MSR BASEPRI, R1" );
|
||||
__ASM( "MSR CONTROL, R1" );
|
||||
#endif
|
||||
|
||||
__set_MSP( *stack_ptr );
|
||||
__jump_to( *start_ptr );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void platform_mcu_reset( void )
|
||||
{
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
|
||||
/* STM32F2 common clock initialisation function
|
||||
* This brings up enough clocks to allow the processor to run quickly while initialising memory.
|
||||
* Other platform specific clock init can be done in init_platform() or init_architecture()
|
||||
*/
|
||||
void init_clocks( void )
|
||||
{
|
||||
// /* Configure Clocks */
|
||||
ClkModuleDis(ALL_MODULE_CLK_SWITCH &(~(FSHC_CLK_EN)));
|
||||
ClkModuleEn( FSHC_CLK_EN );
|
||||
//ClkModuleEn( FSHC_CLK_EN | FUART_CLK_EN | SD_CLK_EN | BUART_CLK_EN ); //enable Fuart clock for debugging
|
||||
ClkModuleGateEn( ALL_MODULE_CLK_GATE_SWITCH ); //open all clk gating
|
||||
|
||||
ClkPorRcToDpll(0); //clock src is 32768hz OSC
|
||||
ClkDpllClkGatingEn(1);
|
||||
|
||||
CacheInit();
|
||||
|
||||
//Disable Watchdog
|
||||
WdgDis();
|
||||
#ifdef NO_MICO_RTOS
|
||||
SysTick_Config( MCU_CLOCK_HZ / 1000 );
|
||||
#endif
|
||||
}
|
||||
|
||||
WEAK void init_memory( void )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void init_architecture( void )
|
||||
{
|
||||
NVIC_SetPriorityGrouping(__NVIC_PRIO_BITS + 1);
|
||||
|
||||
/* Initialise the interrupt priorities to a priority lower than 0 so that the BASEPRI register can mask them */
|
||||
NVIC_SetPriority(MMFLT_IRQn, MMFLT_IRQn_PRIO);
|
||||
NVIC_SetPriority(BUSFLT_IRQn, BUSFLT_IRQn_PRIO);
|
||||
NVIC_SetPriority(USGFLT_IRQn, USGFLT_IRQn_PRIO);
|
||||
NVIC_SetPriority(SVCALL_IRQn, SVCALL_IRQn_PRIO);
|
||||
NVIC_SetPriority(DBGMON_IRQn, DBGMON_IRQn_PRIO);
|
||||
NVIC_SetPriority(PENDSV_IRQn, PENDSV_IRQn_PRIO);
|
||||
NVIC_SetPriority(SysTick_IRQn,SYSTICK_IRQn_PRIO);
|
||||
|
||||
/*
|
||||
* enable 3 exception interrupt
|
||||
*/
|
||||
SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk;
|
||||
SCB->SHCSR |= SCB_SHCSR_BUSFAULTENA_Msk;
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
|
||||
/*
|
||||
* SOC interrupt(External Interrupt)
|
||||
*/
|
||||
NVIC_SetPriority(GPIO_IRQn, GPIO_IRQn_PRIO);
|
||||
NVIC_SetPriority(RTC_IRQn, RTC_IRQn_PRIO);
|
||||
NVIC_SetPriority(IR_IRQn, IR_IRQn_PRIO);
|
||||
NVIC_SetPriority(FUART_IRQn, FUART_IRQn_PRIO);
|
||||
NVIC_SetPriority(BUART_IRQn, BUART_IRQn_PRIO);
|
||||
NVIC_SetPriority(PWC_IRQn, PWC_IRQn_PRIO);
|
||||
NVIC_SetPriority(TMR0_IRQn, TMR0_IRQn_PRIO);
|
||||
NVIC_SetPriority(USB_IRQn, USB_IRQn_PRIO);
|
||||
NVIC_SetPriority(DMACH0_IRQn, DMACH0_IRQn_PRIO);
|
||||
NVIC_SetPriority(DMACH1_IRQn, DMACH1_IRQn_PRIO);
|
||||
NVIC_SetPriority(DECODER_IRQn,DECODER_IRQn_PRIO);
|
||||
NVIC_SetPriority(SPIS_IRQn, SPIS_IRQn_PRIO);
|
||||
NVIC_SetPriority(SD_IRQn, SD_IRQn_PRIO);
|
||||
NVIC_SetPriority(SPIM_IRQn, SPIM_IRQn_PRIO);
|
||||
NVIC_SetPriority(TMR1_IRQn, TMR1_IRQn_PRIO);
|
||||
NVIC_SetPriority(WDG_IRQn, WDG_IRQn_PRIO);
|
||||
|
||||
GpioClrRegBits(GPIO_A_IE, 0xFFFFFFFF);
|
||||
GpioClrRegBits(GPIO_B_IE, 0xFFFFFFFF);
|
||||
GpioClrRegBits(GPIO_C_IE, 0x7FFF);
|
||||
|
||||
GpioClrRegBits(GPIO_A_OE, 0xFFFFFFFF);
|
||||
GpioClrRegBits(GPIO_B_OE, 0xFFFFFFFF);
|
||||
GpioClrRegBits(GPIO_C_OE, 0x7FFF);
|
||||
|
||||
GpioSetRegBits(GPIO_A_PU, 0xFFFFFFFF);
|
||||
GpioClrRegBits(GPIO_A_PD, 0x0);
|
||||
|
||||
GpioSetRegBits(GPIO_B_PU, 0xFFFFFFFF);
|
||||
GpioClrRegBits(GPIO_B_PD, 0x0);
|
||||
|
||||
GpioSetRegBits(GPIO_C_PU, 0x7FFF);
|
||||
GpioClrRegBits(GPIO_B_PD, 0x0);
|
||||
|
||||
/* Initialise GPIO IRQ manager */
|
||||
platform_gpio_irq_manager_init();
|
||||
|
||||
#ifndef MICO_DISABLE_STDIO
|
||||
#ifndef NO_MICO_RTOS
|
||||
mico_rtos_init_mutex( &stdio_tx_mutex );
|
||||
mico_rtos_unlock_mutex ( &stdio_tx_mutex );
|
||||
mico_rtos_init_mutex( &stdio_rx_mutex );
|
||||
mico_rtos_unlock_mutex ( &stdio_rx_mutex );
|
||||
#endif
|
||||
ring_buffer_init ( (ring_buffer_t*)&stdio_rx_buffer, (uint8_t*)stdio_rx_data, STDIO_BUFFER_SIZE );
|
||||
platform_uart_init( &platform_uart_drivers[STDIO_UART], &platform_uart_peripherals[STDIO_UART], &stdio_uart_config, (ring_buffer_t*)&stdio_rx_buffer );
|
||||
#endif
|
||||
|
||||
/* Ensure 802.11 device is in reset. */
|
||||
host_platform_init( );
|
||||
|
||||
/* Initialise nanosecond clock counter */
|
||||
platform_init_nanosecond_clock();
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
return;
|
||||
#endif
|
||||
|
||||
/* Initialise RTC */
|
||||
platform_rtc_init( );
|
||||
|
||||
#ifndef MICO_DISABLE_MCU_POWERSAVE
|
||||
/* Initialise MCU powersave */
|
||||
platform_mcu_powersave_init( );
|
||||
#endif /* ifndef MICO_DISABLE_MCU_POWERSAVE */
|
||||
|
||||
platform_mcu_powersave_disable( );
|
||||
}
|
||||
|
||||
OSStatus stdio_hardfault( char* data, uint32_t size )
|
||||
{
|
||||
#ifndef MICO_DISABLE_STDIO
|
||||
BuartIOctl(UART_IOCTL_TXINT_SET, 1);
|
||||
|
||||
if(platform_uart_peripherals[STDIO_UART].uart == FUART){
|
||||
FuartSend( (uint8_t *)data, size);
|
||||
return kNoErr;
|
||||
}else if(platform_uart_peripherals[STDIO_UART].uart == BUART){
|
||||
BuartSend( (uint8_t *)data, size);
|
||||
return kNoErr;
|
||||
}else
|
||||
return kUnsupportedErr;
|
||||
#endif
|
||||
}
|
||||
|
||||
static char global_cid[25] = { 0 };
|
||||
const char *mico_generate_cid(void)
|
||||
{
|
||||
uint8_t *chipid = (uint8_t*)(0x7C0000 + 0x7FDA);
|
||||
|
||||
sprintf(global_cid, "%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X%.2X",
|
||||
0, 0, 0, 0, 0, 0,
|
||||
chipid[0], chipid[1], chipid[2], chipid[3], chipid[4], chipid[5]);
|
||||
return global_cid;
|
||||
}
|
||||
|
||||
/******************************************************
|
||||
* NO-OS Functions
|
||||
******************************************************/
|
||||
|
||||
|
||||
#ifdef NO_MICO_RTOS
|
||||
static volatile uint32_t no_os_tick = 0;
|
||||
extern volatile uint32_t gSysTick;
|
||||
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
no_os_tick ++;
|
||||
gSysTick ++;
|
||||
WdgFeed();
|
||||
}
|
||||
|
||||
uint32_t mico_get_time_no_os(void)
|
||||
{
|
||||
return no_os_tick;
|
||||
}
|
||||
#else
|
||||
extern volatile uint32_t gSysTick;
|
||||
void xPortSysTickHandler(void);
|
||||
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
gSysTick ++;
|
||||
xPortSysTickHandler();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user