修复mico-sdk错误

This commit is contained in:
nhkefus
2025-03-11 15:54:45 +08:00
parent 3422912129
commit 2ccb892a1c
2152 changed files with 664341 additions and 702636 deletions

View File

@@ -1,141 +1,141 @@
/**
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
*
*/
ENTRY( moc_app_main );
MEMORY
{
APP_FLASH (rx) : ORIGIN = 0x1F064000, LENGTH = 276K
SRAM (rwx) : ORIGIN = 0x0011C000, LENGTH = 48K
}
SECTIONS
{
.vectors :
{
. = ALIGN(4);
KEEP(*(*.user_handler))
. = ALIGN(., 4);
}>APP_FLASH AT> APP_FLASH
.text :
{
. = ALIGN(4);
link_code_location = .;
KEEP(*(.text.irq ))
*(.text .text.* .gnu.linkonce.t.*)
link_code_end = .;
. = ALIGN(0x4);
link_const_variable_data_location = .;
*(.rodata .rodata.* .gnu.linkonce.r.*)
link_const_variable_data_end = .;
. = ALIGN(0x4);
link_constructors_location = .;
KEEP(*(.preinit_array))
KEEP(*(.init_array))
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
link_constructors_end = .;
. = ALIGN(0x4);
link_destructors_location = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
link_destructors_end = .;
. = ALIGN(16);
}>APP_FLASH AT> APP_FLASH
/*
* The .ARM.exidx and .ARM.extab sections are used for C++ exception handling.
* It is located here for completeness. Bare-metal ARM projects
* typically cannot afford the overhead associated with C++
* exceptions handling.
*/
.ARM.exidx :
{
__exidx_start = ALIGN(4);
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > APP_FLASH AT> APP_FLASH
.ARM.extab :
{
__extab_start = ALIGN(4);
*(.ARM.extab*)
__extab_end = .;
} > APP_FLASH AT> APP_FLASH
.fast : /* This section contains code that is run from RAM after being loaded from flash - functions can be put in this section with the C attribute: __attribute__ ((section (".fast"))) */
{
link_run_from_ram_code_flash_location = LOADADDR( .fast ); /* This is the location in flash of the code */
link_run_from_ram_code_ram_location = .;
*(.fast .fast.* .text.fastcode)
link_run_from_ram_code_ram_end = .;
}> SRAM AT> APP_FLASH
.data : /* Contains the non-zero initialised global variables */
{
link_global_data_initial_values = LOADADDR( .data ); /* This is the location in flash of the initial values of global variables */
link_global_data_start = .;
*(.data*)
link_global_data_end = .;
. = ALIGN(., 4);
}> SRAM AT> APP_FLASH
.bss : /* Zero initialised memory used for zero initialised variables */
{
link_bss_location = ALIGN(., 4);
*(.bss*)
*(COMMON)
link_bss_end = .;
. = ALIGN(., 4);
}> SRAM AT> SRAM
/DISCARD/ :
{
*(.ARM.attributes*)
*(.comment)
*(.init)
*(.preinit)
*(.fini)
*(.fini_array)
*(.ARM.exidx*)
*(.gnu.linkonce.armexidx.*)
*(.eh_frame_hdr)
*(.eh_frame)
*(.gnu.linkonce.armextab.*)
*(.v4_bx)
*(.vfp11_veneer)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
*(.glue*)
}
_ram_end_ = ORIGIN(SRAM) + LENGTH(SRAM);
}
/**
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
*
*/
ENTRY( moc_app_main );
MEMORY
{
APP_FLASH (rx) : ORIGIN = 0x1F064000, LENGTH = 276K
SRAM (rwx) : ORIGIN = 0x0011C000, LENGTH = 48K
}
SECTIONS
{
.vectors :
{
. = ALIGN(4);
KEEP(*(*.user_handler))
. = ALIGN(., 4);
}>APP_FLASH AT> APP_FLASH
.text :
{
. = ALIGN(4);
link_code_location = .;
KEEP(*(.text.irq ))
*(.text .text.* .gnu.linkonce.t.*)
link_code_end = .;
. = ALIGN(0x4);
link_const_variable_data_location = .;
*(.rodata .rodata.* .gnu.linkonce.r.*)
link_const_variable_data_end = .;
. = ALIGN(0x4);
link_constructors_location = .;
KEEP(*(.preinit_array))
KEEP(*(.init_array))
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
link_constructors_end = .;
. = ALIGN(0x4);
link_destructors_location = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
link_destructors_end = .;
. = ALIGN(16);
}>APP_FLASH AT> APP_FLASH
/*
* The .ARM.exidx and .ARM.extab sections are used for C++ exception handling.
* It is located here for completeness. Bare-metal ARM projects
* typically cannot afford the overhead associated with C++
* exceptions handling.
*/
.ARM.exidx :
{
__exidx_start = ALIGN(4);
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > APP_FLASH AT> APP_FLASH
.ARM.extab :
{
__extab_start = ALIGN(4);
*(.ARM.extab*)
__extab_end = .;
} > APP_FLASH AT> APP_FLASH
.fast : /* This section contains code that is run from RAM after being loaded from flash - functions can be put in this section with the C attribute: __attribute__ ((section (".fast"))) */
{
link_run_from_ram_code_flash_location = LOADADDR( .fast ); /* This is the location in flash of the code */
link_run_from_ram_code_ram_location = .;
*(.fast .fast.* .text.fastcode)
link_run_from_ram_code_ram_end = .;
}> SRAM AT> APP_FLASH
.data : /* Contains the non-zero initialised global variables */
{
link_global_data_initial_values = LOADADDR( .data ); /* This is the location in flash of the initial values of global variables */
link_global_data_start = .;
*(.data*)
link_global_data_end = .;
. = ALIGN(., 4);
}> SRAM AT> APP_FLASH
.bss : /* Zero initialised memory used for zero initialised variables */
{
link_bss_location = ALIGN(., 4);
*(.bss*)
*(COMMON)
link_bss_end = .;
. = ALIGN(., 4);
}> SRAM AT> SRAM
/DISCARD/ :
{
*(.ARM.attributes*)
*(.comment)
*(.init)
*(.preinit)
*(.fini)
*(.fini_array)
*(.ARM.exidx*)
*(.gnu.linkonce.armexidx.*)
*(.eh_frame_hdr)
*(.eh_frame)
*(.gnu.linkonce.armextab.*)
*(.v4_bx)
*(.vfp11_veneer)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
*(.glue*)
}
_ram_end_ = ORIGIN(SRAM) + LENGTH(SRAM);
}

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@@ -1,141 +1,141 @@
/**
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
*
*/
ENTRY( moc_app_main );
MEMORY
{
APP_FLASH (rx) : ORIGIN = 0x1F064000, LENGTH = 952K
SRAM (rwx) : ORIGIN = 0x0011C000, LENGTH = 272K
}
SECTIONS
{
.vectors :
{
. = ALIGN(4);
KEEP(*(*.user_handler))
. = ALIGN(., 4);
}>APP_FLASH AT> APP_FLASH
.text :
{
. = ALIGN(4);
link_code_location = .;
KEEP(*(.text.irq ))
*(.text .text.* .gnu.linkonce.t.*)
link_code_end = .;
. = ALIGN(0x4);
link_const_variable_data_location = .;
*(.rodata .rodata.* .gnu.linkonce.r.*)
link_const_variable_data_end = .;
. = ALIGN(0x4);
link_constructors_location = .;
KEEP(*(.preinit_array))
KEEP(*(.init_array))
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
link_constructors_end = .;
. = ALIGN(0x4);
link_destructors_location = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
link_destructors_end = .;
. = ALIGN(16);
}>APP_FLASH AT> APP_FLASH
/*
* The .ARM.exidx and .ARM.extab sections are used for C++ exception handling.
* It is located here for completeness. Bare-metal ARM projects
* typically cannot afford the overhead associated with C++
* exceptions handling.
*/
.ARM.exidx :
{
__exidx_start = ALIGN(4);
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > APP_FLASH AT> APP_FLASH
.ARM.extab :
{
__extab_start = ALIGN(4);
*(.ARM.extab*)
__extab_end = .;
} > APP_FLASH AT> APP_FLASH
.fast : /* This section contains code that is run from RAM after being loaded from flash - functions can be put in this section with the C attribute: __attribute__ ((section (".fast"))) */
{
link_run_from_ram_code_flash_location = LOADADDR( .fast ); /* This is the location in flash of the code */
link_run_from_ram_code_ram_location = .;
*(.fast .fast.* .text.fastcode)
link_run_from_ram_code_ram_end = .;
}> SRAM AT> APP_FLASH
.data : /* Contains the non-zero initialised global variables */
{
link_global_data_initial_values = LOADADDR( .data ); /* This is the location in flash of the initial values of global variables */
link_global_data_start = .;
*(.data*)
link_global_data_end = .;
. = ALIGN(., 4);
}> SRAM AT> APP_FLASH
.bss : /* Zero initialised memory used for zero initialised variables */
{
link_bss_location = ALIGN(., 4);
*(.bss*)
*(COMMON)
link_bss_end = .;
. = ALIGN(., 4);
}> SRAM AT> SRAM
/DISCARD/ :
{
*(.ARM.attributes*)
*(.comment)
*(.init)
*(.preinit)
*(.fini)
*(.fini_array)
*(.ARM.exidx*)
*(.gnu.linkonce.armexidx.*)
*(.eh_frame_hdr)
*(.eh_frame)
*(.gnu.linkonce.armextab.*)
*(.v4_bx)
*(.vfp11_veneer)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
*(.glue*)
}
_ram_end_ = ORIGIN(SRAM) + LENGTH(SRAM);
}
/**
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
*
*/
ENTRY( moc_app_main );
MEMORY
{
APP_FLASH (rx) : ORIGIN = 0x1F064000, LENGTH = 952K
SRAM (rwx) : ORIGIN = 0x0011C000, LENGTH = 272K
}
SECTIONS
{
.vectors :
{
. = ALIGN(4);
KEEP(*(*.user_handler))
. = ALIGN(., 4);
}>APP_FLASH AT> APP_FLASH
.text :
{
. = ALIGN(4);
link_code_location = .;
KEEP(*(.text.irq ))
*(.text .text.* .gnu.linkonce.t.*)
link_code_end = .;
. = ALIGN(0x4);
link_const_variable_data_location = .;
*(.rodata .rodata.* .gnu.linkonce.r.*)
link_const_variable_data_end = .;
. = ALIGN(0x4);
link_constructors_location = .;
KEEP(*(.preinit_array))
KEEP(*(.init_array))
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
link_constructors_end = .;
. = ALIGN(0x4);
link_destructors_location = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
link_destructors_end = .;
. = ALIGN(16);
}>APP_FLASH AT> APP_FLASH
/*
* The .ARM.exidx and .ARM.extab sections are used for C++ exception handling.
* It is located here for completeness. Bare-metal ARM projects
* typically cannot afford the overhead associated with C++
* exceptions handling.
*/
.ARM.exidx :
{
__exidx_start = ALIGN(4);
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > APP_FLASH AT> APP_FLASH
.ARM.extab :
{
__extab_start = ALIGN(4);
*(.ARM.extab*)
__extab_end = .;
} > APP_FLASH AT> APP_FLASH
.fast : /* This section contains code that is run from RAM after being loaded from flash - functions can be put in this section with the C attribute: __attribute__ ((section (".fast"))) */
{
link_run_from_ram_code_flash_location = LOADADDR( .fast ); /* This is the location in flash of the code */
link_run_from_ram_code_ram_location = .;
*(.fast .fast.* .text.fastcode)
link_run_from_ram_code_ram_end = .;
}> SRAM AT> APP_FLASH
.data : /* Contains the non-zero initialised global variables */
{
link_global_data_initial_values = LOADADDR( .data ); /* This is the location in flash of the initial values of global variables */
link_global_data_start = .;
*(.data*)
link_global_data_end = .;
. = ALIGN(., 4);
}> SRAM AT> APP_FLASH
.bss : /* Zero initialised memory used for zero initialised variables */
{
link_bss_location = ALIGN(., 4);
*(.bss*)
*(COMMON)
link_bss_end = .;
. = ALIGN(., 4);
}> SRAM AT> SRAM
/DISCARD/ :
{
*(.ARM.attributes*)
*(.comment)
*(.init)
*(.preinit)
*(.fini)
*(.fini_array)
*(.ARM.exidx*)
*(.gnu.linkonce.armexidx.*)
*(.eh_frame_hdr)
*(.eh_frame)
*(.gnu.linkonce.armextab.*)
*(.v4_bx)
*(.vfp11_veneer)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
*(.glue*)
}
_ram_end_ = ORIGIN(SRAM) + LENGTH(SRAM);
}

142
mico-os/platform/MCU/MW3xx/IAR/copy_init3.c Executable file → Normal file
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@@ -1,71 +1,71 @@
/**************************************************
*
* Code that performs copy initialization of global data.
* New style init table.
*
* Copyright 2008 IAR Systems. All rights reserved.
*
* $Revision: 45563 $
*
**************************************************/
#include "data_init3.h"
#pragma language = extended
#pragma build_attribute vfpcc_compatible
#pragma build_attribute arm_thumb_compatible
#pragma build_attribute ropi_compatible
#pragma build_attribute rwpi_compatible
/* Format:
Size1
SrcAddr1-.
DestAddr1 /abs or SBrel)
Size2
SrcAddr2-.
DestAddr2 (abs or SBrel)
...
0
*/
__no_init uint32_t __iar_SB @ r9;
init_fun_t __iar_copy_init2;
#pragma type_attribute=__thumb __interwork
uint32_t const *
__iar_copy_init3(uint32_t const * p);
#pragma type_attribute=__thumb __interwork
uint32_t const *
__iar_copy_init3(uint32_t const * p)
{
uint32_t size;
while ((size = *p++) != 0)
{
uint32_t const * src;
uint32_t d;
uint32_t * dest;
src = (uint32_t*)((char const *)p + *(int32_t *)p);
p++;
d = *p++;
if( d & 1 )
{
d -= 1;
d += __iar_SB;
}
dest = (uint32_t *)d;
do
{
*dest++ = *src++;
size -= 4;
} while (size != 0);
}
return p;
}
/**************************************************
*
* Code that performs copy initialization of global data.
* New style init table.
*
* Copyright 2008 IAR Systems. All rights reserved.
*
* $Revision: 45563 $
*
**************************************************/
#include "data_init3.h"
#pragma language = extended
#pragma build_attribute vfpcc_compatible
#pragma build_attribute arm_thumb_compatible
#pragma build_attribute ropi_compatible
#pragma build_attribute rwpi_compatible
/* Format:
Size1
SrcAddr1-.
DestAddr1 /abs or SBrel)
Size2
SrcAddr2-.
DestAddr2 (abs or SBrel)
...
0
*/
__no_init uint32_t __iar_SB @ r9;
init_fun_t __iar_copy_init2;
#pragma type_attribute=__thumb __interwork
uint32_t const *
__iar_copy_init3(uint32_t const * p);
#pragma type_attribute=__thumb __interwork
uint32_t const *
__iar_copy_init3(uint32_t const * p)
{
uint32_t size;
while ((size = *p++) != 0)
{
uint32_t const * src;
uint32_t d;
uint32_t * dest;
src = (uint32_t*)((char const *)p + *(int32_t *)p);
p++;
d = *p++;
if( d & 1 )
{
d -= 1;
d += __iar_SB;
}
dest = (uint32_t *)d;
do
{
*dest++ = *src++;
size -= 4;
} while (size != 0);
}
return p;
}

0
mico-os/platform/MCU/MW3xx/IAR/data_init3.c Executable file → Normal file
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0
mico-os/platform/MCU/MW3xx/IAR/data_init3.h Executable file → Normal file
View File

58
mico-os/platform/MCU/MW3xx/IAR/user_app.icf Executable file → Normal file
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@@ -1,30 +1,30 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x1f064000;
define symbol __ICFEDIT_region_ROM_end__ = 0x1f0A9000;
define symbol __ICFEDIT_region_RAM_start__ = 0x0011C000;
define symbol __ICFEDIT_region_RAM_end__ = 0x00128000;
/*-Sizes-*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block heap_start with fixed order{ section .ram_data_end};
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_region_ROM_start__ { section user_header_section };
place in ROM_region { readonly };
place at start of RAM_region {readwrite};
place in RAM_region { block heap_start};
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x1f064000;
define symbol __ICFEDIT_region_ROM_end__ = 0x1f0A9000;
define symbol __ICFEDIT_region_RAM_start__ = 0x0011C000;
define symbol __ICFEDIT_region_RAM_end__ = 0x00128000;
/*-Sizes-*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block heap_start with fixed order{ section .ram_data_end};
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_region_ROM_start__ { section user_header_section };
place in ROM_region { readonly };
place at start of RAM_region {readwrite};
place in RAM_region { block heap_start};
define exported symbol _ram_end_ = __ICFEDIT_region_RAM_end__;

0
mico-os/platform/MCU/MW3xx/IAR/zero_init3.c Executable file → Normal file
View File

View File

@@ -1,134 +1,129 @@
#
# UNPUBLISHED PROPRIETARY SOURCE CODE
# Copyright (c) 2016 MXCHIP Inc.
#
# The contents of this file may not be disclosed to third parties, copied or
# duplicated in any form, in whole or in part, without the prior written
# permission of MXCHIP Corporation.
#
NAME = MW3xx
# Host architecture is ARM Cortex M4
HOST_ARCH := Cortex-M4
# Host MCU alias for OpenOCD
HOST_OPENOCD := mw3xx
ifeq ($(MODULE),3031B)
HOST_ARCH := Cortex-M4F
endif
ifneq (,$(filter $(HOST_MCU_VARIANT), MW310))
GLOBAL_DEFINES += MW310 CONFIG_VARIANT_MW310
endif
GLOBAL_DEFINES += __FPU_PRESENT
# Global flags
GLOBAL_CFLAGS += $$(CPU_CFLAGS) $$(ENDIAN_CFLAGS_LITTLE)
GLOBAL_CXXFLAGS += $$(CPU_CXXFLAGS) $$(ENDIAN_CXXFLAGS_LITTLE)
GLOBAL_ASMFLAGS += $$(CPU_ASMFLAGS) $$(ENDIAN_ASMFLAGS_LITTLE)
GLOBAL_LDFLAGS += $$(CPU_LDFLAGS) $$(ENDIAN_LDFLAGS_LITTLE)
GLOBAL_LDFLAGS += -nostartfiles
GLOBAL_LDFLAGS += -Wl,--defsym,__STACKSIZE__=$$($(RTOS)_START_STACK)
GLOBAL_LDFLAGS += -L ./platform/MCU/$(NAME)/$(TOOLCHAIN_NAME)
# Components
$(NAME)_COMPONENTS += $(TOOLCHAIN_NAME)
GLOBAL_INCLUDES := . \
.. \
../.. \
../../include \
../../$(TOOLCHAIN_NAME) \
../../$(HOST_ARCH) \
../../$(HOST_ARCH)/CMSIS \
interface \
peripherals \
peripherals/sdk/src/incl/sdk \
peripherals/sdk/src/incl/platform/os/micortos \
peripherals/sdk/src/incl/sdk/drivers \
peripherals/sdk/src/incl/sdk/drivers/mw300 \
peripherals/sdk/src/incl/sdk/drivers/mw300/regs \
$(NAME)_SOURCES := ../../$(HOST_ARCH)/crt0_$(TOOLCHAIN_NAME).c \
../../$(HOST_ARCH)/platform_core.c \
../platform_nsclock.c
$(NAME)_CFLAGS += -Wno-implicit-function-declaration -Wno-unused-variable
# These need to be forced into the final ELF since they are not referenced otherwise
$(NAME)_LINK_FILES := ../../$(HOST_ARCH)/crt0_$(TOOLCHAIN_NAME).o
ifneq ($(filter $(subst ., ,$(COMPONENTS)),mocOS),)
####################################################################################
# MOC application
####################################################################################
$(NAME)_SOURCES += ../moc_platform_common.c
else
####################################################################################
# Building stand-alone image( sub build: spi_flash_write )
####################################################################################
$(NAME)_SOURCES += platform_vector_table.c \
GCC/platform_unhandled_isr.c \
../../$(HOST_ARCH)/hardfault_handler.c \
../mico_platform_common.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_pmu.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_pinmux.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_driver.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_clock.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_flash.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_flashc.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_qspi.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_uart.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_crc.c \
peripherals/sdk/src/drivers/mw300/mdev_iflash.c \
peripherals/sdk/src/drivers/common/mdev_crc.c \
peripherals/sdk/src/core/util/crc/crc32.c \
peripherals/sdk/src/core/util/arc4.c \
peripherals/sdk/src/core/partition/partition.c \
peripherals/sdk/src/core/mdev/mdev.c \
peripherals/sdk/src/core/util/flash.c \
peripherals/sdk/src/core/util/boot_flags.c \
peripherals/boot2/boot2.c \
peripherals/boot2/utils/crc32.c \
peripherals/platform_uart.c \
peripherals/platform_flash.c \
platform_init.c
GLOBAL_INCLUDES += peripherals/boot2
GLOBAL_DEFINES += CONFIG_FLASH_PARTITION_COUNT=10 \
CONFIG_CPU_MW300 \
ARM_GNU
$(NAME)_LINK_FILES += ../../$(HOST_ARCH)/hardfault_handler.o \
platform_vector_table.o
endif
ifneq ($(filter spi_flash_write, $(APP)),)
####################################################################################
# Building spi_flash_write
####################################################################################
DEFAULT_LINK_SCRIPT := $(TOOLCHAIN_NAME)/app_ram$(LINK_SCRIPT_SUFFIX)
GLOBAL_DEFINES += __JTAG_FLASH_WRITER_DATA_BUFFER_SIZE__=16384
else
ifneq ($(filter $(subst ., ,$(COMPONENTS)),mocOS),)
####################################################################################
# Building standard moc application
####################################################################################
ifeq ($(MODULE),3031B)
DEFAULT_LINK_SCRIPT := $(TOOLCHAIN_NAME)/app_with_moc_b$(LINK_SCRIPT_SUFFIX)
else
DEFAULT_LINK_SCRIPT := $(TOOLCHAIN_NAME)/app_with_moc$(LINK_SCRIPT_SUFFIX)
endif
endif # APP=moc
endif # APP=spi_flash_write
#
# UNPUBLISHED PROPRIETARY SOURCE CODE
# Copyright (c) 2016 MXCHIP Inc.
#
# The contents of this file may not be disclosed to third parties, copied or
# duplicated in any form, in whole or in part, without the prior written
# permission of MXCHIP Corporation.
#
NAME = MW3xx
# Host architecture is ARM Cortex M4
HOST_ARCH := Cortex-M4
# Host MCU alias for OpenOCD
HOST_OPENOCD := mw3xx
ifeq ($(MODULE),3031B)
HOST_ARCH := Cortex-M4F
endif
ifneq (,$(filter $(HOST_MCU_VARIANT), MW310))
GLOBAL_DEFINES += MW310 CONFIG_VARIANT_MW310
endif
GLOBAL_DEFINES += __FPU_PRESENT
# Global flags
GLOBAL_CFLAGS += $$(CPU_CFLAGS) $$(ENDIAN_CFLAGS_LITTLE)
GLOBAL_CXXFLAGS += $$(CPU_CXXFLAGS) $$(ENDIAN_CXXFLAGS_LITTLE)
GLOBAL_ASMFLAGS += $$(CPU_ASMFLAGS) $$(ENDIAN_ASMFLAGS_LITTLE)
GLOBAL_LDFLAGS += $$(CPU_LDFLAGS) $$(ENDIAN_LDFLAGS_LITTLE)
GLOBAL_LDFLAGS += -nostartfiles
GLOBAL_LDFLAGS += -Wl,--defsym,__STACKSIZE__=$$($(RTOS)_START_STACK)
GLOBAL_LDFLAGS += -L ./platform/MCU/$(NAME)/$(TOOLCHAIN_NAME)
# Components
$(NAME)_COMPONENTS += $(TOOLCHAIN_NAME)
GLOBAL_INCLUDES := . \
.. \
../.. \
../../include \
../../$(TOOLCHAIN_NAME) \
../../$(HOST_ARCH) \
../../$(HOST_ARCH)/CMSIS \
interface \
peripherals \
peripherals/sdk/src/incl/sdk \
peripherals/sdk/src/incl/platform/os/micortos \
peripherals/sdk/src/incl/sdk/drivers \
peripherals/sdk/src/incl/sdk/drivers/mw300 \
peripherals/sdk/src/incl/sdk/drivers/mw300/regs \
$(NAME)_SOURCES := ../../$(HOST_ARCH)/crt0_$(TOOLCHAIN_NAME).c \
../../$(HOST_ARCH)/platform_core.c \
../platform_nsclock.c
$(NAME)_CFLAGS += -Wno-implicit-function-declaration -Wno-unused-variable
ifneq ($(filter $(subst ., ,$(COMPONENTS)),mocOS),)
####################################################################################
# MOC application
####################################################################################
$(NAME)_SOURCES += ../moc_platform_common.c
else
####################################################################################
# Building stand-alone image( sub build: spi_flash_write )
####################################################################################
$(NAME)_SOURCES += platform_vector_table.c \
GCC/platform_unhandled_isr.c \
../../$(HOST_ARCH)/hardfault_handler.c \
../mico_platform_common.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_pmu.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_pinmux.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_driver.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_clock.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_flash.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_flashc.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_qspi.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_uart.c \
peripherals/sdk/src/drivers/mw300/lowlevel/mw300_crc.c \
peripherals/sdk/src/drivers/mw300/mdev_iflash.c \
peripherals/sdk/src/drivers/common/mdev_crc.c \
peripherals/sdk/src/core/util/crc/crc32.c \
peripherals/sdk/src/core/util/arc4.c \
peripherals/sdk/src/core/partition/partition.c \
peripherals/sdk/src/core/mdev/mdev.c \
peripherals/sdk/src/core/util/flash.c \
peripherals/sdk/src/core/util/boot_flags.c \
peripherals/boot2/boot2.c \
peripherals/boot2/utils/crc32.c \
peripherals/platform_uart.c \
peripherals/platform_flash.c \
platform_init.c
GLOBAL_INCLUDES += peripherals/boot2
GLOBAL_DEFINES += CONFIG_FLASH_PARTITION_COUNT=10 \
CONFIG_CPU_MW300 \
ARM_GNU
endif
ifneq ($(filter spi_flash_write, $(APP)),)
####################################################################################
# Building spi_flash_write
####################################################################################
DEFAULT_LINK_SCRIPT := $(TOOLCHAIN_NAME)/app_ram$(LINK_SCRIPT_SUFFIX)
GLOBAL_DEFINES += __JTAG_FLASH_WRITER_DATA_BUFFER_SIZE__=16384
else
ifneq ($(filter $(subst ., ,$(COMPONENTS)),mocOS),)
####################################################################################
# Building standard moc application
####################################################################################
ifeq ($(MODULE),3031B)
DEFAULT_LINK_SCRIPT := $(TOOLCHAIN_NAME)/app_with_moc_b$(LINK_SCRIPT_SUFFIX)
else
DEFAULT_LINK_SCRIPT := $(TOOLCHAIN_NAME)/app_with_moc$(LINK_SCRIPT_SUFFIX)
endif
endif # APP=moc
endif # APP=spi_flash_write

18
mico-os/platform/MCU/MW3xx/flashloader/mw310.board Executable file → Normal file
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@@ -1,9 +1,9 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<loader>$PROJ_DIR$\..\..\..\..\Platform\MCU\MW3xx\flashloader\mw310.flash</loader>
</pass>
</flash_board>
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<loader>$PROJ_DIR$\..\..\..\..\Platform\MCU\MW3xx\flashloader\mw310.flash</loader>
</pass>
</flash_board>

16
mico-os/platform/MCU/MW3xx/flashloader/mw310.flash Executable file → Normal file
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@@ -1,8 +1,8 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_device>
<exe>$PROJ_DIR$\..\..\..\..\Platform\MCU\MW3xx\flashloader\mw310_flash.out</exe>
<page>256</page>
<block>512 0x1000</block>
<flash_base>0x1f000000</flash_base>
</flash_device>
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_device>
<exe>$PROJ_DIR$\..\..\..\..\Platform\MCU\MW3xx\flashloader\mw310_flash.out</exe>
<page>256</page>
<block>512 0x1000</block>
<flash_base>0x1f000000</flash_base>
</flash_device>

18
mico-os/platform/MCU/MW3xx/flashloader/mw310_all.board Executable file → Normal file
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@@ -1,9 +1,9 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<loader>$PROJ_DIR$\..\..\..\..\Platform\MCU\MW3xx\flashloader\mw310_all.flash</loader>
</pass>
</flash_board>
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<loader>$PROJ_DIR$\..\..\..\..\Platform\MCU\MW3xx\flashloader\mw310_all.flash</loader>
</pass>
</flash_board>

16
mico-os/platform/MCU/MW3xx/flashloader/mw310_all.flash Executable file → Normal file
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@@ -1,8 +1,8 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_device>
<exe>$PROJ_DIR$\..\..\..\..\Platform\MCU\MW3xx\flashloader\mw310_flash_all.out</exe>
<page>256</page>
<block>512 0x1000</block>
<flash_base>0x1f000000</flash_base>
</flash_device>
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_device>
<exe>$PROJ_DIR$\..\..\..\..\Platform\MCU\MW3xx\flashloader\mw310_flash_all.out</exe>
<page>256</page>
<block>512 0x1000</block>
<flash_base>0x1f000000</flash_base>
</flash_device>

0
mico-os/platform/MCU/MW3xx/flashloader/mw310_flash.out Executable file → Normal file
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0
mico-os/platform/MCU/MW3xx/interface/crc.h Executable file → Normal file
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44
mico-os/platform/MCU/MW3xx/interface/flash_all.icf Executable file → Normal file
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@@ -1,22 +1,22 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x1f000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x1f200000;
define symbol __ICFEDIT_region_RAM_start__ = 0x0011C000;
define symbol __ICFEDIT_region_RAM_end__ = 0x00128000;
/*-Sizes-*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
place at start of ROM_region {section MYSEC};
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x1f000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x1f200000;
define symbol __ICFEDIT_region_RAM_start__ = 0x0011C000;
define symbol __ICFEDIT_region_RAM_end__ = 0x00128000;
/*-Sizes-*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
place at start of ROM_region {section MYSEC};

8
mico-os/platform/MCU/MW3xx/interface/flashall.c Executable file → Normal file
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@@ -1,4 +1,4 @@
int main(void)
{
return 0;
}
int main(void)
{
return 0;
}

View File

@@ -1,38 +1,38 @@
#ifndef _MICO_REDIRECV_HEADERS
#define _MICO_REDIRECV_HEADERS
#define _STDLIB // stdlib.h
#define _STRING // string.h
#define _STDDEF
#define _STDIO
#define _CTYPE
#define _LIMITS
#define _STDARG
#define NULL 0
#define ULONG_MAX 0xFFFFFFFFul
typedef int ssize_t;
typedef unsigned int size_t;
typedef unsigned int ptrdiff_t;
void * memset(void * _D, int _C, unsigned int _N);
void * memmove(void * _D, const void * _S, unsigned int _N);
void * memcpy(void * _D, const void * _S, unsigned int _N);
char *strrchr(char *_S, int _C);
char *strstr(char *_S, char *_P);
char *strchr(const char *_S, int _C);
void *memchr(void *_S, int _C, size_t _N);
char *strpbrk(char *_S, const char *_P);
int memcmp(const void *s1, const void *s2, size_t n);
void* malloc(size_t size); // malloc
void* realloc(void* pv, size_t size); // realloc
void free(void* pv); //free
void* calloc(int a, int b); // calloc
char * strdup(const char *);
#ifndef _MICO_REDIRECV_HEADERS
#define _MICO_REDIRECV_HEADERS
#define _STDLIB // stdlib.h
#define _STRING // string.h
#define _STDDEF
#define _STDIO
#define _CTYPE
#define _LIMITS
#define _STDARG
#define NULL 0
#define ULONG_MAX 0xFFFFFFFFul
typedef int ssize_t;
typedef unsigned int size_t;
typedef unsigned int ptrdiff_t;
void * memset(void * _D, int _C, unsigned int _N);
void * memmove(void * _D, const void * _S, unsigned int _N);
void * memcpy(void * _D, const void * _S, unsigned int _N);
char *strrchr(char *_S, int _C);
char *strstr(char *_S, char *_P);
char *strchr(const char *_S, int _C);
void *memchr(void *_S, int _C, size_t _N);
char *strpbrk(char *_S, const char *_P);
int memcmp(const void *s1, const void *s2, size_t n);
void* malloc(size_t size); // malloc
void* realloc(void* pv, size_t size); // realloc
void free(void* pv); //free
void* calloc(int a, int b); // calloc
char * strdup(const char *);
#endif

46
mico-os/platform/MCU/MW3xx/interface/preload.mac Executable file → Normal file
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@@ -1,24 +1,24 @@
execUserPreload()
{
__message "User Preload....";
__hwResetRunToBp(4, 0x0124000, 10); // stratege 4 always load bootloader in ROM .
// __delay(10);
}
execUserSetup()
{
__message "User Setup....";
__writeMemory32(0x00c89346, 0x480C0100, "Memory"); __delay(10); // disable wdt
}
execUserReset()
{
__message "User Reset....";
}
execUserExit()
{
__message "User exit....";
__writeMemory32(0, 0x480C0100, "Memory"); __delay(10); // enable wdt
execUserPreload()
{
__message "User Preload....";
__hwResetRunToBp(4, 0x0124000, 10); // stratege 4 always load bootloader in ROM .
// __delay(10);
}
execUserSetup()
{
__message "User Setup....";
__writeMemory32(0x00c89346, 0x480C0100, "Memory"); __delay(10); // disable wdt
}
execUserReset()
{
__message "User Reset....";
}
execUserExit()
{
__message "User exit....";
__writeMemory32(0, 0x480C0100, "Memory"); __delay(10); // enable wdt
}

58
mico-os/platform/MCU/MW3xx/interface/user_app.icf Executable file → Normal file
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@@ -1,30 +1,30 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x1f064000;
define symbol __ICFEDIT_region_ROM_end__ = 0x1f0A9000;
define symbol __ICFEDIT_region_RAM_start__ = 0x0011C000;
define symbol __ICFEDIT_region_RAM_end__ = 0x00128000;
/*-Sizes-*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block heap_start with fixed order{ section .ram_data_end};
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_region_ROM_start__ { section user_header_section };
place in ROM_region { readonly };
place at start of RAM_region {readwrite};
place in RAM_region { block heap_start};
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x1f064000;
define symbol __ICFEDIT_region_ROM_end__ = 0x1f0A9000;
define symbol __ICFEDIT_region_RAM_start__ = 0x0011C000;
define symbol __ICFEDIT_region_RAM_end__ = 0x00128000;
/*-Sizes-*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block heap_start with fixed order{ section .ram_data_end};
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_region_ROM_start__ { section user_header_section };
place in ROM_region { readonly };
place at start of RAM_region {readwrite};
place in RAM_region { block heap_start};
define exported symbol _ram_end_ = __ICFEDIT_region_RAM_end__;

36
mico-os/platform/MCU/MW3xx/merge/config.ini Executable file → Normal file
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@@ -1,18 +1,18 @@
[total]
number=0x04
output=full.bin
[bin1]
name=boot2.bin
offset=0
[bin2]
name=mico_ota.bin
offset=0x6000
[bin3]
name=uart_wifi_bridge.bin
offset=0x160000
[bin4]
name=mw30x_uapsta_14.76.36.p84.bin
offset=0x1a0000
[total]
number=0x04
output=full.bin
[bin1]
name=boot2.bin
offset=0
[bin2]
name=mico_ota.bin
offset=0x6000
[bin3]
name=uart_wifi_bridge.bin
offset=0x160000
[bin4]
name=mw30x_uapsta_14.76.36.p84.bin
offset=0x1a0000

0
mico-os/platform/MCU/MW3xx/merge/merge.exe Executable file → Normal file
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@@ -1,52 +1,56 @@
#ifndef _LWIP_API_DEFINE_
#define _LWIP_API_DEFINE_
#include "stdint.h"
#include "mico_socket.h"
typedef struct ip_addr {
uint32_t addr;
} ip_addr_t;
typedef struct _lwip_api_ {
int (*lwip_accept)(int s, struct sockaddr *addr, socklen_t *addrlen);
int (*lwip_bind)(int s, const struct sockaddr *name, socklen_t namelen);
int (*lwip_shutdown)(int s, int how);
int (*lwip_getpeername) (int s, struct sockaddr *name, socklen_t *namelen);
int (*lwip_getsockname) (int s, struct sockaddr *name, socklen_t *namelen);
int (*lwip_getsockopt) (int s, int level, int optname, void *optval, socklen_t *optlen);
int (*lwip_setsockopt) (int s, int level, int optname, const void *optval, socklen_t optlen);
int (*lwip_close)(int s);
int (*lwip_connect)(int s, const struct sockaddr *name, socklen_t namelen);
int (*lwip_listen)(int s, int backlog);
int (*lwip_recv)(int s, void *mem, size_t len, int flags);
int (*lwip_read)(int s, void *mem, size_t len);
int (*lwip_recvfrom)(int s, void *mem, size_t len, int flags,
struct sockaddr *from, socklen_t *fromlen);
int (*lwip_send)(int s, const void *dataptr, size_t size, int flags);
int (*lwip_sendto)(int s, const void *dataptr, size_t size, int flags,
const struct sockaddr *to, socklen_t tolen);
int (*lwip_socket)(int domain, int type, int protocol);
int (*lwip_write)(int s, const void *dataptr, size_t size);
int (*lwip_select)(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset,
struct timeval *timeout);
int (*lwip_ioctl)(int s, long cmd, void *argp);
int (*lwip_fcntl)(int s, int cmd, int val);
void (*lwip_freeaddrinfo)(struct addrinfo *ai);
int (*lwip_getaddrinfo)(const char *nodename,
const char *servname,
const struct addrinfo *hints,
struct addrinfo **res);
char * (*ipaddr_ntoa)(const ip_addr_t *addr);
uint32_t (*ipaddr_addr)(const char *cp);
struct hostent * (*lwip_gethostbyname) (const char *name);
char *(*sethostname)( char *name );
char* (*get_dhcp_classid)( void );
char* (*set_dhcp_classid)( char *classid );
} lwip_api_t;
#endif
#ifndef _LWIP_API_DEFINE_
#define _LWIP_API_DEFINE_
#include "stdint.h"
#include "mico_socket.h"
typedef struct ip_addr {
uint32_t addr;
} ip_addr_t;
typedef struct _lwip_api_ {
int (*lwip_accept)(int s, struct sockaddr *addr, socklen_t *addrlen);
int (*lwip_bind)(int s, const struct sockaddr *name, socklen_t namelen);
int (*lwip_shutdown)(int s, int how);
int (*lwip_getpeername) (int s, struct sockaddr *name, socklen_t *namelen);
int (*lwip_getsockname) (int s, struct sockaddr *name, socklen_t *namelen);
int (*lwip_getsockopt) (int s, int level, int optname, void *optval, socklen_t *optlen);
int (*lwip_setsockopt) (int s, int level, int optname, const void *optval, socklen_t optlen);
int (*lwip_close)(int s);
int (*lwip_connect)(int s, const struct sockaddr *name, socklen_t namelen);
int (*lwip_listen)(int s, int backlog);
int (*lwip_recv)(int s, void *mem, size_t len, int flags);
int (*lwip_read)(int s, void *mem, size_t len);
int (*lwip_recvfrom)(int s, void *mem, size_t len, int flags,
struct sockaddr *from, socklen_t *fromlen);
int (*lwip_send)(int s, const void *dataptr, size_t size, int flags);
int (*lwip_sendto)(int s, const void *dataptr, size_t size, int flags,
const struct sockaddr *to, socklen_t tolen);
int (*lwip_socket)(int domain, int type, int protocol);
int (*lwip_write)(int s, const void *dataptr, size_t size);
int (*lwip_select)(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset,
struct timeval *timeout);
int (*lwip_ioctl)(int s, long cmd, void *argp);
int (*lwip_fcntl)(int s, int cmd, int val);
void (*lwip_freeaddrinfo)(struct addrinfo *ai);
int (*lwip_getaddrinfo)(const char *nodename,
const char *servname,
const struct addrinfo *hints,
struct addrinfo **res);
char * (*ipaddr_ntoa)(const ip_addr_t *addr);
uint32_t (*ipaddr_addr)(const char *cp);
struct hostent * (*lwip_gethostbyname) (const char *name);
char *(*sethostname)( char *name );
char* (*get_dhcp_classid)( void );
char* (*set_dhcp_classid)( char *classid );
/* For inet_ntop and inet_pton */
const char * (*inet_ntop) (int af, const void *cp, char *buf, socklen_t len);
int (*inet_pton) (int af, const char *cp, void *buf);
} lwip_api_t;
#endif

File diff suppressed because it is too large Load Diff

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@@ -1,482 +1,495 @@
#ifndef _MICO_API_H_
#define _MICO_API_H_
#include "lwip_api_define.h"
#include "mico.h"
#define INTERFACE_VERSION 1
typedef void (*ssl_Logging_cb)( const int logLevel,
const char * const logMessage );
typedef enum
{
/** US FCC */
COUNTRY_US = 1,
/** IC Canada */
COUNTRY_CA,
/** Singapore */
COUNTRY_SG,
/** ETSI */
COUNTRY_EU,
/** Australia */
COUNTRY_AU,
/** Republic Of Korea */
COUNTRY_KR,
/** France */
COUNTRY_FR,
/** Japan */
COUNTRY_JP,
/** China */
COUNTRY_CN,
} country_code_t;
enum wlan_bss_type
{
WLAN_BSS_TYPE_STA = 0,
WLAN_BSS_TYPE_UAP = 1,
WLAN_BSS_TYPE_WIFIDIRECT = 2,
WLAN_BSS_TYPE_ANY = 0xff,
};
typedef enum
{
ASSOC_REQ_FRAME = 0x00,
ASSOC_RESP_FRAME = 0x10,
REASSOC_REQ_FRAME = 0x20,
REASSOC_RESP_FRAME = 0x30,
PROBE_REQ_FRAME = 0x40,
PROBE_RESP_FRAME = 0x50,
BEACON_FRAME = 0x80,
DISASSOC_FRAME = 0xA0,
AUTH_FRAME = 0xB0,
DEAUTH_FRAME = 0xC0,
ACTION_FRAME = 0xD0,
DATA_FRAME = 0x08,
QOS_DATA_FRAME = 0x88,
} wifi_frame_type_t;
/** 802_11_header packet */
typedef struct _wifi_mgmt_frame_t
{
/** Packet Length */
uint16_t frm_len;
/** Frame Type */
wifi_frame_type_t frame_type;
/** Frame Control flags */
uint8_t frame_ctrl_flags;
/** Duration ID */
uint16_t duration_id;
/** Address1 */
uint8_t addr1[6];
/** Address2 */
uint8_t addr2[6];
/** Address3 */
uint8_t addr3[6];
/** Sequence Control */
uint16_t seq_ctl;
/** Address4 */
uint8_t addr4[6];
/** Frame payload */
uint8_t payload[0];
} wlan_mgmt_frame_t;
typedef struct
{
OSStatus (*pwm_init)( mico_pwm_t pwm, uint32_t frequency, float duty_cycle );
OSStatus (*pwm_start)( mico_pwm_t pwm );
OSStatus (*pwm_stop)( mico_pwm_t pwm );
} pwm_api_t;
typedef struct
{
OSStatus (*wdg_init)( uint32_t timeout );
void (*wdg_reload)( void );
OSStatus (*wdg_stop)( void );
} wdg_api_t;
#define LAST_RST_CAUSE_VBAT (1<<0)
#define LAST_RST_CAUSE_AV12 (1<<1)
#define LAST_RST_CAUSE_AV18 (1<<2)
#define LAST_RST_CAUSE_SOFTRST (1<<3)
#define LAST_RST_CAUSE_LOCKUP (1<<4)
#define LAST_RST_CAUSE_WDT (1<<5)
#define USER_APP_ADDR 0x1f064000 /* 400KB offset */
#define USER_MAGIC_NUM 0xC89346
#define time_t unsigned long
/** Power States of MCU */
typedef enum
{
/** (Active Mode): This is the full power state of MCU.
* Instruction execution takes place only in PM0.
*/
PM0,
/** (Idle Mode): In this mode Cortex M3 core function
* clocks are stopped until the occurrence of any interrupt.
* This consumes lower power than PM0. */
PM1,
/** (Standby Mode):In this mode, the Cortex M3,
* most of the peripherals & SRAM arrays are in
* low-power mode.The PMU and RTC are operational.
* A wakeup can happen by timeout (RTC based) or by asserting the
* WAKEUP 0/1 lines.This consumes much lower power than PM1.
*/
PM2,
/**(Sleep Mode): This mode further aggressively conserves power.
* Only 192 KB (160 KB in SRAM0 and 32 KB in SRAM1)
* out of 512 KB of SRAM is alive. All peripherals
* are turned off and register config is lost.
* Application should restore the peripheral config
* after exit form PM3. This consumes lower power
* than in PM2. A wakeup can happen by timeout (RTC based)
* or by asserting the WAKEUP 0/1 lines.
*/
PM3,
/** (Shutoff Mode): This simulates a shutdown condition.
* A wakeup can happen by timeout (RTC based) or by
* asserting the WAKEUP 0/1 lines.
* This is the lowest power state of MCU.
* On wakeup execution begins from bootrom as
* if a fresh bootup has occurred.
*/
PM4
} power_state_t;
typedef struct
{
OSStatus (*MicoAdcInitialize)( mico_adc_t adc, uint32_t sampling_cycle );
OSStatus (*MicoAdcTakeSample)( mico_adc_t adc, uint16_t* output );
OSStatus (*MicoAdcTakeSampleStreram)( mico_adc_t adc, void* buffer, uint16_t buffer_length );
OSStatus (*MicoAdcFinalize)( mico_adc_t adc );
} adc_api_t;
typedef struct
{
OSStatus (*i2c_init)( mico_i2c_device_t* device );
OSStatus (*i2c_deinit)( mico_i2c_device_t* device );
bool (*i2c_probe_device)( mico_i2c_device_t* device, int retries );
OSStatus (*i2c_build_tx_msg)( mico_i2c_message_t* message, const void* tx_buffer, uint16_t tx_buffer_length,
uint16_t retries );
OSStatus (*i2c_build_rx_msg)( mico_i2c_message_t* message, void* rx_buffer, uint16_t rx_buffer_length,
uint16_t retries );
OSStatus (*i2c_build_combined_msg)( mico_i2c_message_t* message, const void* tx_buffer, void* rx_buffer,
uint16_t tx_buffer_length, uint16_t rx_buffer_length, uint16_t retries );
OSStatus (*i2c_transfer)( mico_i2c_device_t* device, mico_i2c_message_t* messages, uint16_t number_of_messages );
} i2c_api_t;
typedef struct
{
OSStatus (*spi_init)( const mico_spi_device_t* spi );
OSStatus (*spi_transfer)( const mico_spi_device_t* spi, const mico_spi_message_segment_t* segments,
uint16_t number_of_segments );
OSStatus (*spi_finalize)( const mico_spi_device_t* spi );
} spi_api_t;
/* API type define */
typedef struct mico_api_struct
{
char *library_version;
/* OS Layer*/
mico_system_config_t* (*system_config_get)( void );
void (*system_config_set)( mico_system_config_t *cfg );
void (*mxchipInit)( );
OSStatus (*mico_rtos_create_thread)( mico_thread_t* thread, uint8_t priority, const char* name,
mico_thread_function_t function, uint32_t stack_size, void* arg );
OSStatus (*mico_rtos_delete_thread)( mico_thread_t* thread );
void (*mico_rtos_suspend_thread)( mico_thread_t* thread );
void (*mico_rtos_suspend_all_thread)( void );
long (*mico_rtos_resume_all_thread)( void );
OSStatus (*mico_rtos_thread_join)( mico_thread_t* thread );
OSStatus (*mico_rtos_thread_force_awake)( mico_thread_t* thread );
bool (*mico_rtos_is_current_thread)( mico_thread_t* thread );
void (*mico_thread_sleep)( uint32_t seconds );
void (*mico_thread_msleep)( uint32_t milliseconds );
OSStatus (*mico_rtos_init_semaphore)( mico_semaphore_t* semaphore, int count );
OSStatus (*mico_rtos_set_semaphore)( mico_semaphore_t* semaphore );
OSStatus (*mico_rtos_get_semaphore)( mico_semaphore_t* semaphore, uint32_t timeout_ms );
OSStatus (*mico_rtos_deinit_semaphore)( mico_semaphore_t* semaphore );
OSStatus (*mico_rtos_init_mutex)( mico_mutex_t* mutex );
OSStatus (*mico_rtos_lock_mutex)( mico_mutex_t* mutex );
OSStatus (*mico_rtos_unlock_mutex)( mico_mutex_t* mutex );
OSStatus (*mico_rtos_deinit_mutex)( mico_mutex_t* mutex );
OSStatus (*mico_rtos_init_queue)( mico_queue_t* queue, const char* name, uint32_t message_size,
uint32_t number_of_messages );
OSStatus (*mico_rtos_push_to_queue)( mico_queue_t* queue, void* message, uint32_t timeout_ms );
OSStatus (*mico_rtos_pop_from_queue)( mico_queue_t* queue, void* message, uint32_t timeout_ms );
OSStatus (*mico_rtos_deinit_queue)( mico_queue_t* queue );
bool (*mico_rtos_is_queue_empty)( mico_queue_t* queue );
OSStatus (*mico_rtos_is_queue_full)( mico_queue_t* queue );
uint32_t (*mico_get_time)( void );
OSStatus (*mico_init_timer)( mico_timer_t* timer, uint32_t time_ms, timer_handler_t function, void* arg );
OSStatus (*mico_start_timer)( mico_timer_t* timer );
OSStatus (*mico_stop_timer)( mico_timer_t* timer );
OSStatus (*mico_reload_timer)( mico_timer_t* timer );
OSStatus (*mico_deinit_timer)( mico_timer_t* timer );
bool (*mico_is_timer_running)( mico_timer_t* timer );
int (*mico_create_event_fd)( mico_event_t handle );
int (*mico_delete_event_fd)( int fd );
int (*SetTimer)( unsigned long ms, void (*psysTimerHandler)( void ) );
int (*SetTimer_uniq)( unsigned long ms, void (*psysTimerHandler)( void ) );
int (*UnSetTimer)( void (*psysTimerHandler)( void ) );
/* memory management*/
micoMemInfo_t* (*mico_memory_info)( void );
void* (*malloc)( size_t size ); // malloc
void* (*realloc)( void* pv, size_t size ); // realloc
void (*free)( void* pv ); //free
void* (*calloc)( int a, int b ); // calloc
void (*heap_insert)( uint8_t *pv, int len );
/* Socket */
int (*socket)( int domain, int type, int protocol );
int (*setsockopt)( int sockfd, int level, int optname, const void *optval, socklen_t optlen );
int (*getsockopt)( int sockfd, int level, int optname, const void *optval, socklen_t *optlen );
int (*bind)( int sockfd, const struct sockaddr *addr, socklen_t addrlen );
int (*connect)( int sockfd, const struct sockaddr *addr, socklen_t addrlen );
int (*listen)( int sockfd, int backlog );
int (*accept)( int sockfd, struct sockaddr *addr, socklen_t *addrlen );
int (*select)( int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, struct timeval *timeout );
ssize_t (*send)( int sockfd, const void *buf, size_t len, int flags );
int (*write)( int sockfd, void *buf, size_t len );
ssize_t (*sendto)( int sockfd, const void *buf, size_t len, int flags,
const struct sockaddr *dest_addr,
socklen_t addrlen );
ssize_t (*recv)( int sockfd, void *buf, size_t len, int flags );
int (*read)( int sockfd, void *buf, size_t len );
ssize_t (*recvfrom)( int sockfd, void *buf, size_t len, int flags,
struct sockaddr *src_addr,
socklen_t *addrlen );
int (*close)( int fd );
uint32_t (*inet_addr)( char *s );
char* (*inet_ntoa)( char *s, uint32_t x );
int (*gethostbyname)( const char * name, uint8_t * addr, uint8_t addrLen );
void (*set_tcp_keepalive)( int inMaxErrNum, int inSeconds );
void (*get_tcp_keepalive)( int *outMaxErrNum, int *outSeconds );
/* SSL */
void (*ssl_set_cert)( const char *_cert_pem, const char *private_key_pem );
void* (*ssl_connect)( int fd, int calen, char*ca, int *ssl_errno );
void* (*ssl_accept)( int fd );
int (*ssl_send)( void* ssl, char *data, int len );
int (*ssl_recv)( void* ssl, char *data, int len );
int (*ssl_close)( void* ssl );
void (*set_ssl_client_version)( int version );
/*crypto*/
void (*InitMd5)( md5_context*md5 );
void (*Md5Update)( md5_context* md5, unsigned char *input, int ilen );
void (*Md5Final)( md5_context* md5, uint8_t* hash );
int (*Md5Hash)( const uint8_t* data, uint32_t len, uint8_t* hash );
void (*AesEncryptDirect)( Aes* aes, uint8_t* out, const uint8_t* in );
void (*AesDecryptDirect)( Aes* aes, uint8_t* out, const uint8_t* in );
int (*AesSetKeyDirect)( Aes* aes, const uint8_t* key, uint32_t len,
const uint8_t* iv,
int dir );
int (*aes_encrypt)( int sz, const char * key, const char * in, char * out );
int (*aes_decrypt)( int sz, const char * key, const char * in, char * out );
int (*AesSetKey)( Aes* aes, const uint8_t* key, uint32_t len,
const uint8_t* iv,
int dir );
int (*AesSetIV)( Aes* aes, const uint8_t* iv );
int (*AesCbcEncrypt)( Aes* aes, uint8_t* out,
const uint8_t* in,
uint32_t sz );
int (*AesCbcDecrypt)( Aes* aes, uint8_t* out,
const uint8_t* in,
uint32_t sz );
/* WIFI MGR */
int (*wlan_get_mac_address)( unsigned char *dest );
int (*wlan_driver_version)( char* version, int length );
OSStatus (*micoWlanStart)( network_InitTypeDef_st* inNetworkInitPara );
OSStatus (*micoWlanStartAdv)( network_InitTypeDef_adv_st* inNetworkInitParaAdv );
OSStatus (*micoWlanGetIPStatus)( IPStatusTypedef *outNetpara, WiFi_Interface inInterface );
OSStatus (*micoWlanGetLinkStatus)( LinkStatusTypeDef *outStatus );
OSStatus (*micoWlanStartScan)( void );
OSStatus (*micoWlanStartScanAdv)( void );
OSStatus (*micoWlanPowerOff)( void );
OSStatus (*micoWlanPowerOn)( void );
OSStatus (*micoWlanSuspend)( void );
OSStatus (*micoWlanSuspendStation)( void );
OSStatus (*micoWlanSuspendSoftAP)( void );
OSStatus (*micoWlanStartEasyLink)( int inTimeout );
OSStatus (*micoWlanStartEasyLinkPlus)( int inTimeout );
OSStatus (*micoWlanStopEasyLink)( void );
OSStatus (*micoWlanStopEasyLinkPlus)( void );
OSStatus (*micoWlanStartWPS)( int inTimeout );
OSStatus (*micoWlanStopWPS)( void );
OSStatus (*micoWlanStartAirkiss)( int inTimeout );
OSStatus (*micoWlanStopAirkiss)( void );
void (*micoWlanEnablePowerSave)( void );
void (*micoWlanDisablePowerSave)( void );
void (*wifimgr_debug_enable)( bool enable );
int (*mico_wlan_monitor_rx_type)( int type );
int (*mico_wlan_start_monitor)( void );
int (*mico_wlan_stop_monitor)( void );
int (*mico_wlan_set_channel)( int channel );
void (*mico_wlan_register_monitor_cb)( monitor_cb_t fn );
void (*wlan_set_channel)( int channel );
int (*mxchip_active_scan)( char*ssid, int is_adv );
/* CLI APIs */
void (*wifistate_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*wifidebug_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*wifiscan_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*ifconfig_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*arp_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*ping_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*dns_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*task_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*socket_show_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*memory_show_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*memory_dump_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*memory_set_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*memp_dump_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*driver_state_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*iperf_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
/* HAL: GPIO; FLASH; UART */
mico_logic_partition_t* (*MicoFlashGetInfo)( mico_partition_t inPartition );
OSStatus (*MicoFlashErase)( mico_partition_t inPartition, uint32_t off_set, uint32_t size );
OSStatus (*MicoFlashWrite)( mico_partition_t inPartition, volatile uint32_t* off_set, uint8_t* inBuffer,
uint32_t inBufferLength );
OSStatus (*MicoFlashRead)( mico_partition_t inPartition, volatile uint32_t* off_set, uint8_t* outBuffer,
uint32_t inBufferLength );
OSStatus (*MicoFlashEnableSecurity)( mico_partition_t partition, uint32_t off_set, uint32_t size );
OSStatus (*MicoGpioInitialize)( mico_gpio_t gpio, mico_gpio_config_t configuration );
OSStatus (*MicoGpioFinalize)( mico_gpio_t gpio );
OSStatus (*MicoGpioOutputHigh)( mico_gpio_t gpio );
OSStatus (*MicoGpioOutputLow)( mico_gpio_t gpio );
OSStatus (*MicoGpioOutputTrigger)( mico_gpio_t gpio );
bool (*MicoGpioInputGet)( mico_gpio_t gpio );
OSStatus (*MicoGpioEnableIRQ)( mico_gpio_t gpio, mico_gpio_irq_trigger_t trigger, mico_gpio_irq_handler_t handler,
void* arg );
OSStatus (*MicoGpioDisableIRQ)( mico_gpio_t gpio );
OSStatus (*MicoUartInitialize)( mico_uart_t uart, const mico_uart_config_t* config,
ring_buffer_t* optional_rx_buffer );
OSStatus (*MicoUartFinalize)( mico_uart_t uart );
OSStatus (*MicoUartSend)( mico_uart_t uart, const void* data, uint32_t size );
OSStatus (*MicoUartRecv)( mico_uart_t uart, void* data, uint32_t size, uint32_t timeout );
uint32_t (*MicoUartGetLengthInBuffer)( mico_uart_t uart );
void (*MicoUartPinRedirect)( mico_uart_t uart );
/* Power management*/
int (*pm_mcu_state)( power_state_t state, uint32_t time_dur );
int (*pm_wakeup_source)( );
void (*wifi_off_mcu_standby)( int seconds );
/* uitls */
int (*debug_putchar)( char *ch );
void (*MicoSystemReboot)( void );
/* ALI APIs */
char* (*get_ali_key)( void );
char* (*get_ali_secret)( void );
/* RTC */
void (*MicoRtcInitialize)( void );
OSStatus (*MicoRtcGetTime)( mico_rtc_time_t* time );
OSStatus (*MicoRtcSetTime)( mico_rtc_time_t* time );
struct tm* (*localtime)( const time_t * time );
char * (*asctime)( const struct tm *tm );
int (*wifi_set_country)( int country );
int (*switch_active_firmrware)( void );
int (*last_reset_reason)( void );
int (*aon_write)( uint32_t offset, uint8_t* in, uint32_t len );
int (*aon_read)( uint32_t offset, uint8_t* out, uint32_t len );
/* LwIP */
lwip_api_t *lwip_apis;
/* FreeRTOS */
/* PWM */
pwm_api_t *pwm_apis;
/* WDG */
wdg_api_t *wdg_apis;
int (*ssl_get_fd)( const void* ssl );
void (*get_random_sequence)( unsigned char *buf, unsigned int size );
adc_api_t *adc_apis;
i2c_api_t *i2c_apis;
spi_api_t *spi_apis;
int (*ssl_set_loggingcb)( ssl_Logging_cb f );
int (*wlan_inject_frame)( const uint8_t *buff, size_t len );
int (*wlan_rx_mgmt_indication)( const enum wlan_bss_type bss_type,
const uint32_t mgmt_subtype_mask,
void (*rx_mgmt_callback)( const enum wlan_bss_type
bss_type,
const uint8_t *frame,
const uint16_t len ) );
int (*wlan_remain_on_channel)( const bool status, const uint8_t channel,
const uint32_t duration );
int (*wifi_bridge_mode_enable)( bool hidden_ssid );
int (*wifi_bridge_mode_disable)( void );
int (*send_easylink_minus)( uint32_t ip, char *ssid, char *key );
int (*ssl_socket)( void* ssl );
int (*mico_wlan_get_channel)(void);
int (*ssl_pending)(void* ssl);
int (*ssl_get_error)(void* ssl, int ret);
void (*ssl_set_using_nonblock)(void* ssl, int nonblock);
void* (*ssl_nonblock_connect)(int fd, int calen, char*ca, int *errno, int timeout);
char *(*sethostname)( char *name ); // set device name in dhcp table
int (*mico_wlan_monitor_no_easylink)(void);
void (*ssl_set_client_cert)(const char *cert_pem, const char *private_key_pem);
void* (*ssl_connect_sni)(int fd, int calen, char*ca, char *sni_servername, int *errno);
} mico_api_t;
typedef struct user_api_struct
{
uint32_t len;
uint16_t reserved;
uint16_t crc16;
uint32_t magic_num;
uint32_t app_stack_size;
uint32_t interface_version;
char * version;
char * user_app_version;
char * PID;
char * SN;
mico_uart_t debug_uart;
int debug_baudrate;
void (*user_app_in)( const mico_api_t *lib_api_t );
void (*init_platform)( void );
int (*application_start)( void );
/* callback functions */
void (*ApListCallback)( ScanResult *pApList );
void (*ApListAdvCallback)( ScanResult_adv *pApAdvList );
void (*WifiStatusHandler)( WiFiEvent status );
void (*connected_ap_info)( apinfo_adv_t *ap_info, char *key, int key_len );
void (*NetCallback)( IPStatusTypedef *pnet );
void (*RptConfigmodeRslt)( network_InitTypeDef_st *nwkpara );
void (*easylink_user_data_result)( int datalen, char*data );
void (*socket_connected)( int fd );
void (*dns_ip_set)( uint8_t *hostname, uint32_t ip );
void (*join_fail)( OSStatus err );
void (*wifi_reboot_event)( void );
void (*mico_rtos_stack_overflow)( char *taskname );
uint32_t bootloader_ignore;
void (*probe_request_rx_cb)(uint8_t *header, int length); // for ouput
void (*report_ap)(char*ssid, uint8_t *header, int len);
} user_api_t;
#endif
#ifndef _MICO_API_H_
#define _MICO_API_H_
#include "lwip_api_define.h"
#include "mico.h"
#define INTERFACE_VERSION 1
typedef void (*ssl_Logging_cb)( const int logLevel,
const char * const logMessage );
typedef enum
{
/** US FCC */
COUNTRY_US = 1,
/** IC Canada */
COUNTRY_CA,
/** Singapore */
COUNTRY_SG,
/** ETSI */
COUNTRY_EU,
/** Australia */
COUNTRY_AU,
/** Republic Of Korea */
COUNTRY_KR,
/** France */
COUNTRY_FR,
/** Japan */
COUNTRY_JP,
/** China */
COUNTRY_CN,
} country_code_t;
enum wlan_bss_type
{
WLAN_BSS_TYPE_STA = 0,
WLAN_BSS_TYPE_UAP = 1,
WLAN_BSS_TYPE_WIFIDIRECT = 2,
WLAN_BSS_TYPE_ANY = 0xff,
};
typedef enum
{
ASSOC_REQ_FRAME = 0x00,
ASSOC_RESP_FRAME = 0x10,
REASSOC_REQ_FRAME = 0x20,
REASSOC_RESP_FRAME = 0x30,
PROBE_REQ_FRAME = 0x40,
PROBE_RESP_FRAME = 0x50,
BEACON_FRAME = 0x80,
DISASSOC_FRAME = 0xA0,
AUTH_FRAME = 0xB0,
DEAUTH_FRAME = 0xC0,
ACTION_FRAME = 0xD0,
DATA_FRAME = 0x08,
QOS_DATA_FRAME = 0x88,
} wifi_frame_type_t;
/** 802_11_header packet */
typedef struct _wifi_mgmt_frame_t
{
/** Packet Length */
uint16_t frm_len;
/** Frame Type */
wifi_frame_type_t frame_type;
/** Frame Control flags */
uint8_t frame_ctrl_flags;
/** Duration ID */
uint16_t duration_id;
/** Address1 */
uint8_t addr1[6];
/** Address2 */
uint8_t addr2[6];
/** Address3 */
uint8_t addr3[6];
/** Sequence Control */
uint16_t seq_ctl;
/** Address4 */
uint8_t addr4[6];
/** Frame payload */
uint8_t payload[0];
} wlan_mgmt_frame_t;
typedef struct
{
OSStatus (*pwm_init)( mico_pwm_t pwm, uint32_t frequency, float duty_cycle );
OSStatus (*pwm_start)( mico_pwm_t pwm );
OSStatus (*pwm_stop)( mico_pwm_t pwm );
} pwm_api_t;
typedef struct
{
OSStatus (*wdg_init)( uint32_t timeout );
void (*wdg_reload)( void );
OSStatus (*wdg_stop)( void );
} wdg_api_t;
#define LAST_RST_CAUSE_VBAT (1<<0)
#define LAST_RST_CAUSE_AV12 (1<<1)
#define LAST_RST_CAUSE_AV18 (1<<2)
#define LAST_RST_CAUSE_SOFTRST (1<<3)
#define LAST_RST_CAUSE_LOCKUP (1<<4)
#define LAST_RST_CAUSE_WDT (1<<5)
#define USER_APP_ADDR 0x1f064000 /* 400KB offset */
#define USER_MAGIC_NUM 0xC89346
#define time_t unsigned long
/** Power States of MCU */
typedef enum
{
/** (Active Mode): This is the full power state of MCU.
* Instruction execution takes place only in PM0.
*/
PM0,
/** (Idle Mode): In this mode Cortex M3 core function
* clocks are stopped until the occurrence of any interrupt.
* This consumes lower power than PM0. */
PM1,
/** (Standby Mode):In this mode, the Cortex M3,
* most of the peripherals & SRAM arrays are in
* low-power mode.The PMU and RTC are operational.
* A wakeup can happen by timeout (RTC based) or by asserting the
* WAKEUP 0/1 lines.This consumes much lower power than PM1.
*/
PM2,
/**(Sleep Mode): This mode further aggressively conserves power.
* Only 192 KB (160 KB in SRAM0 and 32 KB in SRAM1)
* out of 512 KB of SRAM is alive. All peripherals
* are turned off and register config is lost.
* Application should restore the peripheral config
* after exit form PM3. This consumes lower power
* than in PM2. A wakeup can happen by timeout (RTC based)
* or by asserting the WAKEUP 0/1 lines.
*/
PM3,
/** (Shutoff Mode): This simulates a shutdown condition.
* A wakeup can happen by timeout (RTC based) or by
* asserting the WAKEUP 0/1 lines.
* This is the lowest power state of MCU.
* On wakeup execution begins from bootrom as
* if a fresh bootup has occurred.
*/
PM4
} power_state_t;
typedef struct
{
OSStatus (*MicoAdcInitialize)( mico_adc_t adc, uint32_t sampling_cycle );
OSStatus (*MicoAdcTakeSample)( mico_adc_t adc, uint16_t* output );
OSStatus (*MicoAdcTakeSampleStreram)( mico_adc_t adc, void* buffer, uint16_t buffer_length );
OSStatus (*MicoAdcFinalize)( mico_adc_t adc );
} adc_api_t;
typedef struct
{
OSStatus (*i2c_init)( mico_i2c_device_t* device );
OSStatus (*i2c_deinit)( mico_i2c_device_t* device );
bool (*i2c_probe_device)( mico_i2c_device_t* device, int retries );
OSStatus (*i2c_build_tx_msg)( mico_i2c_message_t* message, const void* tx_buffer, uint16_t tx_buffer_length,
uint16_t retries );
OSStatus (*i2c_build_rx_msg)( mico_i2c_message_t* message, void* rx_buffer, uint16_t rx_buffer_length,
uint16_t retries );
OSStatus (*i2c_build_combined_msg)( mico_i2c_message_t* message, const void* tx_buffer, void* rx_buffer,
uint16_t tx_buffer_length, uint16_t rx_buffer_length, uint16_t retries );
OSStatus (*i2c_transfer)( mico_i2c_device_t* device, mico_i2c_message_t* messages, uint16_t number_of_messages );
} i2c_api_t;
typedef struct
{
OSStatus (*spi_init)( const mico_spi_device_t* spi );
OSStatus (*spi_transfer)( const mico_spi_device_t* spi, const mico_spi_message_segment_t* segments,
uint16_t number_of_segments );
OSStatus (*spi_finalize)( const mico_spi_device_t* spi );
} spi_api_t;
typedef struct {
OSStatus (*iis_init)( const mico_iis_device_t* iis );
OSStatus (*iis_finalize)( const mico_iis_device_t* iis );
OSStatus (*iis_transfer)( const mico_iis_device_t* iis, const mico_iis_message_segment_t* segments,
uint16_t number_of_segments );
OSStatus (*iis_write)( const mico_iis_device_t* iis, uint8_t *p_buf, uint32_t size );
OSStatus (*iis_read)( const mico_iis_device_t* iis, uint8_t *p_buf, uint32_t size );
}iis_api_t;
/* API type define */
typedef struct mico_api_struct
{
char *library_version;
/* OS Layer*/
mico_system_config_t* (*system_config_get)( void );
void (*system_config_set)( mico_system_config_t *cfg );
void (*mxchipInit)( );
OSStatus (*mico_rtos_create_thread)( mico_thread_t* thread, uint8_t priority, const char* name,
mico_thread_function_t function, uint32_t stack_size, void* arg );
OSStatus (*mico_rtos_delete_thread)( mico_thread_t* thread );
void (*mico_rtos_suspend_thread)( mico_thread_t* thread );
void (*mico_rtos_suspend_all_thread)( void );
long (*mico_rtos_resume_all_thread)( void );
OSStatus (*mico_rtos_thread_join)( mico_thread_t* thread );
OSStatus (*mico_rtos_thread_force_awake)( mico_thread_t* thread );
bool (*mico_rtos_is_current_thread)( mico_thread_t* thread );
void (*mico_thread_sleep)( uint32_t seconds );
void (*mico_thread_msleep)( uint32_t milliseconds );
OSStatus (*mico_rtos_init_semaphore)( mico_semaphore_t* semaphore, int count );
OSStatus (*mico_rtos_set_semaphore)( mico_semaphore_t* semaphore );
OSStatus (*mico_rtos_get_semaphore)( mico_semaphore_t* semaphore, uint32_t timeout_ms );
OSStatus (*mico_rtos_deinit_semaphore)( mico_semaphore_t* semaphore );
OSStatus (*mico_rtos_init_mutex)( mico_mutex_t* mutex );
OSStatus (*mico_rtos_lock_mutex)( mico_mutex_t* mutex );
OSStatus (*mico_rtos_unlock_mutex)( mico_mutex_t* mutex );
OSStatus (*mico_rtos_deinit_mutex)( mico_mutex_t* mutex );
OSStatus (*mico_rtos_init_queue)( mico_queue_t* queue, const char* name, uint32_t message_size,
uint32_t number_of_messages );
OSStatus (*mico_rtos_push_to_queue)( mico_queue_t* queue, void* message, uint32_t timeout_ms );
OSStatus (*mico_rtos_pop_from_queue)( mico_queue_t* queue, void* message, uint32_t timeout_ms );
OSStatus (*mico_rtos_deinit_queue)( mico_queue_t* queue );
bool (*mico_rtos_is_queue_empty)( mico_queue_t* queue );
OSStatus (*mico_rtos_is_queue_full)( mico_queue_t* queue );
uint32_t (*mico_get_time)( void );
OSStatus (*mico_init_timer)( mico_timer_t* timer, uint32_t time_ms, timer_handler_t function, void* arg );
OSStatus (*mico_start_timer)( mico_timer_t* timer );
OSStatus (*mico_stop_timer)( mico_timer_t* timer );
OSStatus (*mico_reload_timer)( mico_timer_t* timer );
OSStatus (*mico_deinit_timer)( mico_timer_t* timer );
bool (*mico_is_timer_running)( mico_timer_t* timer );
int (*mico_create_event_fd)( mico_event_t handle );
int (*mico_delete_event_fd)( int fd );
int (*SetTimer)( unsigned long ms, void (*psysTimerHandler)( void ) );
int (*SetTimer_uniq)( unsigned long ms, void (*psysTimerHandler)( void ) );
int (*UnSetTimer)( void (*psysTimerHandler)( void ) );
/* memory management*/
micoMemInfo_t* (*mico_memory_info)( void );
void* (*malloc)( size_t size ); // malloc
void* (*realloc)( void* pv, size_t size ); // realloc
void (*free)( void* pv ); //free
void* (*calloc)( int a, int b ); // calloc
void (*heap_insert)( uint8_t *pv, int len );
/* Socket */
int (*socket)( int domain, int type, int protocol );
int (*setsockopt)( int sockfd, int level, int optname, const void *optval, socklen_t optlen );
int (*getsockopt)( int sockfd, int level, int optname, const void *optval, socklen_t *optlen );
int (*bind)( int sockfd, const struct sockaddr *addr, socklen_t addrlen );
int (*connect)( int sockfd, const struct sockaddr *addr, socklen_t addrlen );
int (*listen)( int sockfd, int backlog );
int (*accept)( int sockfd, struct sockaddr *addr, socklen_t *addrlen );
int (*select)( int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, struct timeval *timeout );
ssize_t (*send)( int sockfd, const void *buf, size_t len, int flags );
int (*write)( int sockfd, void *buf, size_t len );
ssize_t (*sendto)( int sockfd, const void *buf, size_t len, int flags,
const struct sockaddr *dest_addr,
socklen_t addrlen );
ssize_t (*recv)( int sockfd, void *buf, size_t len, int flags );
int (*read)( int sockfd, void *buf, size_t len );
ssize_t (*recvfrom)( int sockfd, void *buf, size_t len, int flags,
struct sockaddr *src_addr,
socklen_t *addrlen );
int (*close)( int fd );
uint32_t (*inet_addr)( char *s );
char* (*inet_ntoa)( char *s, uint32_t x );
int (*gethostbyname)( const char * name, uint8_t * addr, uint8_t addrLen );
void (*set_tcp_keepalive)( int inMaxErrNum, int inSeconds );
void (*get_tcp_keepalive)( int *outMaxErrNum, int *outSeconds );
/* SSL */
void (*ssl_set_cert)( const char *_cert_pem, const char *private_key_pem );
void* (*ssl_connect)( int fd, int calen, char*ca, int *ssl_errno );
void* (*ssl_accept)( int fd );
int (*ssl_send)( void* ssl, char *data, int len );
int (*ssl_recv)( void* ssl, char *data, int len );
int (*ssl_close)( void* ssl );
void (*set_ssl_client_version)( int version );
/*crypto*/
void (*InitMd5)( md5_context*md5 );
void (*Md5Update)( md5_context* md5, unsigned char *input, int ilen );
void (*Md5Final)( md5_context* md5, uint8_t* hash );
int (*Md5Hash)( const uint8_t* data, uint32_t len, uint8_t* hash );
void (*AesEncryptDirect)( Aes* aes, uint8_t* out, const uint8_t* in );
void (*AesDecryptDirect)( Aes* aes, uint8_t* out, const uint8_t* in );
int (*AesSetKeyDirect)( Aes* aes, const uint8_t* key, uint32_t len,
const uint8_t* iv,
int dir );
int (*aes_encrypt)( int sz, const char * key, const char * in, char * out );
int (*aes_decrypt)( int sz, const char * key, const char * in, char * out );
int (*AesSetKey)( Aes* aes, const uint8_t* key, uint32_t len,
const uint8_t* iv,
int dir );
int (*AesSetIV)( Aes* aes, const uint8_t* iv );
int (*AesCbcEncrypt)( Aes* aes, uint8_t* out,
const uint8_t* in,
uint32_t sz );
int (*AesCbcDecrypt)( Aes* aes, uint8_t* out,
const uint8_t* in,
uint32_t sz );
/* WIFI MGR */
int (*wlan_get_mac_address)( unsigned char *dest );
int (*wlan_driver_version)( char* version, int length );
OSStatus (*micoWlanStart)( network_InitTypeDef_st* inNetworkInitPara );
OSStatus (*micoWlanStartAdv)( network_InitTypeDef_adv_st* inNetworkInitParaAdv );
OSStatus (*micoWlanGetIPStatus)( IPStatusTypedef *outNetpara, WiFi_Interface inInterface );
OSStatus (*micoWlanGetLinkStatus)( LinkStatusTypeDef *outStatus );
OSStatus (*micoWlanStartScan)( void );
OSStatus (*micoWlanStartScanAdv)( void );
OSStatus (*micoWlanPowerOff)( void );
OSStatus (*micoWlanPowerOn)( void );
OSStatus (*micoWlanSuspend)( void );
OSStatus (*micoWlanSuspendStation)( void );
OSStatus (*micoWlanSuspendSoftAP)( void );
OSStatus (*micoWlanStartEasyLink)( int inTimeout );
OSStatus (*micoWlanStartEasyLinkPlus)( int inTimeout );
OSStatus (*micoWlanStopEasyLink)( void );
OSStatus (*micoWlanStopEasyLinkPlus)( void );
OSStatus (*micoWlanStartWPS)( int inTimeout );
OSStatus (*micoWlanStopWPS)( void );
OSStatus (*micoWlanStartAirkiss)( int inTimeout );
OSStatus (*micoWlanStopAirkiss)( void );
void (*micoWlanEnablePowerSave)( void );
void (*micoWlanDisablePowerSave)( void );
void (*wifimgr_debug_enable)( bool enable );
int (*mico_wlan_monitor_rx_type)( int type );
int (*mico_wlan_start_monitor)( void );
int (*mico_wlan_stop_monitor)( void );
int (*mico_wlan_set_channel)( int channel );
void (*mico_wlan_register_monitor_cb)( monitor_cb_t fn );
void (*wlan_set_channel)( int channel );
int (*mxchip_active_scan)( char*ssid, int is_adv );
/* CLI APIs */
void (*wifistate_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*wifidebug_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*wifiscan_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*ifconfig_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*arp_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*ping_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*dns_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*task_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*socket_show_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*memory_show_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*memory_dump_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*memory_set_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*memp_dump_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*driver_state_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
void (*iperf_Command)( char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv );
/* HAL: GPIO; FLASH; UART */
mico_logic_partition_t* (*MicoFlashGetInfo)( mico_partition_t inPartition );
OSStatus (*MicoFlashErase)( mico_partition_t inPartition, uint32_t off_set, uint32_t size );
OSStatus (*MicoFlashWrite)( mico_partition_t inPartition, volatile uint32_t* off_set, uint8_t* inBuffer,
uint32_t inBufferLength );
OSStatus (*MicoFlashRead)( mico_partition_t inPartition, volatile uint32_t* off_set, uint8_t* outBuffer,
uint32_t inBufferLength );
OSStatus (*MicoFlashEnableSecurity)( mico_partition_t partition, uint32_t off_set, uint32_t size );
OSStatus (*MicoGpioInitialize)( mico_gpio_t gpio, mico_gpio_config_t configuration );
OSStatus (*MicoGpioFinalize)( mico_gpio_t gpio );
OSStatus (*MicoGpioOutputHigh)( mico_gpio_t gpio );
OSStatus (*MicoGpioOutputLow)( mico_gpio_t gpio );
OSStatus (*MicoGpioOutputTrigger)( mico_gpio_t gpio );
bool (*MicoGpioInputGet)( mico_gpio_t gpio );
OSStatus (*MicoGpioEnableIRQ)( mico_gpio_t gpio, mico_gpio_irq_trigger_t trigger, mico_gpio_irq_handler_t handler,
void* arg );
OSStatus (*MicoGpioDisableIRQ)( mico_gpio_t gpio );
OSStatus (*MicoUartInitialize)( mico_uart_t uart, const mico_uart_config_t* config,
ring_buffer_t* optional_rx_buffer );
OSStatus (*MicoUartFinalize)( mico_uart_t uart );
OSStatus (*MicoUartSend)( mico_uart_t uart, const void* data, uint32_t size );
OSStatus (*MicoUartRecv)( mico_uart_t uart, void* data, uint32_t size, uint32_t timeout );
uint32_t (*MicoUartGetLengthInBuffer)( mico_uart_t uart );
void (*MicoUartPinRedirect)( mico_uart_t uart );
/* Power management*/
int (*pm_mcu_state)( power_state_t state, uint32_t time_dur );
int (*pm_wakeup_source)( );
void (*wifi_off_mcu_standby)( int seconds );
/* uitls */
int (*debug_putchar)( char *ch );
void (*MicoSystemReboot)( void );
/* ALI APIs */
char* (*get_ali_key)( void );
char* (*get_ali_secret)( void );
/* RTC */
void (*MicoRtcInitialize)( void );
OSStatus (*MicoRtcGetTime)( mico_rtc_time_t* time );
OSStatus (*MicoRtcSetTime)( mico_rtc_time_t* time );
struct tm* (*localtime)( const time_t * time );
char * (*asctime)( const struct tm *tm );
int (*wifi_set_country)( int country );
int (*switch_active_firmrware)( void );
int (*last_reset_reason)( void );
int (*aon_write)( uint32_t offset, uint8_t* in, uint32_t len );
int (*aon_read)( uint32_t offset, uint8_t* out, uint32_t len );
/* LwIP */
lwip_api_t *lwip_apis;
/* FreeRTOS */
/* PWM */
pwm_api_t *pwm_apis;
/* WDG */
wdg_api_t *wdg_apis;
int (*ssl_get_fd)( const void* ssl );
void (*get_random_sequence)( unsigned char *buf, unsigned int size );
adc_api_t *adc_apis;
i2c_api_t *i2c_apis;
spi_api_t *spi_apis;
int (*ssl_set_loggingcb)( ssl_Logging_cb f );
int (*wlan_inject_frame)( const uint8_t *buff, size_t len );
int (*wlan_rx_mgmt_indication)( const enum wlan_bss_type bss_type,
const uint32_t mgmt_subtype_mask,
void (*rx_mgmt_callback)( const enum wlan_bss_type
bss_type,
const uint8_t *frame,
const uint16_t len ) );
int (*wlan_remain_on_channel)( const bool status, const uint8_t channel,
const uint32_t duration );
int (*wifi_bridge_mode_enable)( bool hidden_ssid );
int (*wifi_bridge_mode_disable)( void );
int (*send_easylink_minus)( uint32_t ip, char *ssid, char *key );
int (*ssl_socket)( void* ssl );
int (*mico_wlan_get_channel)(void);
int (*ssl_pending)(void* ssl);
int (*ssl_get_error)(void* ssl, int ret);
void (*ssl_set_using_nonblock)(void* ssl, int nonblock);
void* (*ssl_nonblock_connect)(int fd, int calen, char*ca, int *errno, int timeout);
char *(*sethostname)( char *name ); // set device name in dhcp table
int (*mico_wlan_monitor_no_easylink)(void);
void (*ssl_set_client_cert)(const char *cert_pem, const char *private_key_pem);
void* (*ssl_connect_sni)(int fd, int calen, char*ca, char *sni_servername, int *errno);
OSStatus (*micoWlanStartEnt)(network_Enterprise_st* inNetworkInitPara);
iis_api_t *iis_apis;
} mico_api_t;
typedef struct user_api_struct
{
uint32_t len;
uint16_t reserved;
uint16_t crc16;
uint32_t magic_num;
uint32_t app_stack_size;
uint32_t interface_version;
char * version;
char * user_app_version;
char * PID;
char * SN;
mico_uart_t debug_uart;
int debug_baudrate;
void (*user_app_in)( const mico_api_t *lib_api_t );
void (*init_platform)( void );
int (*application_start)( void );
/* callback functions */
void (*ApListCallback)( ScanResult *pApList );
void (*ApListAdvCallback)( ScanResult_adv *pApAdvList );
void (*WifiStatusHandler)( WiFiEvent status );
void (*connected_ap_info)( apinfo_adv_t *ap_info, char *key, int key_len );
void (*NetCallback)( IPStatusTypedef *pnet );
void (*RptConfigmodeRslt)( network_InitTypeDef_st *nwkpara );
void (*easylink_user_data_result)( int datalen, char*data );
void (*socket_connected)( int fd );
void (*dns_ip_set)( uint8_t *hostname, uint32_t ip );
void (*join_fail)( OSStatus err );
void (*wifi_reboot_event)( void );
void (*mico_rtos_stack_overflow)( char *taskname );
uint32_t bootloader_ignore;
void (*probe_request_rx_cb)(uint8_t *header, int length); // for ouput
void (*report_ap)(char*ssid, uint8_t *header, int len);
} user_api_t;
#endif

498
mico-os/platform/MCU/MW3xx/peripherals/platform_flash.c Executable file → Normal file
View File

@@ -1,249 +1,249 @@
/**
******************************************************************************
* @file platform_flash.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides flash operation functions.
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#include "debug.h"
#include "common.h"
#include "mdev.h"
#include "flash.h"
#include "partition.h"
#include "boot_flags.h"
#include "platform_peripheral.h"
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/******************************************************
* Structures
******************************************************/
/******************************************************
* Variables Definitions
******************************************************/
static mdev_t *flash_dev = NULL;
/******************************************************
* Function Declarations
******************************************************/
/******************************************************
* Function Definitions
******************************************************/
OSStatus platform_flash_init( const platform_flash_t *peripheral )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr );
require_action_quiet( peripheral->flash_type == FLASH_TYPE_SPI, exit, err = kUnsupportedErr );
require_quiet( flash_dev == NULL, exit );
flash_drv_init( );
flash_dev = flash_drv_open( FL_INT );
require_action( flash_dev, exit, err = kOpenErr );
exit:
return err;
}
OSStatus platform_flash_erase( const platform_flash_t *peripheral, uint32_t start_address, uint32_t end_address )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr );
require_action_quiet( peripheral->flash_type == FLASH_TYPE_SPI, exit, err = kUnsupportedErr );
require_action( start_address >= peripheral->flash_start_addr
&& end_address <= peripheral->flash_start_addr + peripheral->flash_length - 1,
exit, err = kParamErr );
require_action_quiet( flash_dev, exit, err = kNotInitializedErr );
err = flash_drv_erase( flash_dev, start_address, end_address - start_address + 1 );
exit:
return err;
}
OSStatus platform_flash_write( const platform_flash_t *peripheral, volatile uint32_t* start_address, uint8_t* data,
uint32_t length )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr );
require_action_quiet( peripheral->flash_type == FLASH_TYPE_SPI, exit, err = kUnsupportedErr );
require_action( *start_address >= peripheral->flash_start_addr
&& *start_address + length <= peripheral->flash_start_addr + peripheral->flash_length,
exit, err = kParamErr );
require_action_quiet( flash_dev, exit, err = kNotInitializedErr );
err = flash_drv_write( flash_dev, data, length, *start_address );
require_noerr( err, exit );
*start_address += length;
exit:
return err;
}
OSStatus platform_flash_read( const platform_flash_t *peripheral, volatile uint32_t* start_address, uint8_t* data ,uint32_t length )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr );
require_action_quiet( peripheral->flash_type == FLASH_TYPE_SPI, exit, err = kUnsupportedErr );
require_action( (*start_address >= peripheral->flash_start_addr)
&& (*start_address + length) <= (peripheral->flash_start_addr + peripheral->flash_length),
exit, err = kParamErr );
require_action_quiet( flash_dev, exit, err = kNotInitializedErr );
err = flash_drv_read( flash_dev, data, length, *start_address );
require_noerr( err, exit );
*start_address += length;
exit:
return err;
}
OSStatus platform_flash_enable_protect( const platform_flash_t *peripheral, uint32_t start_address, uint32_t end_address )
{
UNUSED_PARAMETER(peripheral);
UNUSED_PARAMETER(start_address);
UNUSED_PARAMETER(end_address);
return kNoErr;
}
OSStatus platform_flash_disable_protect( const platform_flash_t *peripheral, uint32_t start_address, uint32_t end_address )
{
UNUSED_PARAMETER(peripheral);
UNUSED_PARAMETER(start_address);
UNUSED_PARAMETER(end_address);
return kNoErr;
}
static int passive_wifi_fw = 0, passive_fw = 0;
int get_passive_wifi_firmware(void)
{
short history = 0;
struct partition_entry *f1, *f2;
if (passive_wifi_fw != 0)
return passive_wifi_fw;
f1 = part_get_layout_by_id(FC_COMP_WLAN_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_WLAN_FW, &history);
if (f1 == NULL || f2 == NULL) {
return 0;
}
passive_wifi_fw = f1->gen_level >= f2->gen_level ? 2 : 1;
return passive_wifi_fw;
}
int get_passive_firmware(void)
{
short history = 0;
struct partition_entry *f1, *f2;
if (passive_fw != 0)
return passive_fw;
f1 = part_get_layout_by_id(FC_COMP_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_FW, &history);
if (f1 == NULL || f2 == NULL) {
return 0;
}
if (boot_get_partition_no() == 0) {
/* If this is 0, it means the first entry is the booted
* firmware. Which means we want to write to the second entry
* and make it the active partition hence forth
*/
passive_fw = 2;
} else {
passive_fw = 1;
}
return passive_fw;
}
//API part_set_active_partition update the active partition
//API part_init to initilize partition
int set_active_wifi_firmware(int index)
{
short history = 0;
struct partition_entry *f1, *f2;
f1 = part_get_layout_by_id(FC_COMP_WLAN_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_WLAN_FW, &history);
if (index == 1)
f1->gen_level = f2->gen_level + 1;
else
f2->gen_level = f1->gen_level + 1;
part_write_layout();
return WM_SUCCESS;
}
int set_active_firmware(int index)
{
short history = 0;
struct partition_entry *f1, *f2;
f1 = part_get_layout_by_id(FC_COMP_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_FW, &history);
if (index == 1)
f1->gen_level = f2->gen_level + 1;
else
f2->gen_level = f1->gen_level + 1;
part_write_layout();
return WM_SUCCESS;
}
int change_active_firmware(void)
{
short history = 0;
struct partition_entry *f1, *f2;
f1 = part_get_layout_by_id(FC_COMP_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_FW, &history);
if (passive_fw == 1)
f1->gen_level = f2->gen_level + 1;
else
f2->gen_level = f1->gen_level + 1;
part_write_layout();
return WM_SUCCESS;
}
/**
******************************************************************************
* @file platform_flash.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides flash operation functions.
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#include "debug.h"
#include "common.h"
#include "mdev.h"
#include "flash.h"
#include "partition.h"
#include "boot_flags.h"
#include "platform_peripheral.h"
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/******************************************************
* Structures
******************************************************/
/******************************************************
* Variables Definitions
******************************************************/
static mdev_t *flash_dev = NULL;
/******************************************************
* Function Declarations
******************************************************/
/******************************************************
* Function Definitions
******************************************************/
OSStatus platform_flash_init( const platform_flash_t *peripheral )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr );
require_action_quiet( peripheral->flash_type == FLASH_TYPE_SPI, exit, err = kUnsupportedErr );
require_quiet( flash_dev == NULL, exit );
flash_drv_init( );
flash_dev = flash_drv_open( FL_INT );
require_action( flash_dev, exit, err = kOpenErr );
exit:
return err;
}
OSStatus platform_flash_erase( const platform_flash_t *peripheral, uint32_t start_address, uint32_t end_address )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr );
require_action_quiet( peripheral->flash_type == FLASH_TYPE_SPI, exit, err = kUnsupportedErr );
require_action( start_address >= peripheral->flash_start_addr
&& end_address <= peripheral->flash_start_addr + peripheral->flash_length - 1,
exit, err = kParamErr );
require_action_quiet( flash_dev, exit, err = kNotInitializedErr );
err = flash_drv_erase( flash_dev, start_address, end_address - start_address + 1 );
exit:
return err;
}
OSStatus platform_flash_write( const platform_flash_t *peripheral, volatile uint32_t* start_address, uint8_t* data,
uint32_t length )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr );
require_action_quiet( peripheral->flash_type == FLASH_TYPE_SPI, exit, err = kUnsupportedErr );
require_action( *start_address >= peripheral->flash_start_addr
&& *start_address + length <= peripheral->flash_start_addr + peripheral->flash_length,
exit, err = kParamErr );
require_action_quiet( flash_dev, exit, err = kNotInitializedErr );
err = flash_drv_write( flash_dev, data, length, *start_address );
require_noerr( err, exit );
*start_address += length;
exit:
return err;
}
OSStatus platform_flash_read( const platform_flash_t *peripheral, volatile uint32_t* start_address, uint8_t* data ,uint32_t length )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr );
require_action_quiet( peripheral->flash_type == FLASH_TYPE_SPI, exit, err = kUnsupportedErr );
require_action( (*start_address >= peripheral->flash_start_addr)
&& (*start_address + length) <= (peripheral->flash_start_addr + peripheral->flash_length),
exit, err = kParamErr );
require_action_quiet( flash_dev, exit, err = kNotInitializedErr );
err = flash_drv_read( flash_dev, data, length, *start_address );
require_noerr( err, exit );
*start_address += length;
exit:
return err;
}
OSStatus platform_flash_enable_protect( const platform_flash_t *peripheral, uint32_t start_address, uint32_t end_address )
{
UNUSED_PARAMETER(peripheral);
UNUSED_PARAMETER(start_address);
UNUSED_PARAMETER(end_address);
return kNoErr;
}
OSStatus platform_flash_disable_protect( const platform_flash_t *peripheral, uint32_t start_address, uint32_t end_address )
{
UNUSED_PARAMETER(peripheral);
UNUSED_PARAMETER(start_address);
UNUSED_PARAMETER(end_address);
return kNoErr;
}
static int passive_wifi_fw = 0, passive_fw = 0;
int get_passive_wifi_firmware(void)
{
short history = 0;
struct partition_entry *f1, *f2;
if (passive_wifi_fw != 0)
return passive_wifi_fw;
f1 = part_get_layout_by_id(FC_COMP_WLAN_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_WLAN_FW, &history);
if (f1 == NULL || f2 == NULL) {
return 0;
}
passive_wifi_fw = f1->gen_level >= f2->gen_level ? 2 : 1;
return passive_wifi_fw;
}
int get_passive_firmware(void)
{
short history = 0;
struct partition_entry *f1, *f2;
if (passive_fw != 0)
return passive_fw;
f1 = part_get_layout_by_id(FC_COMP_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_FW, &history);
if (f1 == NULL || f2 == NULL) {
return 0;
}
if (boot_get_partition_no() == 0) {
/* If this is 0, it means the first entry is the booted
* firmware. Which means we want to write to the second entry
* and make it the active partition hence forth
*/
passive_fw = 2;
} else {
passive_fw = 1;
}
return passive_fw;
}
//API part_set_active_partition update the active partition
//API part_init to initilize partition
int set_active_wifi_firmware(int index)
{
short history = 0;
struct partition_entry *f1, *f2;
f1 = part_get_layout_by_id(FC_COMP_WLAN_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_WLAN_FW, &history);
if (index == 1)
f1->gen_level = f2->gen_level + 1;
else
f2->gen_level = f1->gen_level + 1;
part_write_layout();
return WM_SUCCESS;
}
int set_active_firmware(int index)
{
short history = 0;
struct partition_entry *f1, *f2;
f1 = part_get_layout_by_id(FC_COMP_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_FW, &history);
if (index == 1)
f1->gen_level = f2->gen_level + 1;
else
f2->gen_level = f1->gen_level + 1;
part_write_layout();
return WM_SUCCESS;
}
int change_active_firmware(void)
{
short history = 0;
struct partition_entry *f1, *f2;
f1 = part_get_layout_by_id(FC_COMP_FW, &history);
f2 = part_get_layout_by_id(FC_COMP_FW, &history);
if (passive_fw == 1)
f1->gen_level = f2->gen_level + 1;
else
f2->gen_level = f1->gen_level + 1;
part_write_layout();
return WM_SUCCESS;
}

View File

@@ -1,182 +1,182 @@
/**
******************************************************************************
* @file platform_mcu_peripheral.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provide all the headers of functions for stm32f2xx platform
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#pragma once
#include "mico_rtos.h"
#include "RingBufferUtils.h"
#include "lowlevel_drivers.h"
#include "boot_flags.h"
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/**
* UART flow control for driver
*/
typedef enum
{
FLOW_CONTROL_DISABLED_DRV,
FLOW_CONTROL_CTS_DRV,
FLOW_CONTROL_RTS_DRV,
FLOW_CONTROL_CTS_RTS_DRV
} platform_uart_driver_flow_control_t;
/******************************************************
* Structures
******************************************************/
typedef struct
{
uint8_t unimplemented;
} platform_gpio_t;
typedef struct
{
uint8_t unimplemented;
} platform_adc_t;
typedef struct
{
uint8_t unimplemented;
} platform_pwm_t;
/* DMA can be enabled by setting SPI_USE_DMA */
typedef struct
{
uint8_t unimplemented;
} platform_spi_t;
typedef struct
{
platform_spi_t* peripheral;
mico_mutex_t spi_mutex;
mico_bool_t initialized;
} platform_spi_driver_t;
typedef struct
{
uint8_t unimplemented;
} platform_spi_slave_driver_t;
typedef struct
{
uint8_t unimplemented;
} platform_i2c_t;
typedef struct
{
mico_mutex_t i2c_mutex;
} platform_i2c_driver_t;
typedef void (* wakeup_irq_handler_t)(void *arg);
typedef struct
{
uint32_t port_id;
} platform_uart_t;
typedef struct
{
UART_ID_Type id;
ring_buffer_t* rx_ring_buffer;
mico_semaphore_t rx_complete;
mico_semaphore_t tx_complete;
mico_mutex_t tx_mutex;
mico_semaphore_t sem_wakeup;
volatile uint32_t tx_size;
volatile uint32_t rx_size;
volatile OSStatus last_receive_result;
volatile OSStatus last_transmit_result;
platform_uart_driver_flow_control_t flow_control;
} platform_uart_driver_t;
typedef struct
{
uint32_t flash_type;
uint32_t flash_start_addr;
uint32_t flash_length;
} platform_flash_t;
typedef struct
{
const platform_flash_t* peripheral;
mico_mutex_t flash_mutex;
volatile bool initialized;
} platform_flash_driver_t;
/******************************************************
* Global Variables
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
int get_passive_firmware(void);
int part_write_layout(void);
//OSStatus platform_gpio_irq_manager_init ( void );
//uint8_t platform_gpio_get_port_number ( platform_gpio_port_t* gpio_port );
//OSStatus platform_gpio_enable_clock ( const platform_gpio_t* gpio );
//OSStatus platform_gpio_set_alternate_function( platform_gpio_port_t* gpio_port, uint8_t pin_number, GPIOOType_TypeDef output_type, GPIOPuPd_TypeDef pull_up_down_type, uint8_t alternation_function );
//
//OSStatus platform_mcu_powersave_init ( void );
//
//OSStatus platform_rtc_init ( void );
//OSStatus platform_rtc_enter_powersave ( void );
//OSStatus platform_rtc_abort_powersave ( void );
//OSStatus platform_rtc_exit_powersave ( uint32_t requested_sleep_time, uint32_t *cpu_sleep_time );
//
//uint8_t platform_uart_get_port_number ( platform_uart_port_t* uart );
//void platform_uart_irq ( platform_uart_driver_t* driver );
//void platform_uart_tx_dma_irq ( platform_uart_driver_t* driver );
//void platform_uart_rx_dma_irq ( platform_uart_driver_t* driver );
//
//uint8_t platform_spi_get_port_number ( platform_spi_port_t* spi );
#ifdef __cplusplus
} /* extern "C" */
#endif
/**
******************************************************************************
* @file platform_mcu_peripheral.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provide all the headers of functions for stm32f2xx platform
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#pragma once
#include "mico_rtos.h"
#include "RingBufferUtils.h"
#include "lowlevel_drivers.h"
#include "boot_flags.h"
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/**
* UART flow control for driver
*/
typedef enum
{
FLOW_CONTROL_DISABLED_DRV,
FLOW_CONTROL_CTS_DRV,
FLOW_CONTROL_RTS_DRV,
FLOW_CONTROL_CTS_RTS_DRV
} platform_uart_driver_flow_control_t;
/******************************************************
* Structures
******************************************************/
typedef struct
{
uint8_t unimplemented;
} platform_gpio_t;
typedef struct
{
uint8_t unimplemented;
} platform_adc_t;
typedef struct
{
uint8_t unimplemented;
} platform_pwm_t;
/* DMA can be enabled by setting SPI_USE_DMA */
typedef struct
{
uint8_t unimplemented;
} platform_spi_t;
typedef struct
{
platform_spi_t* peripheral;
mico_mutex_t spi_mutex;
mico_bool_t initialized;
} platform_spi_driver_t;
typedef struct
{
uint8_t unimplemented;
} platform_spi_slave_driver_t;
typedef struct
{
uint8_t unimplemented;
} platform_i2c_t;
typedef struct
{
mico_mutex_t i2c_mutex;
} platform_i2c_driver_t;
typedef void (* wakeup_irq_handler_t)(void *arg);
typedef struct
{
uint32_t port_id;
} platform_uart_t;
typedef struct
{
UART_ID_Type id;
ring_buffer_t* rx_ring_buffer;
mico_semaphore_t rx_complete;
mico_semaphore_t tx_complete;
mico_mutex_t tx_mutex;
mico_semaphore_t sem_wakeup;
volatile uint32_t tx_size;
volatile uint32_t rx_size;
volatile OSStatus last_receive_result;
volatile OSStatus last_transmit_result;
platform_uart_driver_flow_control_t flow_control;
} platform_uart_driver_t;
typedef struct
{
uint32_t flash_type;
uint32_t flash_start_addr;
uint32_t flash_length;
} platform_flash_t;
typedef struct
{
const platform_flash_t* peripheral;
mico_mutex_t flash_mutex;
volatile bool initialized;
} platform_flash_driver_t;
/******************************************************
* Global Variables
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
int get_passive_firmware(void);
int part_write_layout(void);
//OSStatus platform_gpio_irq_manager_init ( void );
//uint8_t platform_gpio_get_port_number ( platform_gpio_port_t* gpio_port );
//OSStatus platform_gpio_enable_clock ( const platform_gpio_t* gpio );
//OSStatus platform_gpio_set_alternate_function( platform_gpio_port_t* gpio_port, uint8_t pin_number, GPIOOType_TypeDef output_type, GPIOPuPd_TypeDef pull_up_down_type, uint8_t alternation_function );
//
//OSStatus platform_mcu_powersave_init ( void );
//
//OSStatus platform_rtc_init ( void );
//OSStatus platform_rtc_enter_powersave ( void );
//OSStatus platform_rtc_abort_powersave ( void );
//OSStatus platform_rtc_exit_powersave ( uint32_t requested_sleep_time, uint32_t *cpu_sleep_time );
//
//uint8_t platform_uart_get_port_number ( platform_uart_port_t* uart );
//void platform_uart_irq ( platform_uart_driver_t* driver );
//void platform_uart_tx_dma_irq ( platform_uart_driver_t* driver );
//void platform_uart_rx_dma_irq ( platform_uart_driver_t* driver );
//
//uint8_t platform_spi_get_port_number ( platform_spi_port_t* spi );
#ifdef __cplusplus
} /* extern "C" */
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -1,103 +1,103 @@
/****************************************************************************//**
* @file mw300_bg.c
* @brief This file provides BG functions.
* @version V1.3.0
* @date 12-Aug-2013
* @author CE Application Team
*
* @note
* Copyright (C) 2012 Marvell Technology Group Ltd. All rights reserved.
*
* @par
* Marvell is supplying this software which provides customers with programming
* information regarding the products. Marvell has no responsibility or
* liability for the use of the software. Marvell not guarantee the correctness
* of this software. Marvell reserves the right to make changes in the software
* without notification.
*
*******************************************************************************/
#include "mw300.h"
#include "mw300_bg.h"
/** @addtogroup MW300_Periph_Driver
* @{
*/
/** @defgroup BG BG
* @brief BG driver modules
* @{
*/
/** @defgroup BG_Private_Type
* @{
*/
/*@} end of group BG_Private_Type*/
/** @defgroup BG_Private_Defines
* @{
*/
/*@} end of group BG_Private_Defines */
/** @defgroup BG_Private_Variables
* @{
*/
/*@} end of group BG_Private_Variables */
/** @defgroup BG_Global_Variables
* @{
*/
/*@} end of group BG_Global_Variables */
/** @defgroup BG_Private_FunctionDeclaration
* @{
*/
/*@} end of group BG_Private_FunctionDeclaration */
/** @defgroup BG_Private_Functions
* @{
*/
/*@} end of group BG_Private_Functions */
/** @defgroup BG_Public_Functions
* @{
*/
/****************************************************************************//**
* @brief Power Up Bandgap
*
* @param none
*
* @return none
*
*******************************************************************************/
void BG_PowerUp(void)
{
BG->CTRL.BF.PD = 0;
}
/****************************************************************************//**
* @brief Power Down Bandgap
*
* @param none
*
* @return none
*
*******************************************************************************/
void BG_PowerDown(void)
{
BG->CTRL.BF.PD = 1;
}
/*@} end of group BG_Public_Functions */
/*@} end of group BG */
/*@} end of group MW300_Periph_Driver */
/****************************************************************************//**
* @file mw300_bg.c
* @brief This file provides BG functions.
* @version V1.3.0
* @date 12-Aug-2013
* @author CE Application Team
*
* @note
* Copyright (C) 2012 Marvell Technology Group Ltd. All rights reserved.
*
* @par
* Marvell is supplying this software which provides customers with programming
* information regarding the products. Marvell has no responsibility or
* liability for the use of the software. Marvell not guarantee the correctness
* of this software. Marvell reserves the right to make changes in the software
* without notification.
*
*******************************************************************************/
#include "mw300.h"
#include "mw300_bg.h"
/** @addtogroup MW300_Periph_Driver
* @{
*/
/** @defgroup BG BG
* @brief BG driver modules
* @{
*/
/** @defgroup BG_Private_Type
* @{
*/
/*@} end of group BG_Private_Type*/
/** @defgroup BG_Private_Defines
* @{
*/
/*@} end of group BG_Private_Defines */
/** @defgroup BG_Private_Variables
* @{
*/
/*@} end of group BG_Private_Variables */
/** @defgroup BG_Global_Variables
* @{
*/
/*@} end of group BG_Global_Variables */
/** @defgroup BG_Private_FunctionDeclaration
* @{
*/
/*@} end of group BG_Private_FunctionDeclaration */
/** @defgroup BG_Private_Functions
* @{
*/
/*@} end of group BG_Private_Functions */
/** @defgroup BG_Public_Functions
* @{
*/
/****************************************************************************//**
* @brief Power Up Bandgap
*
* @param none
*
* @return none
*
*******************************************************************************/
void BG_PowerUp(void)
{
BG->CTRL.BF.PD = 0;
}
/****************************************************************************//**
* @brief Power Down Bandgap
*
* @param none
*
* @return none
*
*******************************************************************************/
void BG_PowerDown(void)
{
BG->CTRL.BF.PD = 1;
}
/*@} end of group BG_Public_Functions */
/*@} end of group BG */
/*@} end of group MW300_Periph_Driver */

View File

@@ -1,65 +1,65 @@
/****************************************************************************//**
* @file mw300_bg.h
* @brief BG driver module header file.
* @version V1.3.0
* @date 12-Aug-2013
* @author CE Application Team
*
* @note
* Copyright (C) 2012 Marvell Technology Group Ltd. All rights reserved.
*
* @par
* Marvell is supplying this software which provides customers with programming
* information regarding the products. Marvell has no responsibility or
* liability for the use of the software. Marvell not guarantee the correctness
* of this software. Marvell reserves the right to make changes in the software
* without notification.
*
*******************************************************************************/
#ifndef __MW300_BG_H__
#define __MW300_BG_H__
/* Includes ------------------------------------------------------------------ */
#include "mw300_driver.h"
/** @addtogroup MW300_Periph_Driver
* @{
*/
/** @addtogroup BG
* @{
*/
/** @defgroup BG_Public_Types BG_Public_Types
* @{
*/
/*@} end of group BG_Public_Types definitions */
/** @defgroup BG_Public_Constants
* @{
*/
/*@} end of group BG_Public_Constants */
/** @defgroup BG_Public_Macro
* @{
*/
/*@} end of group BG_Public_Macro */
/** @defgroup BG_Public_FunctionDeclaration
* @brief BG functions statement
* @{
*/
void BG_PowerUp(void);
void BG_PowerDown(void);
/*@} end of group BG_Public_FunctionDeclaration */
/*@} end of group BG */
/*@} end of group MW300_Periph_Driver */
#endif
/****************************************************************************//**
* @file mw300_bg.h
* @brief BG driver module header file.
* @version V1.3.0
* @date 12-Aug-2013
* @author CE Application Team
*
* @note
* Copyright (C) 2012 Marvell Technology Group Ltd. All rights reserved.
*
* @par
* Marvell is supplying this software which provides customers with programming
* information regarding the products. Marvell has no responsibility or
* liability for the use of the software. Marvell not guarantee the correctness
* of this software. Marvell reserves the right to make changes in the software
* without notification.
*
*******************************************************************************/
#ifndef __MW300_BG_H__
#define __MW300_BG_H__
/* Includes ------------------------------------------------------------------ */
#include "mw300_driver.h"
/** @addtogroup MW300_Periph_Driver
* @{
*/
/** @addtogroup BG
* @{
*/
/** @defgroup BG_Public_Types BG_Public_Types
* @{
*/
/*@} end of group BG_Public_Types definitions */
/** @defgroup BG_Public_Constants
* @{
*/
/*@} end of group BG_Public_Constants */
/** @defgroup BG_Public_Macro
* @{
*/
/*@} end of group BG_Public_Macro */
/** @defgroup BG_Public_FunctionDeclaration
* @brief BG functions statement
* @{
*/
void BG_PowerUp(void);
void BG_PowerDown(void);
/*@} end of group BG_Public_FunctionDeclaration */
/*@} end of group BG */
/*@} end of group MW300_Periph_Driver */
#endif

View File

@@ -1,53 +1,53 @@
/*
* Automatically generated register structure
*
* Copyright 2013 Marvell International Ltd. All rights reserved.
*
* Date: Fri Oct 25 01:34:02 AM PDT 2013
* User: chengwen
* Hostname: sds-159s
* OS: Linux 2.6.18-238.12.1.el5
* Midas: V1.02 Thu Sep 13 12:12:00 PDT 2012
* Usergen: V1.02
* Path: /proj/klmcu0/wa/chengwen/klmcu0/top/sim/run
* Cmdline: midas -param internal=true -usergen /proj/cadsim/MIDAS/1.02/examples/usergen/cdef2/cdef2.tcl /proj/klmcu0/wa/chengwen/klmcu0/hard_ip/GAU/gau_dig/doc/bg.csv
*/
#ifndef _BG_REG_H
#define _BG_REG_H
struct bg_reg {
/* 0x0: Control Register */
union {
struct {
uint32_t PD : 1; /* [0] r/w */
uint32_t SEL_CLK_CHOP : 2; /* [2:1] r/w */
uint32_t CHOP_EN : 1; /* [3] r/w */
uint32_t RES_TRIM : 4; /* [7:4] r/w */
uint32_t RESERVED_31_8 : 24; /* [31:8] rsvd */
} BF;
uint32_t WORDVAL;
} CTRL;
/* 0x4: Status Register */
union {
struct {
uint32_t RDY : 1; /* [0] r/o */
uint32_t RESERVED_31_1 : 31; /* [31:1] rsvd */
} BF;
uint32_t WORDVAL;
} STATUS;
};
typedef volatile struct bg_reg bg_reg_t;
#ifdef BG_IMPL
BEGIN_REG_SECTION(bg_registers)
bg_reg_t BGREG;
END_REG_SECTION(bg_registers)
#else
extern bg_reg_t BGREG;
#endif
#endif /* _BG_REG_H */
/*
* Automatically generated register structure
*
* Copyright 2013 Marvell International Ltd. All rights reserved.
*
* Date: Fri Oct 25 01:34:02 AM PDT 2013
* User: chengwen
* Hostname: sds-159s
* OS: Linux 2.6.18-238.12.1.el5
* Midas: V1.02 Thu Sep 13 12:12:00 PDT 2012
* Usergen: V1.02
* Path: /proj/klmcu0/wa/chengwen/klmcu0/top/sim/run
* Cmdline: midas -param internal=true -usergen /proj/cadsim/MIDAS/1.02/examples/usergen/cdef2/cdef2.tcl /proj/klmcu0/wa/chengwen/klmcu0/hard_ip/GAU/gau_dig/doc/bg.csv
*/
#ifndef _BG_REG_H
#define _BG_REG_H
struct bg_reg {
/* 0x0: Control Register */
union {
struct {
uint32_t PD : 1; /* [0] r/w */
uint32_t SEL_CLK_CHOP : 2; /* [2:1] r/w */
uint32_t CHOP_EN : 1; /* [3] r/w */
uint32_t RES_TRIM : 4; /* [7:4] r/w */
uint32_t RESERVED_31_8 : 24; /* [31:8] rsvd */
} BF;
uint32_t WORDVAL;
} CTRL;
/* 0x4: Status Register */
union {
struct {
uint32_t RDY : 1; /* [0] r/o */
uint32_t RESERVED_31_1 : 31; /* [31:1] rsvd */
} BF;
uint32_t WORDVAL;
} STATUS;
};
typedef volatile struct bg_reg bg_reg_t;
#ifdef BG_IMPL
BEGIN_REG_SECTION(bg_registers)
bg_reg_t BGREG;
END_REG_SECTION(bg_registers)
#else
extern bg_reg_t BGREG;
#endif
#endif /* _BG_REG_H */

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