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修复mico-sdk错误

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This commit is contained in:
nhkefus
2025-03-11 15:54:45 +08:00
parent 3422912129
commit 2ccb892a1c
2152 changed files with 664341 additions and 702636 deletions
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5
mico-os/platform/MCU/LPC5410x/LPC5410x.mk
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@@ -69,11 +69,6 @@ else
endif #NO_WIFI
# These need to be forced into the final ELF since they are not referenced otherwise
$(NAME)_LINK_FILES := ../../$(HOST_ARCH)/crt0_$(TOOLCHAIN_NAME).o \
../../$(HOST_ARCH)/hardfault_handler.o \
platform_vector_table.o \
# $(NAME)_CFLAGS = $(COMPILER_SPECIFIC_PEDANTIC_CFLAGS)

552
mico-os/platform/MCU/LPC5410x/peripherals/platform_mcu_peripheral.h
View File

@@ -1,276 +1,276 @@
/**
******************************************************************************
* @file platform_mcu_peripheral.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provide all the headers of functions for stm32f2xx platform
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#pragma once
#include "chip.h" // rocky: this include makes almost all sources depend on chip.h, should try to remove
#include "mico_rtos.h"
#include "RingBufferUtils.h"
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
#define DMA_MAX_XFER_CNT 1024
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/* GPIO port */
typedef LPC_GPIO_T platform_gpio_port_t;
/* UART port */
typedef LPC_USART_T platform_uart_port_t;
/* SPI port */
typedef LPC_SPI_T platform_spi_port_t;
/* I2C port */
typedef LPC_I2C_T platform_i2c_port_t;
/* GPIO alternate function */
typedef uint8_t platform_gpio_alternate_function_t;
/* Peripheral clock function */
typedef void (*platform_peripheral_clock_function_t)(uint32_t clock, FunctionalState state );
typedef LPC_DMA_T dma_registers_t;
typedef FunctionalState functional_state_t;
typedef uint32_t peripheral_clock_t;
/******************************************************
* Structures
******************************************************/
typedef struct
{
LPC_DMA_CHANNEL_T* stream; // Magicoe DMA_Stream_TypeDef* stream;
uint32_t channel;
IRQn_Type irq_vector;
uint32_t complete_flags;
uint32_t error_flags;
} platform_dma_config_t;
typedef struct
{
uint8_t port;
uint8_t pin_number;
} platform_gpio_t;
typedef struct
{
LPC_ADC_T* port; // Magicoe ADC_TypeDef* port;
uint8_t channel;
uint32_t adc_peripheral_clock;
ADC_SEQ_IDX_T seqIndex; /* Wecan Modify 2015.07.08 */
const platform_gpio_t* pin;
} platform_adc_t;
#define PWMNDX_SCTL_BASE 0x80UL
#define PWMNDX_SCTH_BASE 0xC0UL
typedef struct
{
union
{
LPC_SCT_T* port; // Magicoe TIM_TypeDef* tim;
LPC_SCT_T* pSCT;
LPC_TIMER_T* pTMR;
};
uint8_t pwmNdx; // 0-7F : Timer ; 80-FF : SCT
uint8_t portNdx; // port & pin
uint8_t pinNdx;
uint8_t pinMux;
} platform_pwm_t;
/* DMA can be enabled by setting SPI_USE_DMA */
typedef struct
{
LPC_SPI_T* port;
const platform_gpio_t* pin_mosi;
const platform_gpio_t* pin_miso;
const platform_gpio_t* pin_clock;
uint8_t dmaRxChnNdx;
uint8_t dmaTxChnNdx;
} platform_spi_t;
typedef struct
{
const platform_spi_t* peripheral;
mico_semaphore_t sem_xfer_done;
mico_mutex_t spi_mutex;
uint8_t isTxDone;
uint8_t isRxDone;
uint8_t isRx;
uint8_t xferErr; // 0 = no err, bit0:txErr, bit1:RxErr
} platform_spi_driver_t;
typedef struct
{
uint8_t unimplemented;
} platform_spi_slave_driver_t;
typedef struct _platform_i2c_cb_t
{
const uint8_t *txBuff; /*!< Pointer to array of bytes to be transmitted */
uint8_t *rxBuff; /*!< Pointer memory where bytes received from I2C be stored */
volatile uint16_t txSz; /*!< Number of bytes in transmit array,
if 0 only receive transfer will be carried on */
volatile uint16_t rxSz; /*!< Number of bytes to received,
if 0 only transmission we be carried on */
volatile uint16_t status; /*!< Status of the current I2C transfer */
uint8_t isProbe;
uint8_t slaveAddr; /*!< 7-bit I2C Slave address */
uint16_t retries; /* Number of times to retry the message */
const void *pDev;
#ifndef BOOTLOADER
mico_semaphore_t semXfer;
mico_mutex_t mtxXfer;
#endif
}platform_i2c_cb_t;
typedef struct
{
LPC_I2C_T* port;
uint8_t irqNdx;
uint8_t hwNdx;
platform_i2c_cb_t *pCtx;
} platform_i2c_t;
typedef struct
{
mico_mutex_t i2c_mutex;
} platform_i2c_driver_t;
typedef void (* wakeup_irq_handler_t)(void *arg);
typedef struct
{
uint8_t dmaTxChnNdx;
uint8_t irqNdx;
uint8_t hwNdx;
uint8_t isRxFifoEn;
platform_uart_port_t* port;
const platform_gpio_t* pin_tx;
const platform_gpio_t* pin_rx;
const platform_gpio_t* pin_cts;
const platform_gpio_t* pin_rts;
} platform_uart_t;
typedef struct
{
platform_uart_t* peripheral;
ring_buffer_t* pRxRing;
uint32_t bufFillThsld; // when ring buffer used size >= bufFillThsld, signal RX complete
uint8_t *pBuf; // if pRxRing is empty, then use this liner buffer, given by caller
uint8_t *pBufEnd;
//#ifndef BOOTLOADER
mico_semaphore_t rx_complete;
mico_semaphore_t tx_complete;
mico_mutex_t tx_mutex;
mico_semaphore_t sem_wakeup;
//#else
// volatile bool rx_complete;
// volatile bool tx_complete;
//#endif
volatile uint32_t tx_size;
volatile uint32_t rx_size;
volatile OSStatus last_receive_result;
volatile OSStatus last_transmit_result;
} platform_uart_driver_t;
typedef struct
{
uint32_t flash_type;
uint32_t flash_start_addr;
uint32_t flash_length;
} platform_flash_t;
typedef struct
{
platform_flash_t* peripheral;
volatile bool initialized;
mico_mutex_t flash_mutex;
} platform_flash_driver_t;
/******************************************************
* Global Variables
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
OSStatus platform_gpio_irq_manager_init ( void );
//uint8_t platform_gpio_get_port_number ( platform_gpio_port_t* gpio_port );
OSStatus platform_gpio_enable_clock ( const platform_gpio_t* gpio );
//OSStatus platform_gpio_set_alternate_function( platform_gpio_port_t* gpio_port, uint8_t pin_number, GPIOOType_TypeDef output_type, GPIOPuPd_TypeDef pull_up_down_type, uint8_t alternation_function );
OSStatus platform_mcu_powersave_init ( void );
OSStatus platform_rtc_init ( void );
OSStatus platform_rtc_enter_powersave ( void );
OSStatus platform_rtc_abort_powersave ( void );
OSStatus platform_rtc_exit_powersave ( uint32_t requested_sleep_time, uint32_t *cpu_sleep_time );
uint8_t platform_uart_get_port_number ( platform_uart_port_t* uart );
void platform_uart_irq ( platform_uart_driver_t* driver );
void platform_uart_tx_dma_irq ( platform_uart_driver_t* driver );
void platform_uart_rx_dma_irq ( platform_uart_driver_t* driver );
uint8_t platform_spi_get_port_number ( platform_spi_port_t* spi );
extern void disable_interrupts(void);
extern void enable_interrupts(void);
#ifdef __cplusplus
} /* extern "C" */
#endif
/**
******************************************************************************
* @file platform_mcu_peripheral.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provide all the headers of functions for stm32f2xx platform
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#pragma once
#include "chip.h" // rocky: this include makes almost all sources depend on chip.h, should try to remove
#include "mico_rtos.h"
#include "RingBufferUtils.h"
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
#define DMA_MAX_XFER_CNT 1024
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/* GPIO port */
typedef LPC_GPIO_T platform_gpio_port_t;
/* UART port */
typedef LPC_USART_T platform_uart_port_t;
/* SPI port */
typedef LPC_SPI_T platform_spi_port_t;
/* I2C port */
typedef LPC_I2C_T platform_i2c_port_t;
/* GPIO alternate function */
typedef uint8_t platform_gpio_alternate_function_t;
/* Peripheral clock function */
typedef void (*platform_peripheral_clock_function_t)(uint32_t clock, FunctionalState state );
typedef LPC_DMA_T dma_registers_t;
typedef FunctionalState functional_state_t;
typedef uint32_t peripheral_clock_t;
/******************************************************
* Structures
******************************************************/
typedef struct
{
LPC_DMA_CHANNEL_T* stream; // Magicoe DMA_Stream_TypeDef* stream;
uint32_t channel;
IRQn_Type irq_vector;
uint32_t complete_flags;
uint32_t error_flags;
} platform_dma_config_t;
typedef struct
{
uint8_t port;
uint8_t pin_number;
} platform_gpio_t;
typedef struct
{
LPC_ADC_T* port; // Magicoe ADC_TypeDef* port;
uint8_t channel;
uint32_t adc_peripheral_clock;
ADC_SEQ_IDX_T seqIndex; /* Wecan Modify 2015.07.08 */
const platform_gpio_t* pin;
} platform_adc_t;
#define PWMNDX_SCTL_BASE 0x80UL
#define PWMNDX_SCTH_BASE 0xC0UL
typedef struct
{
union
{
LPC_SCT_T* port; // Magicoe TIM_TypeDef* tim;
LPC_SCT_T* pSCT;
LPC_TIMER_T* pTMR;
};
uint8_t pwmNdx; // 0-7F : Timer ; 80-FF : SCT
uint8_t portNdx; // port & pin
uint8_t pinNdx;
uint8_t pinMux;
} platform_pwm_t;
/* DMA can be enabled by setting SPI_USE_DMA */
typedef struct
{
LPC_SPI_T* port;
const platform_gpio_t* pin_mosi;
const platform_gpio_t* pin_miso;
const platform_gpio_t* pin_clock;
uint8_t dmaRxChnNdx;
uint8_t dmaTxChnNdx;
} platform_spi_t;
typedef struct
{
const platform_spi_t* peripheral;
mico_semaphore_t sem_xfer_done;
mico_mutex_t spi_mutex;
uint8_t isTxDone;
uint8_t isRxDone;
uint8_t isRx;
uint8_t xferErr; // 0 = no err, bit0:txErr, bit1:RxErr
} platform_spi_driver_t;
typedef struct
{
uint8_t unimplemented;
} platform_spi_slave_driver_t;
typedef struct _platform_i2c_cb_t
{
const uint8_t *txBuff; /*!< Pointer to array of bytes to be transmitted */
uint8_t *rxBuff; /*!< Pointer memory where bytes received from I2C be stored */
volatile uint16_t txSz; /*!< Number of bytes in transmit array,
if 0 only receive transfer will be carried on */
volatile uint16_t rxSz; /*!< Number of bytes to received,
if 0 only transmission we be carried on */
volatile uint16_t status; /*!< Status of the current I2C transfer */
uint8_t isProbe;
uint8_t slaveAddr; /*!< 7-bit I2C Slave address */
uint16_t retries; /* Number of times to retry the message */
const void *pDev;
#ifndef BOOTLOADER
mico_semaphore_t semXfer;
mico_mutex_t mtxXfer;
#endif
}platform_i2c_cb_t;
typedef struct
{
LPC_I2C_T* port;
uint8_t irqNdx;
uint8_t hwNdx;
platform_i2c_cb_t *pCtx;
} platform_i2c_t;
typedef struct
{
mico_mutex_t i2c_mutex;
} platform_i2c_driver_t;
typedef void (* wakeup_irq_handler_t)(void *arg);
typedef struct
{
uint8_t dmaTxChnNdx;
uint8_t irqNdx;
uint8_t hwNdx;
uint8_t isRxFifoEn;
platform_uart_port_t* port;
const platform_gpio_t* pin_tx;
const platform_gpio_t* pin_rx;
const platform_gpio_t* pin_cts;
const platform_gpio_t* pin_rts;
} platform_uart_t;
typedef struct
{
platform_uart_t* peripheral;
ring_buffer_t* pRxRing;
uint32_t bufFillThsld; // when ring buffer used size >= bufFillThsld, signal RX complete
uint8_t *pBuf; // if pRxRing is empty, then use this liner buffer, given by caller
uint8_t *pBufEnd;
//#ifndef BOOTLOADER
mico_semaphore_t rx_complete;
mico_semaphore_t tx_complete;
mico_mutex_t tx_mutex;
mico_semaphore_t sem_wakeup;
//#else
// volatile bool rx_complete;
// volatile bool tx_complete;
//#endif
volatile uint32_t tx_size;
volatile uint32_t rx_size;
volatile OSStatus last_receive_result;
volatile OSStatus last_transmit_result;
} platform_uart_driver_t;
typedef struct
{
uint32_t flash_type;
uint32_t flash_start_addr;
uint32_t flash_length;
} platform_flash_t;
typedef struct
{
platform_flash_t* peripheral;
volatile bool initialized;
mico_mutex_t flash_mutex;
} platform_flash_driver_t;
/******************************************************
* Global Variables
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
OSStatus platform_gpio_irq_manager_init ( void );
//uint8_t platform_gpio_get_port_number ( platform_gpio_port_t* gpio_port );
OSStatus platform_gpio_enable_clock ( const platform_gpio_t* gpio );
//OSStatus platform_gpio_set_alternate_function( platform_gpio_port_t* gpio_port, uint8_t pin_number, GPIOOType_TypeDef output_type, GPIOPuPd_TypeDef pull_up_down_type, uint8_t alternation_function );
OSStatus platform_mcu_powersave_init ( void );
OSStatus platform_rtc_init ( void );
OSStatus platform_rtc_enter_powersave ( void );
OSStatus platform_rtc_abort_powersave ( void );
OSStatus platform_rtc_exit_powersave ( uint32_t requested_sleep_time, uint32_t *cpu_sleep_time );
uint8_t platform_uart_get_port_number ( platform_uart_port_t* uart );
void platform_uart_irq ( platform_uart_driver_t* driver );
void platform_uart_tx_dma_irq ( platform_uart_driver_t* driver );
void platform_uart_rx_dma_irq ( platform_uart_driver_t* driver );
uint8_t platform_spi_get_port_number ( platform_spi_port_t* spi );
extern void disable_interrupts(void);
extern void enable_interrupts(void);
#ifdef __cplusplus
} /* extern "C" */
#endif

152
mico-os/platform/MCU/LPC5410x/peripherals/platform_rng.c
View File

@@ -1,76 +1,76 @@
/**
******************************************************************************
* @file platform_rng.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provide RNG driver functions.
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#include "mico_platform.h"
#include "mico_rtos.h"
#include "platform.h"
/******************************************************
* Macros
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/******************************************************
* Structures
******************************************************/
/******************************************************
* Variables
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
OSStatus platform_random_number_read( void *inBuffer, int inByteCount )
{
// PLATFORM_TO_DO
int idx;
uint32_t *pWord = inBuffer;
uint32_t tempRDM;
uint8_t *pByte = NULL;
int inWordCount;
int remainByteCount;
inWordCount = inByteCount/4;
remainByteCount = inByteCount%4;
pByte = (uint8_t *)pWord+inWordCount*4;
for(idx = 0; idx<inWordCount; idx++, pWord++){
srand(mico_rtos_get_time());
*pWord = rand();
}
if(remainByteCount){
srand(mico_rtos_get_time());
tempRDM = rand();
memcpy(pByte, &tempRDM, (size_t)remainByteCount);
}
return kNoErr;
}
/**
******************************************************************************
* @file platform_rng.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provide RNG driver functions.
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#include "mico_platform.h"
#include "mico_rtos.h"
#include "platform.h"
/******************************************************
* Macros
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/******************************************************
* Structures
******************************************************/
/******************************************************
* Variables
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
OSStatus platform_random_number_read( void *inBuffer, int inByteCount )
{
// PLATFORM_TO_DO
int idx;
uint32_t *pWord = inBuffer;
uint32_t tempRDM;
uint8_t *pByte = NULL;
int inWordCount;
int remainByteCount;
inWordCount = inByteCount/4;
remainByteCount = inByteCount%4;
pByte = (uint8_t *)pWord+inWordCount*4;
for(idx = 0; idx<inWordCount; idx++, pWord++){
srand(mico_rtos_get_time());
*pWord = rand();
}
if(remainByteCount){
srand(mico_rtos_get_time());
tempRDM = rand();
memcpy(pByte, &tempRDM, (size_t)remainByteCount);
}
return kNoErr;
}

1410
mico-os/platform/MCU/LPC5410x/peripherals/platform_uart.c
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File diff suppressed because it is too large Load Diff

776
mico-os/platform/MCU/LPC5410x/platform_init.c
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@@ -1,388 +1,388 @@
/**
******************************************************************************
* @file stm32f2xx_platform.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provide functions called by MICO to drive stm32f2xx
* platform: - e.g. power save, reboot, platform initialize
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#include "platform_peripheral.h"
#include "platform.h"
#include "platform_config.h"
#include "mico_platform.h"
#include "mico_rtos.h"
#include "platform_logging.h"
#include <string.h> // For memcmp
#include "crt0.h"
#include "platform_init.h"
#ifdef __GNUC__
#include "../../GCC/stdio_newlib.h"
#endif /* ifdef __GNUC__ */
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
#ifndef STDIO_BUFFER_SIZE
#define STDIO_BUFFER_SIZE 64
#endif
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/******************************************************
* Structures
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
extern OSStatus host_platform_init( void );
/******************************************************
* Variables Definitions
******************************************************/
extern platform_uart_t platform_uart_peripherals[];
extern platform_uart_driver_t platform_uart_drivers[];
// rocky: add global definitions of peripheral for watch window
USED LPC_SYSCON_T * g_pSys = LPC_SYSCON;
USED LPC_ASYNC_SYSCON_T *g_pASys = LPC_ASYNC_SYSCON;
USED LPC_IOCON_T *g_pIO = LPC_IOCON;
USED LPC_GPIO_T *g_pGP = LPC_GPIO;
USED LPC_INMUX_T *g_pInMux = LPC_INMUX;
USED LPC_DMA_T *g_pDMA = LPC_DMA;
USED LPC_SPI_T *g_pSPI0 = LPC_SPI0;
USED LPC_SPI_T *g_pSPI1 = LPC_SPI1;
USED LPC_PMU_T *g_pPMU = LPC_PMU;
USED LPC_FIFO_T *g_pFIFO = LPC_FIFO;
USED NVIC_Type *g_pNVIC = NVIC;
USED SCB_Type *g_pSCB = SCB;
USED SysTick_Type *g_pSysTick = SysTick;
/* mico_cpu_clock_hz is used by MICO RTOS */
//volatile uint32_t mico_cpu_clock_hz;
#ifndef MICO_DISABLE_STDIO
static const mico_uart_config_t stdio_uart_config =
{
.baud_rate = STDIO_UART_BAUDRATE,
.data_width = DATA_WIDTH_8BIT,
.parity = NO_PARITY,
.stop_bits = STOP_BITS_1,
.flow_control = FLOW_CONTROL_DISABLED,
.flags = 0,
};
static volatile ring_buffer_t stdio_rx_buffer;
static volatile uint8_t stdio_rx_data[STDIO_BUFFER_SIZE];
mico_mutex_t stdio_rx_mutex;
mico_mutex_t stdio_tx_mutex;
#endif /* #ifndef MICO_DISABLE_STDIO */
/******************************************************
* Function Definitions
******************************************************/
#if defined ( __ICCARM__ )
static inline void __jump_to( uint32_t addr )
{
__asm( "MOV R1, #0x00000001" );
__asm( "ORR R0, R0, R1" ); /* Last bit of jump address indicates whether destination is Thumb or ARM code */
__asm( "BLX R0" );
}
#elif defined ( __GNUC__ )
__attribute__( ( always_inline ) ) static __INLINE void __jump_to( uint32_t addr )
{
addr |= 0x00000001; /* Last bit of jump address indicates whether destination is Thumb or ARM code */
__ASM volatile ("BX %0" : : "r" (addr) );
}
#elif defined ( __CC_ARM )
static void __asm __jump_to( uint32_t addr )
{
MOV R1, #0x00000001
ORR R0, R0, R1 /* Last bit of jump address indicates whether destination is Thumb or ARM code */
BLX R0
}
#endif
/*Boot to mico application form APPLICATION_START_ADDRESS defined in platform_common_config.h */
void startApplication( uint32_t app_addr )
{
uint32_t* stack_ptr;
uint32_t* start_ptr;
//if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) != 0x20000000)
//app_addr += 0x200;
/* Test if user code is programmed starting from address "ApplicationAddress" */
// if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) == 0x20000000)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
/* Clear all interrupt enabled by bootloader */
for (int i = 0; i < 8; i++ )
NVIC->ICER[i] = 0xFFFFFFFF;
stack_ptr = (uint32_t*) app_addr; /* Initial stack pointer is first 4 bytes of vector table */
start_ptr = ( stack_ptr + 1 ); /* Reset vector is second 4 bytes of vector table */
#if defined ( __ICCARM__)
__ASM( "MOV LR, #0xFFFFFFFF" );
__ASM( "MOV R1, #0x01000000" );
__ASM( "MSR APSR_nzcvq, R1" );
__ASM( "MOV R1, #0x00000000" );
__ASM( "MSR PRIMASK, R1" );
__ASM( "MSR FAULTMASK, R1" );
__ASM( "MSR BASEPRI, R1" );
__ASM( "MSR CONTROL, R1" );
#endif
__set_MSP( *stack_ptr );
__jump_to( *start_ptr );
}
}
void platform_mcu_reset( void )
{
NVIC_SystemReset();
}
#include "power_control.h"
void DMAInit(void)
{
static uint8_t ls_isDMAInited;
if (ls_isDMAInited == 0)
{
ls_isDMAInited = 1;
// enable clock for DMA
g_pSys->AHBCLKCTRLSET[0] = 1UL << 20;
// make DMA has highest bus matrix priority
g_pSys->AHBMATPRIO |= 3UL<<8;
// reset, and clear reset of DMA
g_pSys->PRESETCTRLSET[0] = 1UL << 20;
g_pSys->PRESETCTRLCLR[0] = 1UL << 20;
g_pDMA->CTRL = 1; // enable DMA controller
g_pDMA->SRAMBASE = (uint32_t)(Chip_DMA_Table); // set desc table addr
NVIC_EnableIRQ(DMA_IRQn);
}
}
void AsyncClockCfg(void)
{
// make sure SystemCoreClock is multiples of 12MHz
if (SystemCoreClock % (48 * 1000 * 1000) == 0
)
{
// configure 48MHz
g_pASys->ASYNCCLKDIV = SystemCoreClock / 48000000;
}
else if (SystemCoreClock % (24 * 1000 * 1000) == 0)
{
// configure 24MHz
g_pASys->ASYNCCLKDIV = SystemCoreClock / 24000000;
}
else if (SystemCoreClock % (12 * 1000 * 1000) == 0)
{
// make ASync clock at 12MHz
g_pASys->ASYNCCLKDIV = SystemCoreClock / 12000000;
}
else
while(1);
// make USART clock = AsyncClk * 22 / 256, so it is multiples of 11.0592MHz
g_pASys->FRGCTRL = 255 | 22<<8;
}
/* MCU common clock initialisation function
* This brings up enough clocks to allow the processor to run quickly while initialising memory.
* Other platform specific clock init can be done in init_platform() or init_architecture()
*/
extern void PwrCtlStateReset(void);
void init_clocks( void )
{
// >>> rocky: make sure linker does not remove
g_pSys = g_pSys;
g_pASys = g_pASys;
g_pIO = g_pIO;
g_pGP = g_pGP ;
g_pInMux = g_pInMux;
g_pDMA = g_pDMA;
g_pSPI0 = g_pSPI0;
g_pSPI1 = g_pSPI1;
g_pPMU = g_pPMU;
// <<<
g_pSys = LPC_SYSCON;
g_pSys->PDRUNCFGCLR = 0x0FUL<<13; // Turn on power for all SRAM blocks
g_pSys->AHBCLKCTRL[0] |= 0x18; // Turn on clock for all SRAM blocks
g_pSys->AHBMATPRIO = 2UL<<0 | 3UL<<2; // set ICode and DCode bus priority high
// extern void *__Vectors;
// SCB->VTOR = (uint32_t) &__Vectors;
fpuInit();
PwrCtlStateReset();
// SystemCoreClockUpdate();
#if (defined FIRMWARE_DOWNLOAD) || (defined BOOTLOADER)
//#ifdef FIRMWARE_DOWNLOAD
//#if 0
// enable clock to InMux, PinINT, IOCON, GPIO0 & 1
g_pSys->AHBCLKCTRLSET[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
// reset InMux, PinINT, IOCON, GPIO0 & 1
g_pSys->PRESETCTRLSET[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
g_pSys->PRESETCTRLCLR[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
/* Turn on the IRC by clearing the power down bit */
Chip_SYSCON_PowerUp(SYSCON_PDRUNCFG_PD_IRC_OSC | SYSCON_PDRUNCFG_PD_IRC);
/* Set main clock source to the system PLL. This will drive 24MHz
for the main clock and 24MHz for the system clock */
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_IRC);
/* Set system clock divider to 1 */
Chip_Clock_SetSysClockDiv(1);
Chip_SYSCON_Enable_ASYNC_Syscon(true);
g_pASys->ASYNCAPBCLKCTRL = 1; // enable Async APB
// select main clock (CPU clock) as ASync clock for faster SPI
g_pASys->ASYNCAPBCLKSELA = 0;
g_pASys->ASYNCAPBCLKSELB = 0;
Chip_Clock_SetAsyncSysconClockSource(SYSCON_ASYNC_MAINCLK);
/* Setup FLASH access to 1 clock */
Chip_FMC_SetFLASHAccess(FLASHTIM_20MHZ_CPU);
// set frequency for mico task
TaskProcNotify(MICO_TASK, 1);
AsyncClockCfg();
#endif
#ifdef NO_MICO_RTOS
SysTick_Config( SystemCoreClock / 1000 );
#endif
//mico_cpu_clock_hz = SystemCoreClock;
g_pSys->AHBCLKCTRL[0] |= 0x18; // Opened SRAM1 and SRAM2
}
WEAK void init_memory( void )
{
}
// RockyS : set up timer interrupt
// extern uint32_t CFG_PRIO_BITS;
void init_architecture( void )
{
init_clocks();
DMAInit();
platform_init_peripheral_irq_priorities();
g_pSys->FIFOCTRL =0;
/* Initialise GPIO IRQ manager */
platform_gpio_irq_manager_init();
#ifndef MICO_DISABLE_STDIO
#ifndef NO_MICO_RTOS
mico_rtos_init_mutex( &stdio_tx_mutex );
mico_rtos_unlock_mutex ( &stdio_tx_mutex );
mico_rtos_init_mutex( &stdio_rx_mutex );
mico_rtos_unlock_mutex ( &stdio_rx_mutex );
#endif
ring_buffer_init ( (ring_buffer_t*)&stdio_rx_buffer, (uint8_t*)stdio_rx_data, STDIO_BUFFER_SIZE );
platform_uart_init( &platform_uart_drivers[STDIO_UART], &platform_uart_peripherals[STDIO_UART], &stdio_uart_config, (ring_buffer_t*)&stdio_rx_buffer );
#endif
/* Ensure 802.11 device is in reset. */
host_platform_init( );
/* Initialise nanosecond clock counter */
platform_init_nanosecond_clock();
#ifdef BOOTLOADER
return;
#else
/* Initialise RTC */
platform_rtc_init( );
#ifndef MICO_DISABLE_MCU_POWERSAVE
/* Initialise MCU powersave */
platform_mcu_powersave_init( );
#endif /* ifndef MICO_DISABLE_MCU_POWERSAVE */
platform_mcu_powersave_disable( );
#endif
}
OSStatus stdio_hardfault( char* data, uint32_t size )
{
#ifndef MICO_DISABLE_STDIO
uint32_t idx;
for(idx = 0; idx < size; idx++){
// Magicoe TODO delete
// while ( ( platform_uart_peripherals[ STDIO_UART ].port->SR & USART_SR_TXE ) == 0 );
// platform_uart_peripherals[ STDIO_UART ].port->DR = (data[idx] & (uint16_t)0x01FF);
while ((Chip_UART_GetStatus(platform_uart_peripherals[STDIO_UART].port) & UART_STAT_TXRDY) == 0);
Chip_UART_SendByte(platform_uart_peripherals[STDIO_UART].port, (data[idx] & (uint16_t)0x00FF) );
}
#endif
return kNoErr;
}
/******************************************************
* NO-OS Functions
******************************************************/
#ifdef NO_MICO_RTOS
static volatile uint32_t no_os_tick = 0;
void SysTick_Handler(void)
{
no_os_tick ++;
platform_watchdog_kick( );
}
uint32_t mico_get_time_no_os(void)
{
return no_os_tick;
}
#endif
// end file --- MG.Niu ---
/**
******************************************************************************
* @file stm32f2xx_platform.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provide functions called by MICO to drive stm32f2xx
* platform: - e.g. power save, reboot, platform initialize
******************************************************************************
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
******************************************************************************
*/
#include "platform_peripheral.h"
#include "platform.h"
#include "platform_config.h"
#include "mico_platform.h"
#include "mico_rtos.h"
#include "platform_logging.h"
#include <string.h> // For memcmp
#include "crt0.h"
#include "platform_init.h"
#ifdef __GNUC__
#include "../../GCC/stdio_newlib.h"
#endif /* ifdef __GNUC__ */
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
#ifndef STDIO_BUFFER_SIZE
#define STDIO_BUFFER_SIZE 64
#endif
/******************************************************
* Enumerations
******************************************************/
/******************************************************
* Type Definitions
******************************************************/
/******************************************************
* Structures
******************************************************/
/******************************************************
* Function Declarations
******************************************************/
extern OSStatus host_platform_init( void );
/******************************************************
* Variables Definitions
******************************************************/
extern platform_uart_t platform_uart_peripherals[];
extern platform_uart_driver_t platform_uart_drivers[];
// rocky: add global definitions of peripheral for watch window
USED LPC_SYSCON_T * g_pSys = LPC_SYSCON;
USED LPC_ASYNC_SYSCON_T *g_pASys = LPC_ASYNC_SYSCON;
USED LPC_IOCON_T *g_pIO = LPC_IOCON;
USED LPC_GPIO_T *g_pGP = LPC_GPIO;
USED LPC_INMUX_T *g_pInMux = LPC_INMUX;
USED LPC_DMA_T *g_pDMA = LPC_DMA;
USED LPC_SPI_T *g_pSPI0 = LPC_SPI0;
USED LPC_SPI_T *g_pSPI1 = LPC_SPI1;
USED LPC_PMU_T *g_pPMU = LPC_PMU;
USED LPC_FIFO_T *g_pFIFO = LPC_FIFO;
USED NVIC_Type *g_pNVIC = NVIC;
USED SCB_Type *g_pSCB = SCB;
USED SysTick_Type *g_pSysTick = SysTick;
/* mico_cpu_clock_hz is used by MICO RTOS */
//volatile uint32_t mico_cpu_clock_hz;
#ifndef MICO_DISABLE_STDIO
static const mico_uart_config_t stdio_uart_config =
{
.baud_rate = STDIO_UART_BAUDRATE,
.data_width = DATA_WIDTH_8BIT,
.parity = NO_PARITY,
.stop_bits = STOP_BITS_1,
.flow_control = FLOW_CONTROL_DISABLED,
.flags = 0,
};
static volatile ring_buffer_t stdio_rx_buffer;
static volatile uint8_t stdio_rx_data[STDIO_BUFFER_SIZE];
mico_mutex_t stdio_rx_mutex;
mico_mutex_t stdio_tx_mutex;
#endif /* #ifndef MICO_DISABLE_STDIO */
/******************************************************
* Function Definitions
******************************************************/
#if defined ( __ICCARM__ )
static inline void __jump_to( uint32_t addr )
{
__asm( "MOV R1, #0x00000001" );
__asm( "ORR R0, R0, R1" ); /* Last bit of jump address indicates whether destination is Thumb or ARM code */
__asm( "BLX R0" );
}
#elif defined ( __GNUC__ )
__attribute__( ( always_inline ) ) static __INLINE void __jump_to( uint32_t addr )
{
addr |= 0x00000001; /* Last bit of jump address indicates whether destination is Thumb or ARM code */
__ASM volatile ("BX %0" : : "r" (addr) );
}
#elif defined ( __CC_ARM )
static void __asm __jump_to( uint32_t addr )
{
MOV R1, #0x00000001
ORR R0, R0, R1 /* Last bit of jump address indicates whether destination is Thumb or ARM code */
BLX R0
}
#endif
/*Boot to mico application form APPLICATION_START_ADDRESS defined in platform_common_config.h */
void startApplication( uint32_t app_addr )
{
uint32_t* stack_ptr;
uint32_t* start_ptr;
//if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) != 0x20000000)
//app_addr += 0x200;
/* Test if user code is programmed starting from address "ApplicationAddress" */
// if (((*(volatile uint32_t*)app_addr) & 0x2FFE0000 ) == 0x20000000)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
/* Clear all interrupt enabled by bootloader */
for (int i = 0; i < 8; i++ )
NVIC->ICER[i] = 0xFFFFFFFF;
stack_ptr = (uint32_t*) app_addr; /* Initial stack pointer is first 4 bytes of vector table */
start_ptr = ( stack_ptr + 1 ); /* Reset vector is second 4 bytes of vector table */
#if defined ( __ICCARM__)
__ASM( "MOV LR, #0xFFFFFFFF" );
__ASM( "MOV R1, #0x01000000" );
__ASM( "MSR APSR_nzcvq, R1" );
__ASM( "MOV R1, #0x00000000" );
__ASM( "MSR PRIMASK, R1" );
__ASM( "MSR FAULTMASK, R1" );
__ASM( "MSR BASEPRI, R1" );
__ASM( "MSR CONTROL, R1" );
#endif
__set_MSP( *stack_ptr );
__jump_to( *start_ptr );
}
}
void platform_mcu_reset( void )
{
NVIC_SystemReset();
}
#include "power_control.h"
void DMAInit(void)
{
static uint8_t ls_isDMAInited;
if (ls_isDMAInited == 0)
{
ls_isDMAInited = 1;
// enable clock for DMA
g_pSys->AHBCLKCTRLSET[0] = 1UL << 20;
// make DMA has highest bus matrix priority
g_pSys->AHBMATPRIO |= 3UL<<8;
// reset, and clear reset of DMA
g_pSys->PRESETCTRLSET[0] = 1UL << 20;
g_pSys->PRESETCTRLCLR[0] = 1UL << 20;
g_pDMA->CTRL = 1; // enable DMA controller
g_pDMA->SRAMBASE = (uint32_t)(Chip_DMA_Table); // set desc table addr
NVIC_EnableIRQ(DMA_IRQn);
}
}
void AsyncClockCfg(void)
{
// make sure SystemCoreClock is multiples of 12MHz
if (SystemCoreClock % (48 * 1000 * 1000) == 0
)
{
// configure 48MHz
g_pASys->ASYNCCLKDIV = SystemCoreClock / 48000000;
}
else if (SystemCoreClock % (24 * 1000 * 1000) == 0)
{
// configure 24MHz
g_pASys->ASYNCCLKDIV = SystemCoreClock / 24000000;
}
else if (SystemCoreClock % (12 * 1000 * 1000) == 0)
{
// make ASync clock at 12MHz
g_pASys->ASYNCCLKDIV = SystemCoreClock / 12000000;
}
else
while(1);
// make USART clock = AsyncClk * 22 / 256, so it is multiples of 11.0592MHz
g_pASys->FRGCTRL = 255 | 22<<8;
}
/* MCU common clock initialisation function
* This brings up enough clocks to allow the processor to run quickly while initialising memory.
* Other platform specific clock init can be done in init_platform() or init_architecture()
*/
extern void PwrCtlStateReset(void);
void init_clocks( void )
{
// >>> rocky: make sure linker does not remove
g_pSys = g_pSys;
g_pASys = g_pASys;
g_pIO = g_pIO;
g_pGP = g_pGP ;
g_pInMux = g_pInMux;
g_pDMA = g_pDMA;
g_pSPI0 = g_pSPI0;
g_pSPI1 = g_pSPI1;
g_pPMU = g_pPMU;
// <<<
g_pSys = LPC_SYSCON;
g_pSys->PDRUNCFGCLR = 0x0FUL<<13; // Turn on power for all SRAM blocks
g_pSys->AHBCLKCTRL[0] |= 0x18; // Turn on clock for all SRAM blocks
g_pSys->AHBMATPRIO = 2UL<<0 | 3UL<<2; // set ICode and DCode bus priority high
// extern void *__Vectors;
// SCB->VTOR = (uint32_t) &__Vectors;
fpuInit();
PwrCtlStateReset();
// SystemCoreClockUpdate();
#if (defined FIRMWARE_DOWNLOAD) || (defined BOOTLOADER)
//#ifdef FIRMWARE_DOWNLOAD
//#if 0
// enable clock to InMux, PinINT, IOCON, GPIO0 & 1
g_pSys->AHBCLKCTRLSET[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
// reset InMux, PinINT, IOCON, GPIO0 & 1
g_pSys->PRESETCTRLSET[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
g_pSys->PRESETCTRLCLR[0] = 1UL<<11 | 1UL<<18 | 1UL<<13 | 1UL<<14 | 1UL<<15;
/* Turn on the IRC by clearing the power down bit */
Chip_SYSCON_PowerUp(SYSCON_PDRUNCFG_PD_IRC_OSC | SYSCON_PDRUNCFG_PD_IRC);
/* Set main clock source to the system PLL. This will drive 24MHz
for the main clock and 24MHz for the system clock */
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_IRC);
/* Set system clock divider to 1 */
Chip_Clock_SetSysClockDiv(1);
Chip_SYSCON_Enable_ASYNC_Syscon(true);
g_pASys->ASYNCAPBCLKCTRL = 1; // enable Async APB
// select main clock (CPU clock) as ASync clock for faster SPI
g_pASys->ASYNCAPBCLKSELA = 0;
g_pASys->ASYNCAPBCLKSELB = 0;
Chip_Clock_SetAsyncSysconClockSource(SYSCON_ASYNC_MAINCLK);
/* Setup FLASH access to 1 clock */
Chip_FMC_SetFLASHAccess(FLASHTIM_20MHZ_CPU);
// set frequency for mico task
TaskProcNotify(MICO_TASK, 1);
AsyncClockCfg();
#endif
#ifdef NO_MICO_RTOS
SysTick_Config( SystemCoreClock / 1000 );
#endif
//mico_cpu_clock_hz = SystemCoreClock;
g_pSys->AHBCLKCTRL[0] |= 0x18; // Opened SRAM1 and SRAM2
}
WEAK void init_memory( void )
{
}
// RockyS : set up timer interrupt
// extern uint32_t CFG_PRIO_BITS;
void init_architecture( void )
{
init_clocks();
DMAInit();
platform_init_peripheral_irq_priorities();
g_pSys->FIFOCTRL =0;
/* Initialise GPIO IRQ manager */
platform_gpio_irq_manager_init();
#ifndef MICO_DISABLE_STDIO
#ifndef NO_MICO_RTOS
mico_rtos_init_mutex( &stdio_tx_mutex );
mico_rtos_unlock_mutex ( &stdio_tx_mutex );
mico_rtos_init_mutex( &stdio_rx_mutex );
mico_rtos_unlock_mutex ( &stdio_rx_mutex );
#endif
ring_buffer_init ( (ring_buffer_t*)&stdio_rx_buffer, (uint8_t*)stdio_rx_data, STDIO_BUFFER_SIZE );
platform_uart_init( &platform_uart_drivers[STDIO_UART], &platform_uart_peripherals[STDIO_UART], &stdio_uart_config, (ring_buffer_t*)&stdio_rx_buffer );
#endif
/* Ensure 802.11 device is in reset. */
host_platform_init( );
/* Initialise nanosecond clock counter */
platform_init_nanosecond_clock();
#ifdef BOOTLOADER
return;
#else
/* Initialise RTC */
platform_rtc_init( );
#ifndef MICO_DISABLE_MCU_POWERSAVE
/* Initialise MCU powersave */
platform_mcu_powersave_init( );
#endif /* ifndef MICO_DISABLE_MCU_POWERSAVE */
platform_mcu_powersave_disable( );
#endif
}
OSStatus stdio_hardfault( char* data, uint32_t size )
{
#ifndef MICO_DISABLE_STDIO
uint32_t idx;
for(idx = 0; idx < size; idx++){
// Magicoe TODO delete
// while ( ( platform_uart_peripherals[ STDIO_UART ].port->SR & USART_SR_TXE ) == 0 );
// platform_uart_peripherals[ STDIO_UART ].port->DR = (data[idx] & (uint16_t)0x01FF);
while ((Chip_UART_GetStatus(platform_uart_peripherals[STDIO_UART].port) & UART_STAT_TXRDY) == 0);
Chip_UART_SendByte(platform_uart_peripherals[STDIO_UART].port, (data[idx] & (uint16_t)0x00FF) );
}
#endif
return kNoErr;
}
/******************************************************
* NO-OS Functions
******************************************************/
#ifdef NO_MICO_RTOS
static volatile uint32_t no_os_tick = 0;
void SysTick_Handler(void)
{
no_os_tick ++;
platform_watchdog_kick( );
}
uint32_t mico_get_time_no_os(void)
{
return no_os_tick;
}
#endif
// end file --- MG.Niu ---