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修复mico-sdk错误
This commit is contained in:
nhkefus
File diff suppressed because it is too large
Load Diff
@@ -1,263 +1,263 @@
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/**
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******************************************************************************
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* @file wlan_bus_spi.c
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* @author William Xu
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* @version V1.0.0
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* @date 05-May-2014
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* @brief This file provides SPI bus protocol for RF chip.
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******************************************************************************
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* UNPUBLISHED PROPRIETARY SOURCE CODE
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* Copyright (c) 2016 MXCHIP Inc.
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*
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* The contents of this file may not be disclosed to third parties, copied or
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* duplicated in any form, in whole or in part, without the prior written
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* permission of MXCHIP Corporation.
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******************************************************************************
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*/
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#include "string.h" /* for memcpy */
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#include "platform.h"
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#include "platform_peripheral.h"
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#include "platform_logging.h"
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#include "platform_config.h"
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#include "wlan_platform_common.h"
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/******************************************************
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* constants
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******************************************************/
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/* Clock polarity. */
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#define SPI_CLK_POLARITY 0
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/* Clock phase. */
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#define SPI_CLK_PHASE 1
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#define SPI_BAUD_RATE 30000000
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/**
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* transfer direction for the mico platform bus interface
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*/
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typedef enum
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{
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/* if updating this enum, the bus_direction_mapping variable will also need to be updated */
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BUS_READ,
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BUS_WRITE
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} bus_transfer_direction_t;
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/******************************************************
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* structures
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******************************************************/
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/******************************************************
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* variables
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******************************************************/
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static IRQn_Type platform_flexcom_irq_numbers[] =
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{
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[0] = FLEXCOM0_IRQn,
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[1] = FLEXCOM1_IRQn,
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[2] = FLEXCOM2_IRQn,
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[3] = FLEXCOM3_IRQn,
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[4] = FLEXCOM4_IRQn,
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[5] = FLEXCOM5_IRQn,
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[6] = FLEXCOM6_IRQn,
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[7] = FLEXCOM7_IRQn,
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};
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static Flexcom *flexcom_base[] =
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{
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[0] = FLEXCOM0,
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[1] = FLEXCOM1,
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[2] = FLEXCOM2,
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[3] = FLEXCOM3,
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[4] = FLEXCOM4,
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[5] = FLEXCOM5,
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[6] = FLEXCOM6,
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[7] = FLEXCOM7,
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};
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static mico_semaphore_t spi_transfer_finished_semaphore;
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/******************************************************
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* function declarations
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******************************************************/
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extern void wlan_notify_irq( void );
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/******************************************************
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* function definitions
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******************************************************/
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static void spi_irq_handler( void* arg )
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{
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UNUSED_PARAMETER(arg);
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#ifndef MICO_DISABLE_MCU_POWERSAVE
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platform_mcu_powersave_exit_notify( );
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#endif /* ifndef MICO_DISABLE_MCU_POWERSAVE */
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wlan_notify_irq( );
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}
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OSStatus host_platform_bus_init( void )
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{
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pdc_packet_t pdc_spi_packet;
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Pdc* spi_pdc = spi_get_pdc_base( wifi_spi.port );
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platform_mcu_powersave_disable( );
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mico_rtos_init_semaphore( &spi_transfer_finished_semaphore, 1 );
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/* Setup the SPI lines */
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platform_gpio_peripheral_pin_init( wifi_spi.mosi_pin, ( wifi_spi.mosi_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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platform_gpio_peripheral_pin_init( wifi_spi.miso_pin, ( wifi_spi.miso_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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platform_gpio_peripheral_pin_init( wifi_spi.clock_pin, ( wifi_spi.clock_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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/* Setup the interrupt input for WLAN_IRQ */
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platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], INPUT_HIGH_IMPEDANCE );
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platform_gpio_irq_enable( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], IRQ_TRIGGER_RISING_EDGE, spi_irq_handler, 0 );
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/* Setup SPI slave select GPIOs */
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platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_CS], OUTPUT_PUSH_PULL );
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platform_gpio_output_high( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
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#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
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/* Set GPIO_B[1:0] to 01 to put WLAN module into gSPI mode */
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platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], OUTPUT_PUSH_PULL );
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platform_gpio_output_high( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0] );
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platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], OUTPUT_PUSH_PULL );
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platform_gpio_output_low( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1] );
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#endif
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/* Enable the peripheral and set SPI mode. */
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flexcom_enable( flexcom_base[ wifi_spi.spi_id ] );
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flexcom_set_opmode( flexcom_base[ wifi_spi.spi_id ], FLEXCOM_SPI );
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/* Init pdc, and clear RX TX. */
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pdc_spi_packet.ul_addr = 0;
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pdc_spi_packet.ul_size = 1;
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pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
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pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL );
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spi_disable_interrupt(wifi_spi.port, 0xffffffff );
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spi_disable( wifi_spi.port );
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spi_reset( wifi_spi.port );
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spi_set_lastxfer( wifi_spi.port );
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spi_set_master_mode( wifi_spi.port );
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spi_disable_mode_fault_detect( wifi_spi.port );
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spi_set_clock_polarity( wifi_spi.port, 0, SPI_CLK_POLARITY );
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spi_set_clock_phase( wifi_spi.port, 0, SPI_CLK_PHASE );
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spi_set_bits_per_transfer( wifi_spi.port, 0, SPI_CSR_BITS_8_BIT );
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spi_set_baudrate_div( wifi_spi.port, 0, (sysclk_get_cpu_hz() / SPI_BAUD_RATE) );
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spi_set_transfer_delay( wifi_spi.port, 0, 0, 0 );
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/* Must be lower priority than the value of configMAX_SYSCALL_INTERRUPT_PRIORITY */
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/* otherwise FreeRTOS will not be able to mask the interrupt */
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/* keep in mind that ARMCM4 interrupt priority logic is inverted, the highest value */
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/* is the lowest priority */
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/* Configure SPI interrupts . */
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NVIC_EnableIRQ( platform_flexcom_irq_numbers[wifi_spi.spi_id] );
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spi_enable(wifi_spi.port);
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platform_mcu_powersave_enable( );
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return kNoErr;
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}
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OSStatus host_platform_bus_deinit( void )
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{
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platform_mcu_powersave_disable( );
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NVIC_DisableIRQ( platform_flexcom_irq_numbers[wifi_spi.spi_id] );
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pdc_disable_transfer( spi_get_pdc_base( wifi_spi.port ), PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS );
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spi_disable(wifi_spi.port);
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/* Deinit the SPI lines */
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platform_gpio_peripheral_pin_init( wifi_spi.mosi_pin, INPUT_HIGH_IMPEDANCE );
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platform_gpio_peripheral_pin_init( wifi_spi.miso_pin, INPUT_HIGH_IMPEDANCE );
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platform_gpio_peripheral_pin_init( wifi_spi.clock_pin, INPUT_HIGH_IMPEDANCE );
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/* Deinit the interrupt input for WLAN_IRQ */
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platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], INPUT_HIGH_IMPEDANCE );
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platform_gpio_irq_disable( &wifi_spi_pins[WIFI_PIN_SPI_IRQ] );
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/* Deinit SPI slave select GPIOs */
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platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_CS], INPUT_HIGH_IMPEDANCE );
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#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
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platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], INPUT_HIGH_IMPEDANCE );
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platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], INPUT_HIGH_IMPEDANCE );
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#endif
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platform_mcu_powersave_enable( );
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return kNoErr;
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}
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OSStatus host_platform_spi_transfer( bus_transfer_direction_t dir, uint8_t* buffer, uint16_t buffer_length )
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{
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OSStatus result;
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pdc_packet_t pdc_spi_packet = { (uint32_t)buffer, buffer_length };
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Pdc* spi_pdc = spi_get_pdc_base( wifi_spi.port );
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platform_mcu_powersave_disable();
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platform_gpio_output_low( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
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pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL);
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if ( dir == BUS_READ ) {
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pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL);
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spi_enable_interrupt(wifi_spi.port, SPI_IER_RXBUFF );
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pdc_enable_transfer( spi_pdc, PERIPH_PTCR_TXTEN | PERIPH_PTCR_RXTEN );
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}
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if ( dir == BUS_WRITE ) {
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spi_enable_interrupt( wifi_spi.port, SPI_IER_ENDTX );
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pdc_enable_transfer( spi_pdc, PERIPH_PTCR_TXTEN );
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}
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result = mico_rtos_get_semaphore( &spi_transfer_finished_semaphore, 100 );
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platform_gpio_output_high( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
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platform_mcu_powersave_enable();
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return result;
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}
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void platform_wifi_spi_rx_dma_irq(void)
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{
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uint8_t junk1;
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uint16_t junk2;
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pdc_packet_t pdc_spi_packet = { 0, 1 };
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Pdc* spi_pdc = spi_get_pdc_base( wifi_spi.port );
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uint32_t status = spi_read_status( wifi_spi.port );
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uint32_t mask = spi_read_interrupt_mask( wifi_spi.port );
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if ( ( mask & SPI_IMR_RXBUFF ) && ( status & SPI_SR_RXBUFF ) )
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{
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pdc_disable_transfer( spi_pdc, PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS );
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pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL );
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pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
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spi_disable_interrupt( wifi_spi.port, SPI_IER_RXBUFF );
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}
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if ( ( mask & SPI_IMR_ENDTX ) && ( status & SPI_SR_ENDTX ) )
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{
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pdc_disable_transfer( spi_pdc, PERIPH_PTCR_TXTDIS );
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pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
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spi_disable_interrupt( wifi_spi.port, SPI_IER_ENDTX );
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/* Clear SPI RX data in a SPI send sequence */
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spi_read( wifi_spi.port, &junk2, &junk1);
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}
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mico_rtos_set_semaphore( &spi_transfer_finished_semaphore );
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}
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/**
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******************************************************************************
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* @file wlan_bus_spi.c
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* @author William Xu
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* @version V1.0.0
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* @date 05-May-2014
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* @brief This file provides SPI bus protocol for RF chip.
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******************************************************************************
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* UNPUBLISHED PROPRIETARY SOURCE CODE
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* Copyright (c) 2016 MXCHIP Inc.
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*
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* The contents of this file may not be disclosed to third parties, copied or
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* duplicated in any form, in whole or in part, without the prior written
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* permission of MXCHIP Corporation.
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******************************************************************************
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*/
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#include "string.h" /* for memcpy */
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#include "platform.h"
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#include "platform_peripheral.h"
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#include "platform_logging.h"
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#include "platform_config.h"
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#include "wlan_platform_common.h"
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/******************************************************
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* constants
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******************************************************/
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/* Clock polarity. */
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#define SPI_CLK_POLARITY 0
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/* Clock phase. */
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#define SPI_CLK_PHASE 1
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#define SPI_BAUD_RATE 30000000
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/**
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* transfer direction for the mico platform bus interface
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*/
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typedef enum
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{
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/* if updating this enum, the bus_direction_mapping variable will also need to be updated */
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BUS_READ,
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BUS_WRITE
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} bus_transfer_direction_t;
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/******************************************************
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* structures
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******************************************************/
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/******************************************************
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* variables
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******************************************************/
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static IRQn_Type platform_flexcom_irq_numbers[] =
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{
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[0] = FLEXCOM0_IRQn,
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[1] = FLEXCOM1_IRQn,
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[2] = FLEXCOM2_IRQn,
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[3] = FLEXCOM3_IRQn,
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[4] = FLEXCOM4_IRQn,
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[5] = FLEXCOM5_IRQn,
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[6] = FLEXCOM6_IRQn,
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[7] = FLEXCOM7_IRQn,
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};
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static Flexcom *flexcom_base[] =
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{
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[0] = FLEXCOM0,
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[1] = FLEXCOM1,
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[2] = FLEXCOM2,
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[3] = FLEXCOM3,
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[4] = FLEXCOM4,
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[5] = FLEXCOM5,
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[6] = FLEXCOM6,
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[7] = FLEXCOM7,
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};
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static mico_semaphore_t spi_transfer_finished_semaphore;
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/******************************************************
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* function declarations
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******************************************************/
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extern void wlan_notify_irq( void );
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/******************************************************
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* function definitions
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******************************************************/
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static void spi_irq_handler( void* arg )
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{
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UNUSED_PARAMETER(arg);
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#ifndef MICO_DISABLE_MCU_POWERSAVE
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platform_mcu_powersave_exit_notify( );
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#endif /* ifndef MICO_DISABLE_MCU_POWERSAVE */
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wlan_notify_irq( );
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}
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OSStatus host_platform_bus_init( void )
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{
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pdc_packet_t pdc_spi_packet;
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Pdc* spi_pdc = spi_get_pdc_base( wifi_spi.port );
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platform_mcu_powersave_disable( );
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mico_rtos_init_semaphore( &spi_transfer_finished_semaphore, 1 );
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/* Setup the SPI lines */
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platform_gpio_peripheral_pin_init( wifi_spi.mosi_pin, ( wifi_spi.mosi_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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platform_gpio_peripheral_pin_init( wifi_spi.miso_pin, ( wifi_spi.miso_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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platform_gpio_peripheral_pin_init( wifi_spi.clock_pin, ( wifi_spi.clock_pin_mux_mode | IOPORT_MODE_PULLUP ) );
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/* Setup the interrupt input for WLAN_IRQ */
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platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], INPUT_HIGH_IMPEDANCE );
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platform_gpio_irq_enable( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], IRQ_TRIGGER_RISING_EDGE, spi_irq_handler, 0 );
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/* Setup SPI slave select GPIOs */
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platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_CS], OUTPUT_PUSH_PULL );
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platform_gpio_output_high( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
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#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
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/* Set GPIO_B[1:0] to 01 to put WLAN module into gSPI mode */
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platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], OUTPUT_PUSH_PULL );
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platform_gpio_output_high( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0] );
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platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], OUTPUT_PUSH_PULL );
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platform_gpio_output_low( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1] );
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#endif
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/* Enable the peripheral and set SPI mode. */
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flexcom_enable( flexcom_base[ wifi_spi.spi_id ] );
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flexcom_set_opmode( flexcom_base[ wifi_spi.spi_id ], FLEXCOM_SPI );
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/* Init pdc, and clear RX TX. */
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pdc_spi_packet.ul_addr = 0;
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pdc_spi_packet.ul_size = 1;
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pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
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pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL );
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spi_disable_interrupt(wifi_spi.port, 0xffffffff );
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spi_disable( wifi_spi.port );
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spi_reset( wifi_spi.port );
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spi_set_lastxfer( wifi_spi.port );
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spi_set_master_mode( wifi_spi.port );
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spi_disable_mode_fault_detect( wifi_spi.port );
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||||
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||||
spi_set_clock_polarity( wifi_spi.port, 0, SPI_CLK_POLARITY );
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||||
spi_set_clock_phase( wifi_spi.port, 0, SPI_CLK_PHASE );
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spi_set_bits_per_transfer( wifi_spi.port, 0, SPI_CSR_BITS_8_BIT );
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spi_set_baudrate_div( wifi_spi.port, 0, (sysclk_get_cpu_hz() / SPI_BAUD_RATE) );
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||||
spi_set_transfer_delay( wifi_spi.port, 0, 0, 0 );
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||||
|
||||
/* Must be lower priority than the value of configMAX_SYSCALL_INTERRUPT_PRIORITY */
|
||||
/* otherwise FreeRTOS will not be able to mask the interrupt */
|
||||
/* keep in mind that ARMCM4 interrupt priority logic is inverted, the highest value */
|
||||
/* is the lowest priority */
|
||||
/* Configure SPI interrupts . */
|
||||
|
||||
NVIC_EnableIRQ( platform_flexcom_irq_numbers[wifi_spi.spi_id] );
|
||||
|
||||
spi_enable(wifi_spi.port);
|
||||
|
||||
platform_mcu_powersave_enable( );
|
||||
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus host_platform_bus_deinit( void )
|
||||
{
|
||||
platform_mcu_powersave_disable( );
|
||||
|
||||
NVIC_DisableIRQ( platform_flexcom_irq_numbers[wifi_spi.spi_id] );
|
||||
pdc_disable_transfer( spi_get_pdc_base( wifi_spi.port ), PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS );
|
||||
spi_disable(wifi_spi.port);
|
||||
|
||||
/* Deinit the SPI lines */
|
||||
platform_gpio_peripheral_pin_init( wifi_spi.mosi_pin, INPUT_HIGH_IMPEDANCE );
|
||||
platform_gpio_peripheral_pin_init( wifi_spi.miso_pin, INPUT_HIGH_IMPEDANCE );
|
||||
platform_gpio_peripheral_pin_init( wifi_spi.clock_pin, INPUT_HIGH_IMPEDANCE );
|
||||
|
||||
/* Deinit the interrupt input for WLAN_IRQ */
|
||||
platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], INPUT_HIGH_IMPEDANCE );
|
||||
platform_gpio_irq_disable( &wifi_spi_pins[WIFI_PIN_SPI_IRQ] );
|
||||
|
||||
/* Deinit SPI slave select GPIOs */
|
||||
platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_CS], INPUT_HIGH_IMPEDANCE );
|
||||
|
||||
#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
|
||||
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], INPUT_HIGH_IMPEDANCE );
|
||||
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], INPUT_HIGH_IMPEDANCE );
|
||||
#endif
|
||||
|
||||
platform_mcu_powersave_enable( );
|
||||
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus host_platform_spi_transfer( bus_transfer_direction_t dir, uint8_t* buffer, uint16_t buffer_length )
|
||||
{
|
||||
OSStatus result;
|
||||
|
||||
pdc_packet_t pdc_spi_packet = { (uint32_t)buffer, buffer_length };
|
||||
Pdc* spi_pdc = spi_get_pdc_base( wifi_spi.port );
|
||||
|
||||
platform_mcu_powersave_disable();
|
||||
|
||||
platform_gpio_output_low( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
|
||||
|
||||
pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL);
|
||||
|
||||
if ( dir == BUS_READ ) {
|
||||
pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL);
|
||||
|
||||
spi_enable_interrupt(wifi_spi.port, SPI_IER_RXBUFF );
|
||||
pdc_enable_transfer( spi_pdc, PERIPH_PTCR_TXTEN | PERIPH_PTCR_RXTEN );
|
||||
}
|
||||
|
||||
if ( dir == BUS_WRITE ) {
|
||||
spi_enable_interrupt( wifi_spi.port, SPI_IER_ENDTX );
|
||||
pdc_enable_transfer( spi_pdc, PERIPH_PTCR_TXTEN );
|
||||
}
|
||||
|
||||
result = mico_rtos_get_semaphore( &spi_transfer_finished_semaphore, 100 );
|
||||
|
||||
platform_gpio_output_high( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
|
||||
|
||||
platform_mcu_powersave_enable();
|
||||
|
||||
return result;
|
||||
|
||||
}
|
||||
|
||||
void platform_wifi_spi_rx_dma_irq(void)
|
||||
{
|
||||
uint8_t junk1;
|
||||
uint16_t junk2;
|
||||
pdc_packet_t pdc_spi_packet = { 0, 1 };
|
||||
Pdc* spi_pdc = spi_get_pdc_base( wifi_spi.port );
|
||||
|
||||
uint32_t status = spi_read_status( wifi_spi.port );
|
||||
uint32_t mask = spi_read_interrupt_mask( wifi_spi.port );
|
||||
|
||||
if ( ( mask & SPI_IMR_RXBUFF ) && ( status & SPI_SR_RXBUFF ) )
|
||||
{
|
||||
pdc_disable_transfer( spi_pdc, PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS );
|
||||
pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL );
|
||||
pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
|
||||
spi_disable_interrupt( wifi_spi.port, SPI_IER_RXBUFF );
|
||||
}
|
||||
|
||||
if ( ( mask & SPI_IMR_ENDTX ) && ( status & SPI_SR_ENDTX ) )
|
||||
{
|
||||
pdc_disable_transfer( spi_pdc, PERIPH_PTCR_TXTDIS );
|
||||
pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
|
||||
spi_disable_interrupt( wifi_spi.port, SPI_IER_ENDTX );
|
||||
/* Clear SPI RX data in a SPI send sequence */
|
||||
spi_read( wifi_spi.port, &junk2, &junk1);
|
||||
}
|
||||
|
||||
mico_rtos_set_semaphore( &spi_transfer_finished_semaphore );
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user