mirror of
https://github.com/oopuuu/zTC1.git
synced 2025-12-16 06:58:14 +08:00
修复mico-sdk错误
This commit is contained in:
@@ -1,198 +1,198 @@
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/**
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******************************************************************************
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* @file platform_config.h
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* @author William Xu
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* @version V1.0.0
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* @date 05-May-2014
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* @brief This file provides common configuration for current platform.
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******************************************************************************
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*
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* The MIT License
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* Copyright (c) 2014 MXCHIP Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is furnished
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* to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
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* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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******************************************************************************
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*/
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#ifndef __PLATFORM_CONFIG_H__
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#define __PLATFORM_CONFIG_H__
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#pragma once
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/******************************************************
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* Macros
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******************************************************/
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/******************************************************
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* Constants
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******************************************************/
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#define HARDWARE_REVISION "MKG55_1"
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#define DEFAULT_NAME "MiCOKit G55"
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#define MODEL "MiCOKit-G55"
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/* MICO RTOS tick rate in Hz */
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#define MICO_DEFAULT_TICK_RATE_HZ (1000)
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/************************************************************************
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* Uncomment to disable watchdog. For debugging only */
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//#define MICO_DISABLE_WATCHDOG
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/************************************************************************
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* Uncomment to disable standard IO, i.e. printf(), etc. */
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//#define MICO_DISABLE_STDIO
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/************************************************************************
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* Uncomment to disable MCU powersave API functions */
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#define MICO_DISABLE_MCU_POWERSAVE
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/************************************************************************
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* Uncomment to enable MCU real time clock */
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//#define MICO_ENABLE_MCU_RTC
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/************************************************************************
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* Restore default and start easylink after press down EasyLink button for 3 seconds. */
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#define RestoreDefault_TimeOut (3000)
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/************************************************************************
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* Restore default and start easylink after press down EasyLink button for 3 seconds. */
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#define MCU_CLOCK_HZ (120000000)
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/************************************************************************
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* How many bits are used in NVIC priority configuration */
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#define CORTEX_NVIC_PRIO_BITS (4)
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/************************************************************************
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* Enable write protection to write-disabled embedded flash sectors */
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//#define MCU_EBANLE_FLASH_PROTECT
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/** \name Resonator definitions
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* @{ */
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#define BOARD_FREQ_SLCK_XTAL (32768U)
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#define BOARD_FREQ_SLCK_BYPASS (32768U)
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#define BOARD_FREQ_MAINCK_XTAL 0 /* Not Mounted */
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#define BOARD_FREQ_MAINCK_BYPASS 0 /* Not Mounted */
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#define BOARD_MCK CHIP_FREQ_CPU_MAX
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/*TBD startup time needs to be adjusted according to measurements */
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#define BOARD_OSC_STARTUP_US 15625
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/* ===== System Clock (MCK) Source Options */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_RC */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_XTAL */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_BYPASS */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_8M_RC */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_16M_RC */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_24M_RC */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_XTAL */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_BYPASS */
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#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK
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/* ===== System Clock (MCK) Prescaler Options (Fmck = Fsys / (SYSCLK_PRES)) */
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#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_2 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_4 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_8 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_16 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_32 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_64 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_3 */
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// ===== PLL0 (A) Options (Fpll = (Fclk * PLL_mul) / PLL_div)
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// Use mul and div effective values here.
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#define CONFIG_PLL0_SOURCE PLL_SRC_SLCK_XTAL
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#define CONFIG_PLL0_MUL 3662
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#define CONFIG_PLL0_DIV 1
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// ===== Target frequency (System clock)
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// - External XTAL frequency: 32768Hz
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// - System clock source: SLCK XTAL
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// - System clock prescaler: 1 (divided by 1)
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// - PLLA source: SLCK_XTAL
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// - PLLA output: SLCK_XTAL * 3662 / 1
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// - System clock: SLCK_XTAL * 3662 / 1 / 1 = 120MHz
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/* CPU clock : 48MHz */
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#define CPU_CLOCK_HZ ( 120000000 )
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/******************************************************
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* EMW1062 Options
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******************************************************/
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/* Wi-Fi chip module */
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#define EMW1062
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/* GPIO pins are used to bootstrap Wi-Fi to SDIO or gSPI mode */
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//#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP
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/* Wi-Fi GPIO0 pin is used for out-of-band interrupt */
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#define MICO_WIFI_OOB_IRQ_GPIO_PIN ( 0 )
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/* Wi-Fi power pin is present */
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//#define MICO_USE_WIFI_POWER_PIN
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/* Wi-Fi reset pin is present */
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#define MICO_USE_WIFI_RESET_PIN
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/* Wi-Fi 32K pin is present */
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//#define MICO_USE_WIFI_32K_PIN
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/* USE SDIO 1bit mode */
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//#define SDIO_1_BIT
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/* Wi-Fi power pin is active high */
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//#define MICO_USE_WIFI_POWER_PIN_ACTIVE_HIGH
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//#define MICO_USE_BUILTIN_RF_DRIVER
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/******************************************************
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* Enumerations
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******************************************************/
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/******************************************************
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* Type Definitions
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******************************************************/
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/******************************************************
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* Structures
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******************************************************/
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/******************************************************
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* Global Variables
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******************************************************/
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/******************************************************
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* Function Declarations
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******************************************************/
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#ifdef __cplusplus
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} /*extern "C" */
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#endif
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#endif // __PLATFORM_CONFIG_H__
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/**
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******************************************************************************
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* @file platform_config.h
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* @author William Xu
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* @version V1.0.0
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* @date 05-May-2014
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* @brief This file provides common configuration for current platform.
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******************************************************************************
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*
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* The MIT License
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* Copyright (c) 2014 MXCHIP Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
|
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* in the Software without restriction, including without limitation the rights
|
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
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* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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******************************************************************************
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*/
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#ifndef __PLATFORM_CONFIG_H__
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#define __PLATFORM_CONFIG_H__
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#pragma once
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/******************************************************
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* Macros
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******************************************************/
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/******************************************************
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* Constants
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******************************************************/
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#define HARDWARE_REVISION "MKG55_1"
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#define DEFAULT_NAME "MiCOKit G55"
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#define MODEL "MiCOKit-G55"
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/* MICO RTOS tick rate in Hz */
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#define MICO_DEFAULT_TICK_RATE_HZ (1000)
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/************************************************************************
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* Uncomment to disable watchdog. For debugging only */
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//#define MICO_DISABLE_WATCHDOG
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/************************************************************************
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* Uncomment to disable standard IO, i.e. printf(), etc. */
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//#define MICO_DISABLE_STDIO
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/************************************************************************
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* Uncomment to disable MCU powersave API functions */
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#define MICO_DISABLE_MCU_POWERSAVE
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/************************************************************************
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* Uncomment to enable MCU real time clock */
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//#define MICO_ENABLE_MCU_RTC
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/************************************************************************
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* Restore default and start easylink after press down EasyLink button for 3 seconds. */
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#define RestoreDefault_TimeOut (3000)
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/************************************************************************
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* Restore default and start easylink after press down EasyLink button for 3 seconds. */
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#define MCU_CLOCK_HZ (120000000)
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/************************************************************************
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* How many bits are used in NVIC priority configuration */
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#define CORTEX_NVIC_PRIO_BITS (4)
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/************************************************************************
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* Enable write protection to write-disabled embedded flash sectors */
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//#define MCU_EBANLE_FLASH_PROTECT
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/** \name Resonator definitions
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* @{ */
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#define BOARD_FREQ_SLCK_XTAL (32768U)
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#define BOARD_FREQ_SLCK_BYPASS (32768U)
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#define BOARD_FREQ_MAINCK_XTAL 0 /* Not Mounted */
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#define BOARD_FREQ_MAINCK_BYPASS 0 /* Not Mounted */
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#define BOARD_MCK CHIP_FREQ_CPU_MAX
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/*TBD startup time needs to be adjusted according to measurements */
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#define BOARD_OSC_STARTUP_US 15625
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/* ===== System Clock (MCK) Source Options */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_RC */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_XTAL */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_BYPASS */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_8M_RC */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_16M_RC */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_24M_RC */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_XTAL */
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/* #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_BYPASS */
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#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK
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/* ===== System Clock (MCK) Prescaler Options (Fmck = Fsys / (SYSCLK_PRES)) */
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#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_2 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_4 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_8 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_16 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_32 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_64 */
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/* #define CONFIG_SYSCLK_PRES SYSCLK_PRES_3 */
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// ===== PLL0 (A) Options (Fpll = (Fclk * PLL_mul) / PLL_div)
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// Use mul and div effective values here.
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#define CONFIG_PLL0_SOURCE PLL_SRC_SLCK_XTAL
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#define CONFIG_PLL0_MUL 3662
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#define CONFIG_PLL0_DIV 1
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// ===== Target frequency (System clock)
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// - External XTAL frequency: 32768Hz
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// - System clock source: SLCK XTAL
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// - System clock prescaler: 1 (divided by 1)
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// - PLLA source: SLCK_XTAL
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// - PLLA output: SLCK_XTAL * 3662 / 1
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// - System clock: SLCK_XTAL * 3662 / 1 / 1 = 120MHz
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/* CPU clock : 48MHz */
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#define CPU_CLOCK_HZ ( 120000000 )
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/******************************************************
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* EMW1062 Options
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******************************************************/
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/* Wi-Fi chip module */
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#define EMW1062
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/* GPIO pins are used to bootstrap Wi-Fi to SDIO or gSPI mode */
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//#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP
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/* Wi-Fi GPIO0 pin is used for out-of-band interrupt */
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#define MICO_WIFI_OOB_IRQ_GPIO_PIN ( 0 )
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/* Wi-Fi power pin is present */
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//#define MICO_USE_WIFI_POWER_PIN
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/* Wi-Fi reset pin is present */
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#define MICO_USE_WIFI_RESET_PIN
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/* Wi-Fi 32K pin is present */
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//#define MICO_USE_WIFI_32K_PIN
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/* USE SDIO 1bit mode */
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//#define SDIO_1_BIT
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/* Wi-Fi power pin is active high */
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//#define MICO_USE_WIFI_POWER_PIN_ACTIVE_HIGH
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//#define MICO_USE_BUILTIN_RF_DRIVER
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/******************************************************
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||||
* Enumerations
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||||
******************************************************/
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||||
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||||
/******************************************************
|
||||
* Type Definitions
|
||||
******************************************************/
|
||||
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/******************************************************
|
||||
* Structures
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||||
******************************************************/
|
||||
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/******************************************************
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* Global Variables
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||||
******************************************************/
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||||
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/******************************************************
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* Function Declarations
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******************************************************/
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#ifdef __cplusplus
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} /*extern "C" */
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#endif
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#endif // __PLATFORM_CONFIG_H__
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