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修复mico-sdk错误

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This commit is contained in:
nhkefus
2025-03-11 15:54:45 +08:00
parent 3422912129
commit 2ccb892a1c
2152 changed files with 664341 additions and 702636 deletions
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0
mico-os/board/MK3239/flash_prog.elf Executable file → Normal file
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4
mico-os/board/MK3239/gen_standard_images.mk
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@@ -32,6 +32,8 @@ APP_BIN_FILE :=$(BIN_OUTPUT_FILE)
APP_OFFSET:= 0x8000
#ate firmware
ATE_BIN_FILE := $(MICO_OS_PATH)/resources/ate_firmware/3165/ate.bin
ATE_OFFSET:= 0x100000
#wifi firmware
@@ -45,4 +47,4 @@ gen_standard_images: build_done
$(QUIET)$(RM) $(MOC_ALL_BIN_OUTPUT_FILE)
$(PYTHON) $(GEN_COMMON_BIN_OUTPUT_FILE_SCRIPT) -o $(MOC_ALL_BIN_OUTPUT_FILE) -f $(BOOT_OFFSET) $(BOOT_BIN_FILE)
$(PYTHON) $(GEN_COMMON_BIN_OUTPUT_FILE_SCRIPT) -o $(MOC_ALL_BIN_OUTPUT_FILE) -f $(APP_OFFSET) $(APP_BIN_FILE)
$(PYTHON) $(GEN_COMMON_BIN_OUTPUT_FILE_SCRIPT) -o $(MOC_ALL_BIN_OUTPUT_FILE) -f $(ATE_OFFSET) $(ATE_BIN_FILE)

58
mico-os/board/MK3239/micoLinkerForIAR.icf
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@@ -1,30 +1,30 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08008000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08008000;
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
define symbol __ICFEDIT_size_heap__ = 0x34000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08008000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08008000;
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
define symbol __ICFEDIT_size_heap__ = 0x34000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };

1298
mico-os/board/MK3239/platform.c
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File diff suppressed because it is too large Load Diff

730
mico-os/board/MK3239/platform.h
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@@ -1,362 +1,368 @@
/**
******************************************************************************
* @file platform.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides all MICO Peripherals defined for current platform.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/*
EMW3239 platform pin definitions ...
+-------------------------------------------------------------------------+
| Enum ID |Pin | STM32| Peripheral | Board | Peripheral |
| | # | Port | Available | Connection | Alias |
|---------------+----+------+-------------+--------------+----------------|
| | 1 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_2 | 2 | B 2 | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 3 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_4 | 4 | B 15 | TIM1_CH3N | | |
| | | | TIM8_CH3N | | |
| | | | SPI2_MOSI | | |
| | | | SDIO_CK | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_5 | 5 | B 12 | SPI2_NSS | | |
| | | | SPI4_NSS | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_6 | 6 | B 13 | TIM1_CH1N | | |
| | | | GPIO | | |
| | | | SPI2_SCK | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_7 | 7 | B 14 | GPIO | | |
| | | | SDIO_D6 | | |
| | | | TIM1_CH2N | | |
| | | | SPI2_MISO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_8 | 8 | C 6 | TIM3_CH1 | STDIO_UART_TX| MICO_UART_1_TX |
| | | | TIM8_CH1 | | |
| | | | USART6_TX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_9 | 9 | A 15 | TIM2_CH1 |EasyLink_BUTTON| |
| | | | JTDI | | |
| | | | USART1_TX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 10 | VBAT | |
|---------------+----+------+-------------+--------------+----------------|
| | 11 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_12 | 12 | C 7 | TIM3_CH2 | STDIO_UART_RX| MICO_UART_1_RX |
| | | | TIM8_CH2 | | |
| | | | SPI2_SCK | | |
| | | | SDIO_D7 | | |
| | | | USART6_RX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 13 | NRST | | | MICRO_RST_N |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_14 | 14 | C 0 | WAKE_UP | | |
|---------------+----+------+-------------+--------------+----------------|
| | 15 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_16 | 16 | C 13 | - | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_SYS_LED | 17 | B 8 | TIM4_CH3 | | |
| | | | I2C2_SCL | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_18 | 18 | B 9 | TIM4_CH3 | | |
| | | | TIM10_CH1 | | |
| | | | I2C1_SCL | | |
| | | | SDIO_D4 | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_19 | 19 | B 10 | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 20 | GND | | | |
+---------------+----+--------------------+--------------+----------------+
| | 21 | GND | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_22 | 22 | B 3 | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_23 | 23 | A 15 | GPIO | | JTAG_TDI |
| | | | USART1_TX | | SPI1_SSN |
| | | | TIM2_CH1 | | |
| | | | TIM2_ETR | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_24 | 24 | B 4 | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_25 | 25 | A 14 | JTCK-SWCLK | SWCLK | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
|MICO_GPIO_26 | 26 | A 13 | JTMS-SWDIO | SWDIO | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
|MICO_GPIO_27 | 27 | B 3 | TIM1_ETR | | |
| | | | USART1_RX | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 28 | NC | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_29 | 29 | B 7 | GPIO | | MICO_UART_2_RX |
| | | | TIM4_CH2 | | |
| | | | USART1_RX | | |
| | | | I2C1_SDA | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_30 | 30 | B 6 | GPIO | | MICO_UART_2_TX |
| | | | TIM4_CH1 | | |
| | | | USART1_TX | | |
| | | | I2C1_SCL | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_31 | 31 | B 4 | GPIO | MICO_RF_LED | |
| | | | TIM3_CH1 | | |
| | | | SDIO_D0 | | |
+---------------+----+--------------------+--------------+----------------+
| | 32 | NC | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_33 | 33 | A 10 | TIM1_CH3 | MICO_SYS_LED | |
| | | | SPI5_MOSI | | |
| | | | USB_FS_ID | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_34 | 34 | A 12 | TIM1_ETR | | |
| | | | USART1_RTS | | |
| | | | USB_FS_DP | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_35 | 35 | A 11 | TIM1_CH4 | | |
| | | | SPI4_MISO | | |
| | | | USART1_CTS | | |
| | | | USART6_TX | | |
| | | | USB_FS_DM | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_36 | 36 | A 5 | TIM2_CH1 | BOOT_SEL | |
| | | | TIM2_ETR | | |
| | | | TIM8_CH1N | | |
| | | | SPI1_SCK | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_37 | 37 | B 0 | TIM1_CH2N | MFG_SEL | |
| | | | TIM3_CH3 | | |
| | | | TIM8_CH2N | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_38 | 38 | A 4 | USART2_CK | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 39 | VDD | | | |
+---------------+----+--------------------+--------------+----------------+
| | 40 | VDD | | | |
+---------------+----+--------------------+--------------+----------------+
| | 41 | ANT | | | |
+---------------+----+--------------------+--------------+----------------+
*/
typedef enum
{
FLASH_PIN_QSPI_CS,
FLASH_PIN_QSPI_CLK,
FLASH_PIN_QSPI_D0,
FLASH_PIN_QSPI_D1,
FLASH_PIN_QSPI_D2,
FLASH_PIN_QSPI_D3,
MICO_GPIO_2,
MICO_GPIO_4,
MICO_GPIO_5,
MICO_GPIO_6,
MICO_GPIO_7,
MICO_GPIO_8,
MICO_GPIO_9,
MICO_GPIO_12,
MICO_GPIO_14,
MICO_GPIO_16,
MICO_GPIO_17,
MICO_GPIO_18,
MICO_GPIO_19,
MICO_GPIO_27,
MICO_GPIO_29,
MICO_GPIO_30,
MICO_GPIO_31,
MICO_GPIO_33,
MICO_GPIO_34,
MICO_GPIO_35,
MICO_GPIO_36,
MICO_GPIO_37,
MICO_GPIO_38,
MICO_GPIO_MAX, /* Denotes the total number of GPIO port aliases. Not a valid GPIO alias */
MICO_GPIO_NONE,
} mico_gpio_t;
typedef enum
{
MICO_SPI_1,
MICO_SPI_MAX, /* Denotes the total number of SPI port aliases. Not a valid SPI alias */
MICO_SPI_NONE,
} mico_spi_t;
typedef enum
{
MICO_QSPI_1,
MICO_QSPI_MAX,/* Denotes the total number of QSPI port aliases. Not a valid QSPI alias */
MICO_QSPI_NONE,
}mico_qspi_t;
typedef enum
{
MICO_I2C_1,
MICO_I2C_MAX, /* Denotes the total number of I2C port aliases. Not a valid I2C alias */
MICO_I2C_NONE,
} mico_i2c_t;
typedef enum
{
MICO_PWM_MAX, /* Denotes the total number of PWM port aliases. Not a valid PWM alias */
MICO_PWM_NONE,
} mico_pwm_t;
typedef enum
{
MICO_ADC_1,
MICO_ADC_2,
MICO_ADC_MAX, /* Denotes the total number of ADC port aliases. Not a valid ADC alias */
MICO_ADC_NONE,
} mico_adc_t;
typedef enum
{
MICO_UART_1,
MICO_UART_2,
MICO_UART_MAX, /* Denotes the total number of UART port aliases. Not a valid UART alias */
MICO_UART_NONE,
} mico_uart_t;
typedef enum
{
MICO_FLASH_EMBEDDED,
MICO_FLASH_QSPI,
MICO_FLASH_MAX,
MICO_FLASH_NONE,
} mico_flash_t;
typedef enum
{
MICO_PARTITION_FILESYS,
MICO_PARTITION_USER_MAX
} mico_user_partition_t;
#ifdef BOOTLOADER
#define STDIO_UART (MICO_UART_2)
#define STDIO_UART_BAUDRATE (921600)
#else
#define STDIO_UART (MICO_UART_1)
#define STDIO_UART_BAUDRATE (115200)
#endif
#define UART_FOR_APP (MICO_UART_2)
#define MFG_TEST (MICO_UART_2)
#define CLI_UART (MICO_UART_1)
/* Components connected to external I/Os*/
#define USE_QUAD_SPI_FLASH
//#define USE_QUAD_SPI_DMA
#define BOOT_SEL (MICO_GPIO_36)
#define MFG_SEL (MICO_GPIO_37)
#define EasyLink_BUTTON (MICO_GPIO_9)
#define MICO_SYS_LED (MICO_GPIO_33)
#define MICO_RF_LED (MICO_GPIO_31)
/* Arduino extention connector */
#define Arduino_RXD (MICO_GPIO_29)
#define Arduino_TXD (MICO_GPIO_30)
#define Arduino_D2 (MICO_GPIO_NONE)
#define Arduino_D3 (MICO_GPIO_NONE)
#define Arduino_D4 (MICO_GPIO_19)
#define Arduino_D5 (MICO_GPIO_16)
#define Arduino_D6 (MICO_GPIO_14)
#define Arduino_D7 (MICO_GPIO_NONE)
#define Arduino_D8 (MICO_GPIO_2)
#define Arduino_D9 (MICO_GPIO_27)
#define Arduino_CS (MICO_GPIO_5)
#define Arduino_SI (MICO_GPIO_4)
#define Arduino_SO (MICO_GPIO_7)
#define Arduino_SCK (MICO_GPIO_6)
#define Arduino_SDA (MICO_GPIO_18)
#define Arduino_SCL (MICO_GPIO_17)
#define Arduino_A0 (MICO_ADC_NONE)
#define Arduino_A1 (MICO_ADC_NONE)
#define Arduino_A2 (MICO_ADC_1)
#define Arduino_A3 (MICO_ADC_2)
#define Arduino_A4 (MICO_ADC_NONE)
#define Arduino_A5 (MICO_ADC_NONE)
#define Arduino_I2C (MICO_I2C_1)
#define Arduino_SPI (MICO_SPI_1)
#define Arduino_UART (MICO_UART_2)
#ifdef USE_MiCOKit_EXT
#define MICO_I2C_CP (Arduino_I2C)
#include "micokit_ext_def.h"
#else
#define MICO_I2C_CP (MICO_I2C_NONE)
#endif //USE_MiCOKit_EXT
#ifdef __cplusplus
} /*extern "C" */
#endif
/**
******************************************************************************
* @file platform.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides all MICO Peripherals defined for current platform.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
/******************************************************
* Enumerations
******************************************************/
/*
EMW3239 platform pin definitions ...
+-------------------------------------------------------------------------+
| Enum ID |Pin | STM32| Peripheral | Board | Peripheral |
| | # | Port | Available | Connection | Alias |
|---------------+----+------+-------------+--------------+----------------|
| | 1 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_2 | 2 | B 2 | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 3 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_4 | 4 | B 15 | TIM1_CH3N | | |
| | | | TIM8_CH3N | | |
| | | | SPI2_MOSI | | |
| | | | SDIO_CK | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_5 | 5 | B 12 | SPI2_NSS | | |
| | | | SPI4_NSS | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_6 | 6 | B 13 | TIM1_CH1N | | |
| | | | GPIO | | |
| | | | SPI2_SCK | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_7 | 7 | B 14 | GPIO | | |
| | | | SDIO_D6 | | |
| | | | TIM1_CH2N | | |
| | | | SPI2_MISO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_8 | 8 | C 6 | TIM3_CH1 | STDIO_UART_TX| MICO_UART_1_TX |
| | | | TIM8_CH1 | | |
| | | | USART6_TX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_9 | 9 | A 15 | TIM2_CH1 |EasyLink_BUTTON| |
| | | | JTDI | | |
| | | | USART1_TX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 10 | VBAT | |
|---------------+----+------+-------------+--------------+----------------|
| | 11 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_12 | 12 | C 7 | TIM3_CH2 | STDIO_UART_RX| MICO_UART_1_RX |
| | | | TIM8_CH2 | | |
| | | | SPI2_SCK | | |
| | | | SDIO_D7 | | |
| | | | USART6_RX | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| | 13 | NRST | | | MICRO_RST_N |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_14 | 14 | C 0 | WAKE_UP | | |
|---------------+----+------+-------------+--------------+----------------|
| | 15 | NC | | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_16 | 16 | C 13 | - | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_SYS_LED | 17 | B 8 | TIM4_CH3 | | |
| | | | I2C2_SCL | | |
| | | | GPIO | | |
|---------------+----+------+-------------+--------------+----------------|
| MICO_GPIO_18 | 18 | B 9 | TIM4_CH3 | | |
| | | | TIM10_CH1 | | |
| | | | I2C1_SCL | | |
| | | | SDIO_D4 | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_19 | 19 | B 10 | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 20 | GND | | | |
+---------------+----+--------------------+--------------+----------------+
| | 21 | GND | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_22 | 22 | B 3 | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_23 | 23 | A 15 | GPIO | | JTAG_TDI |
| | | | USART1_TX | | SPI1_SSN |
| | | | TIM2_CH1 | | |
| | | | TIM2_ETR | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_24 | 24 | B 4 | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_25 | 25 | A 14 | JTCK-SWCLK | SWCLK | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
|MICO_GPIO_26 | 26 | A 13 | JTMS-SWDIO | SWDIO | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
|MICO_GPIO_27 | 27 | B 3 | TIM1_ETR | | |
| | | | USART1_RX | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 28 | NC | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_29 | 29 | B 7 | GPIO | | MICO_UART_2_RX |
| | | | TIM4_CH2 | | |
| | | | USART1_RX | | |
| | | | I2C1_SDA | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_30 | 30 | B 6 | GPIO | | MICO_UART_2_TX |
| | | | TIM4_CH1 | | |
| | | | USART1_TX | | |
| | | | I2C1_SCL | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_31 | 31 | B 4 | GPIO | MICO_RF_LED | |
| | | | TIM3_CH1 | | |
| | | | SDIO_D0 | | |
+---------------+----+--------------------+--------------+----------------+
| | 32 | NC | | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_33 | 33 | A 10 | TIM1_CH3 | MICO_SYS_LED | |
| | | | SPI5_MOSI | | |
| | | | USB_FS_ID | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_34 | 34 | A 12 | TIM1_ETR | | |
| | | | USART1_RTS | | |
| | | | USB_FS_DP | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_35 | 35 | A 11 | TIM1_CH4 | | |
| | | | SPI4_MISO | | |
| | | | USART1_CTS | | |
| | | | USART6_TX | | |
| | | | USB_FS_DM | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_36 | 36 | A 5 | TIM2_CH1 | BOOT_SEL | |
| | | | TIM2_ETR | | |
| | | | TIM8_CH1N | | |
| | | | SPI1_SCK | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_37 | 37 | B 0 | TIM1_CH2N | MFG_SEL | |
| | | | TIM3_CH3 | | |
| | | | TIM8_CH2N | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| MICO_GPIO_38 | 38 | A 4 | USART2_CK | | |
| | | | GPIO | | |
+---------------+----+--------------------+--------------+----------------+
| | 39 | VDD | | | |
+---------------+----+--------------------+--------------+----------------+
| | 40 | VDD | | | |
+---------------+----+--------------------+--------------+----------------+
| | 41 | ANT | | | |
+---------------+----+--------------------+--------------+----------------+
*/
typedef enum
{
FLASH_PIN_QSPI_CS,
FLASH_PIN_QSPI_CLK,
FLASH_PIN_QSPI_D0,
FLASH_PIN_QSPI_D1,
FLASH_PIN_QSPI_D2,
FLASH_PIN_QSPI_D3,
MICO_GPIO_2,
MICO_GPIO_4,
MICO_GPIO_5,
MICO_GPIO_6,
MICO_GPIO_7,
MICO_GPIO_8,
MICO_GPIO_9,
MICO_GPIO_12,
MICO_GPIO_14,
MICO_GPIO_16,
MICO_GPIO_17,
MICO_GPIO_18,
MICO_GPIO_19,
MICO_GPIO_27,
MICO_GPIO_29,
MICO_GPIO_30,
MICO_GPIO_31,
MICO_GPIO_33,
MICO_GPIO_34,
MICO_GPIO_35,
MICO_GPIO_36,
MICO_GPIO_37,
MICO_GPIO_38,
MICO_GPIO_MAX, /* Denotes the total number of GPIO port aliases. Not a valid GPIO alias */
MICO_GPIO_NONE,
} mico_gpio_t;
typedef enum
{
MICO_SPI_1,
MICO_SPI_MAX, /* Denotes the total number of SPI port aliases. Not a valid SPI alias */
MICO_SPI_NONE,
} mico_spi_t;
typedef enum
{
MICO_QSPI_1,
MICO_QSPI_MAX,/* Denotes the total number of QSPI port aliases. Not a valid QSPI alias */
MICO_QSPI_NONE,
}mico_qspi_t;
typedef enum
{
MICO_I2C_1,
MICO_I2C_MAX, /* Denotes the total number of I2C port aliases. Not a valid I2C alias */
MICO_I2C_NONE,
} mico_i2c_t;
typedef enum
{
MICO_IIS_MAX, /* Denotes the total number of IIS port aliases. Not a valid IIS alias */
MICO_IIS_NONE,
} mico_iis_t;
typedef enum
{
MICO_PWM_MAX, /* Denotes the total number of PWM port aliases. Not a valid PWM alias */
MICO_PWM_NONE,
} mico_pwm_t;
typedef enum
{
MICO_ADC_1,
MICO_ADC_2,
MICO_ADC_MAX, /* Denotes the total number of ADC port aliases. Not a valid ADC alias */
MICO_ADC_NONE,
} mico_adc_t;
typedef enum
{
MICO_UART_1,
MICO_UART_2,
MICO_UART_MAX, /* Denotes the total number of UART port aliases. Not a valid UART alias */
MICO_UART_NONE,
} mico_uart_t;
typedef enum
{
MICO_FLASH_EMBEDDED,
MICO_FLASH_QSPI,
MICO_FLASH_MAX,
MICO_FLASH_NONE,
} mico_flash_t;
typedef enum
{
MICO_PARTITION_FILESYS,
MICO_PARTITION_USER_MAX
} mico_user_partition_t;
#ifdef BOOTLOADER
#define STDIO_UART (MICO_UART_2)
#define STDIO_UART_BAUDRATE (921600)
#else
#define STDIO_UART (MICO_UART_1)
#define STDIO_UART_BAUDRATE (115200)
#endif
#define UART_FOR_APP (MICO_UART_2)
#define MFG_TEST (MICO_UART_2)
#define CLI_UART (MICO_UART_1)
/* Components connected to external I/Os*/
#define USE_QUAD_SPI_FLASH
//#define USE_QUAD_SPI_DMA
#define BOOT_SEL (MICO_GPIO_36)
#define MFG_SEL (MICO_GPIO_37)
#define EasyLink_BUTTON (MICO_GPIO_9)
#define MICO_SYS_LED (MICO_GPIO_33)
#define MICO_RF_LED (MICO_GPIO_31)
/* Arduino extention connector */
#define Arduino_RXD (MICO_GPIO_29)
#define Arduino_TXD (MICO_GPIO_30)
#define Arduino_D2 (MICO_GPIO_NONE)
#define Arduino_D3 (MICO_GPIO_NONE)
#define Arduino_D4 (MICO_GPIO_19)
#define Arduino_D5 (MICO_GPIO_16)
#define Arduino_D6 (MICO_GPIO_14)
#define Arduino_D7 (MICO_GPIO_NONE)
#define Arduino_D8 (MICO_GPIO_2)
#define Arduino_D9 (MICO_GPIO_27)
#define Arduino_CS (MICO_GPIO_5)
#define Arduino_SI (MICO_GPIO_4)
#define Arduino_SO (MICO_GPIO_7)
#define Arduino_SCK (MICO_GPIO_6)
#define Arduino_SDA (MICO_GPIO_18)
#define Arduino_SCL (MICO_GPIO_17)
#define Arduino_A0 (MICO_ADC_NONE)
#define Arduino_A1 (MICO_ADC_NONE)
#define Arduino_A2 (MICO_ADC_1)
#define Arduino_A3 (MICO_ADC_2)
#define Arduino_A4 (MICO_ADC_NONE)
#define Arduino_A5 (MICO_ADC_NONE)
#define Arduino_I2C (MICO_I2C_1)
#define Arduino_SPI (MICO_SPI_1)
#define Arduino_UART (MICO_UART_2)
#ifdef USE_MiCOKit_EXT
#define MICO_I2C_CP (Arduino_I2C)
#include "micokit_ext_def.h"
#else
#define MICO_I2C_CP (MICO_I2C_NONE)
#endif //USE_MiCOKit_EXT
#ifdef __cplusplus
} /*extern "C" */
#endif

292
mico-os/board/MK3239/platform_config.h
View File

@@ -1,146 +1,146 @@
/**
******************************************************************************
* @file platform_config.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides common configuration for current platform.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
#define HARDWARE_REVISION "1.0"
#define DEFAULT_NAME "MiCOKit-3239"
#define MODEL "EMW3239_1"
/* MICO RTOS tick rate in Hz */
#define MICO_DEFAULT_TICK_RATE_HZ (1000)
/************************************************************************
* Uncomment to disable watchdog. For debugging only */
//#define MICO_DISABLE_WATCHDOG
/************************************************************************
* Uncomment to disable standard IO, i.e. printf(), etc. */
//#define MICO_DISABLE_STDIO
/************************************************************************
* Uncomment to disable MCU powersave API functions */
//#define MICO_DISABLE_MCU_POWERSAVE
/************************************************************************
* Uncomment to enable MCU real time clock */
#define MICO_ENABLE_MCU_RTC
/************************************************************************
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
#define RestoreDefault_TimeOut (3000)
/************************************************************************
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
#define MCU_CLOCK_HZ (96000000)
/************************************************************************
* How many bits are used in NVIC priority configuration */
#define CORTEX_NVIC_PRIO_BITS (4)
/************************************************************************
* Enable write protection to write-disabled embedded flash sectors */
//#define MCU_ENABLE_FLASH_PROTECT
/************************************************************************
* This platform has bluetooth function, use part of core data as BT pairing table */
#define MICO_BLUETOOTH_ENABLE
#define HSE_SOURCE RCC_HSE_ON /* Use external crystal */
#define AHB_CLOCK_DIVIDER RCC_SYSCLK_Div1 /* AHB clock = System clock */
#define APB1_CLOCK_DIVIDER RCC_HCLK_Div2 /* APB1 clock = AHB clock / 2 */
#define APB2_CLOCK_DIVIDER RCC_HCLK_Div1 /* APB2 clock = AHB clock / 1 */
#define PLL_SOURCE RCC_PLLSource_HSE /* PLL source = external crystal */
#define PLL_M_CONSTANT 13 /* PLLM = 16 */
#define PLL_N_CONSTANT 192 /* PLLN = 400 */
#define PLL_P_CONSTANT 4 /* PLLP = 4 */
#define PPL_Q_CONSTANT 8 /* PLLQ = 7 */
#define PPL_R_CONSTANT 2 /* PLLR = 2 */
#define SYSTEM_CLOCK_SOURCE RCC_SYSCLKSource_PLLCLK /* System clock source = PLL clock */
#define SYSTICK_CLOCK_SOURCE SysTick_CLKSource_HCLK /* SysTick clock source = AHB clock */
#define INT_FLASH_WAIT_STATE FLASH_Latency_3 /* Internal flash wait state = 3 cycles */
#define PWR_WakeUp_Pin PWR_WakeUp_Pin2 /* PWR_Wake_Up_Pin */
/******************************************************
* EMW1062 Options
******************************************************/
/* GPIO pins are used to bootstrap Wi-Fi to SDIO or gSPI mode */
#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP_1
#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP_1_HIGH_FOR_SDIO
/* Wi-Fi GPIO0 pin is used for out-of-band interrupt */
#define MICO_WIFI_OOB_IRQ_GPIO_PIN ( 0 )
/* Wi-Fi power pin is present */
#define MICO_USE_WIFI_POWER_PIN
/* Wi-Fi reset pin is present */
//#define MICO_USE_WIFI_RESET_PIN
/* Wi-Fi 32K pin is present */
#define MICO_USE_WIFI_32K_PIN
/* USE SDIO 1bit mode */
//#define SDIO_1_BIT
/* Wi-Fi power pin is active high */
#define MICO_USE_WIFI_POWER_PIN_ACTIVE_HIGH
/* WLAN Powersave Clock Source
* The WLAN sleep clock can be driven from one of two sources:
* 1. MCO (MCU Clock Output) - default
* 2. WLAN 32K internal oscillator (30% inaccuracy)
*/
//#define MICO_USE_WIFI_32K_CLOCK_MCO
//#define MICO_USE_BUILTIN_RF_DRIVER
#ifdef __cplusplus
} /*extern "C" */
#endif
/**
******************************************************************************
* @file platform_config.h
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief This file provides common configuration for current platform.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Macros
******************************************************/
/******************************************************
* Constants
******************************************************/
#define HARDWARE_REVISION "1.0"
#define DEFAULT_NAME "MiCOKit-3239"
#define MODEL "EMW3239_1"
/* MICO RTOS tick rate in Hz */
#define MICO_DEFAULT_TICK_RATE_HZ (1000)
/************************************************************************
* Uncomment to disable watchdog. For debugging only */
//#define MICO_DISABLE_WATCHDOG
/************************************************************************
* Uncomment to disable standard IO, i.e. printf(), etc. */
//#define MICO_DISABLE_STDIO
/************************************************************************
* Uncomment to disable MCU powersave API functions */
//#define MICO_DISABLE_MCU_POWERSAVE
/************************************************************************
* Uncomment to enable MCU real time clock */
#define MICO_ENABLE_MCU_RTC
/************************************************************************
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
#define RestoreDefault_TimeOut (3000)
/************************************************************************
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
#define MCU_CLOCK_HZ (96000000)
/************************************************************************
* How many bits are used in NVIC priority configuration */
#define CORTEX_NVIC_PRIO_BITS (4)
/************************************************************************
* Enable write protection to write-disabled embedded flash sectors */
//#define MCU_ENABLE_FLASH_PROTECT
/************************************************************************
* This platform has bluetooth function, use part of core data as BT pairing table */
#define MICO_BLUETOOTH_ENABLE
#define HSE_SOURCE RCC_HSE_ON /* Use external crystal */
#define AHB_CLOCK_DIVIDER RCC_SYSCLK_Div1 /* AHB clock = System clock */
#define APB1_CLOCK_DIVIDER RCC_HCLK_Div2 /* APB1 clock = AHB clock / 2 */
#define APB2_CLOCK_DIVIDER RCC_HCLK_Div1 /* APB2 clock = AHB clock / 1 */
#define PLL_SOURCE RCC_PLLSource_HSE /* PLL source = external crystal */
#define PLL_M_CONSTANT 13 /* PLLM = 16 */
#define PLL_N_CONSTANT 192 /* PLLN = 400 */
#define PLL_P_CONSTANT 4 /* PLLP = 4 */
#define PPL_Q_CONSTANT 8 /* PLLQ = 7 */
#define PPL_R_CONSTANT 2 /* PLLR = 2 */
#define SYSTEM_CLOCK_SOURCE RCC_SYSCLKSource_PLLCLK /* System clock source = PLL clock */
#define SYSTICK_CLOCK_SOURCE SysTick_CLKSource_HCLK /* SysTick clock source = AHB clock */
#define INT_FLASH_WAIT_STATE FLASH_Latency_3 /* Internal flash wait state = 3 cycles */
#define PWR_WakeUp_Pin PWR_WakeUp_Pin2 /* PWR_Wake_Up_Pin */
/******************************************************
* EMW1062 Options
******************************************************/
/* GPIO pins are used to bootstrap Wi-Fi to SDIO or gSPI mode */
#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP_1
#define MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP_1_HIGH_FOR_SDIO
/* Wi-Fi GPIO0 pin is used for out-of-band interrupt */
#define MICO_WIFI_OOB_IRQ_GPIO_PIN ( 0 )
/* Wi-Fi power pin is present */
#define MICO_USE_WIFI_POWER_PIN
/* Wi-Fi reset pin is present */
//#define MICO_USE_WIFI_RESET_PIN
/* Wi-Fi 32K pin is present */
#define MICO_USE_WIFI_32K_PIN
/* USE SDIO 1bit mode */
//#define SDIO_1_BIT
/* Wi-Fi power pin is active high */
#define MICO_USE_WIFI_POWER_PIN_ACTIVE_HIGH
/* WLAN Powersave Clock Source
* The WLAN sleep clock can be driven from one of two sources:
* 1. MCO (MCU Clock Output) - default
* 2. WLAN 32K internal oscillator (30% inaccuracy)
*/
//#define MICO_USE_WIFI_32K_CLOCK_MCO
//#define MICO_USE_BUILTIN_RF_DRIVER
#ifdef __cplusplus
} /*extern "C" */
#endif

86
mico-os/board/MK3239/wifi_nvram.c
View File

@@ -1,43 +1,43 @@
/**
******************************************************************************
* @file wifi_nvram.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief NVRAM read functions called by Wi-Fi driver.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#include <stdint.h>
#include <wifi_nvram_image.h>
uint32_t host_platform_memory_wifi_nvram_size( void )
{
return sizeof(wifi_nvram_image);
}
uint8_t* host_platform_read_wifi_nvram_image( int offset )
{
return (uint8_t*) &wifi_nvram_image[offset];
}
/**
******************************************************************************
* @file wifi_nvram.c
* @author William Xu
* @version V1.0.0
* @date 05-May-2014
* @brief NVRAM read functions called by Wi-Fi driver.
******************************************************************************
*
* The MIT License
* Copyright (c) 2014 MXCHIP Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
******************************************************************************
*/
#include <stdint.h>
#include <wifi_nvram_image.h>
uint32_t host_platform_memory_wifi_nvram_size( void )
{
return sizeof(wifi_nvram_image);
}
uint8_t* host_platform_read_wifi_nvram_image( int offset )
{
return (uint8_t*) &wifi_nvram_image[offset];
}

216
mico-os/board/MK3239/wifi_nvram_image.h
View File

@@ -1,108 +1,108 @@
/**
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
*
*/
/** @file
* NVRAM variables which define BCM43438A1 Parameters for the
* MXCHIP EMW3239 module.
*
*/
#ifndef INCLUDED_NVRAM_IMAGE_H_
#define INCLUDED_NVRAM_IMAGE_H_
#include <string.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define NVRAM_GENERATED_MAC_ADDRESS "macaddr=C8:93:46:00:00:01"
/**
* Character array of NVRAM image
*/
static const char wifi_nvram_image[] =
// # The following parameter values are just placeholders, need to be updated.
"manfid=0x2d0" "\x00"
"prodid=0x0726" "\x00"
"vendid=0x14e4" "\x00"
"devid=0x43e2" "\x00"
"boardtype=0x0726" "\x00"
"boardrev=0x1101" "\x00"
"boardnum=22" "\x00"
"xtalfreq=26000" "\x00"
"sromrev=11" "\x00"
"boardflags=0x00404201" "\x00"
"boardflags3=0x04000000" "\x00" //0x08000000 /* Force external lpo */
NVRAM_GENERATED_MAC_ADDRESS "\x00"
"nocrc=1" "\x00"
"ag0=255" "\x00"
"aa2g=1" "\x00"
"ccode=ALL" "\x00"
//#Antenna diversity
"swdiv_en=1" "\x00"
"swdiv_gpio=2" "\x00"
"pa0itssit=0x20" "\x00"
"extpagain2g=0" "\x00"
//#PA parameters for 2.4GHz, measured at CHIP OUTPUT
"pa2ga0=-194,5941,-695" "\x00"
"AvVmid_c0=0x0,0xc8" "\x00"
"cckpwroffset0=5" "\x00"
//# PPR params
"maxp2ga0=74" "\x00"
"txpwrbckof=6" "\x00"
"cckbw202gpo=0" "\x00" //0x1111
"legofdmbw202gpo=0x44444444" "\x00" //0x66666666
"mcsbw202gpo=0x88888888" "\x00" //0x88888888
"propbw202gpo=0xdd" "\x00"
//# OFDM IIR :
"ofdmdigfilttype=18" "\x00"
"ofdmdigfilttypebe=18" "\x00"
//# PAPD mode:
"papdmode=1" "\x00"
"papdvalidtest=1" "\x00"
"pacalidx2g=32" "\x00"
"papdepsoffset=-36" "\x00"
"papdendidx=61" "\x00"
//# LTECX flags
// "ltecxmux=1" "\x00"
//"ltecxpadnum=0x02030401" "\x00"
// "ltecxfnsel=0x3003" "\x00"
// "ltecxgcigpio=0x3012" "\x00"
//#il0macaddr=00:90:4c:c5:12:38
"wl0id=0x431b" "\x00"
"deadman_to=0xffffffff" "\x00"
//#OOB parameters
"hostwake=0x40" "\x00"
"hostrdy=0x41" "\x00"
//# muxenab: 0x1 for UART enable, 0x2 for GPIOs, 0x8 for JTAG, 0x10 for HW OOB
"muxenab=0x11" "\x00"
//# CLDO PWM voltage settings - 0x4 - 1.1 volt
//#cldo_pwm=0x4 "\x00"
//#VCO freq 326.4MHz
"spurconfig=0x3" "\x00"
//#CE 1.8.1
//"edonthd=-70" "\x00"
//"edoffthd=-76" "\x00"
"\x00\x00";
#ifdef __cplusplus
} /* extern "C" */
#endif
#else /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
#error Wi-Fi NVRAM image included twice
#endif /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
/**
* UNPUBLISHED PROPRIETARY SOURCE CODE
* Copyright (c) 2016 MXCHIP Inc.
*
* The contents of this file may not be disclosed to third parties, copied or
* duplicated in any form, in whole or in part, without the prior written
* permission of MXCHIP Corporation.
*
*/
/** @file
* NVRAM variables which define BCM43438A1 Parameters for the
* MXCHIP EMW3239 module.
*
*/
#ifndef INCLUDED_NVRAM_IMAGE_H_
#define INCLUDED_NVRAM_IMAGE_H_
#include <string.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define NVRAM_GENERATED_MAC_ADDRESS "macaddr=C8:93:46:00:00:01"
/**
* Character array of NVRAM image
*/
static const char wifi_nvram_image[] =
// # The following parameter values are just placeholders, need to be updated.
"manfid=0x2d0" "\x00"
"prodid=0x0726" "\x00"
"vendid=0x14e4" "\x00"
"devid=0x43e2" "\x00"
"boardtype=0x0726" "\x00"
"boardrev=0x1101" "\x00"
"boardnum=22" "\x00"
"xtalfreq=26000" "\x00"
"sromrev=11" "\x00"
"boardflags=0x00404201" "\x00"
"boardflags3=0x04000000" "\x00" //0x08000000 /* Force external lpo */
NVRAM_GENERATED_MAC_ADDRESS "\x00"
"nocrc=1" "\x00"
"ag0=255" "\x00"
"aa2g=1" "\x00"
"ccode=ALL" "\x00"
//#Antenna diversity
"swdiv_en=1" "\x00"
"swdiv_gpio=2" "\x00"
"pa0itssit=0x20" "\x00"
"extpagain2g=0" "\x00"
//#PA parameters for 2.4GHz, measured at CHIP OUTPUT
"pa2ga0=-194,5941,-695" "\x00"
"AvVmid_c0=0x0,0xc8" "\x00"
"cckpwroffset0=5" "\x00"
//# PPR params
"maxp2ga0=74" "\x00"
"txpwrbckof=6" "\x00"
"cckbw202gpo=0" "\x00" //0x1111
"legofdmbw202gpo=0x44444444" "\x00" //0x66666666
"mcsbw202gpo=0x88888888" "\x00" //0x88888888
"propbw202gpo=0xdd" "\x00"
//# OFDM IIR :
"ofdmdigfilttype=18" "\x00"
"ofdmdigfilttypebe=18" "\x00"
//# PAPD mode:
"papdmode=1" "\x00"
"papdvalidtest=1" "\x00"
"pacalidx2g=32" "\x00"
"papdepsoffset=-36" "\x00"
"papdendidx=61" "\x00"
//# LTECX flags
// "ltecxmux=1" "\x00"
//"ltecxpadnum=0x02030401" "\x00"
// "ltecxfnsel=0x3003" "\x00"
// "ltecxgcigpio=0x3012" "\x00"
//#il0macaddr=00:90:4c:c5:12:38
"wl0id=0x431b" "\x00"
"deadman_to=0xffffffff" "\x00"
//#OOB parameters
"hostwake=0x40" "\x00"
"hostrdy=0x41" "\x00"
//# muxenab: 0x1 for UART enable, 0x2 for GPIOs, 0x8 for JTAG, 0x10 for HW OOB
"muxenab=0x11" "\x00"
//# CLDO PWM voltage settings - 0x4 - 1.1 volt
//#cldo_pwm=0x4 "\x00"
//#VCO freq 326.4MHz
"spurconfig=0x3" "\x00"
//#CE 1.8.1
//"edonthd=-70" "\x00"
//"edoffthd=-76" "\x00"
"\x00\x00";
#ifdef __cplusplus
} /* extern "C" */
#endif
#else /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
#error Wi-Fi NVRAM image included twice
#endif /* ifndef INCLUDED_NVRAM_IMAGE_H_ */