mirror of
https://github.com/oopuuu/zTC1.git
synced 2025-12-14 22:18:14 +08:00
修复mico-sdk错误
This commit is contained in:
nhkefus
@@ -1,188 +1,188 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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//define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
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define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000;
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define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF;
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define symbol __ICFEDIT_region_BD_RAM_start__ = 0x10000000;
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define symbol __ICFEDIT_region_BD_RAM_end__ = 0x10005FFF;
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define symbol __ICFEDIT_region_FWLOADER_start__ = 0x10006000;
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define symbol __ICFEDIT_region_FWLOADER_end__ = 0x1000DFFF;
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define symbol __ICFEDIT_region_IMG2_TEMP_start__ = 0x1000E000;
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define symbol __ICFEDIT_region_IMG2_TEMP_end__ = 0x1006FFFF;
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/*-Sizes-*/
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/*define symbol __ICFEDIT_size_cstack__ = 0x400;*/
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/*define symbol __ICFEDIT_size_heap__ = 0x800;*/
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__];
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define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__];
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define region FWLOADER_region = mem:[from __ICFEDIT_region_FWLOADER_start__ to __ICFEDIT_region_FWLOADER_end__];
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define region IMG2_TEMP_region = mem:[from __ICFEDIT_region_IMG2_TEMP_start__ to __ICFEDIT_region_IMG2_TEMP_end__];
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/*define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };*/
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/*define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };*/
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//initialize by copy { readwrite };
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//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
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//do not initialize { section * };
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//place at address mem:__ICFEDIT_intvec_start__ { readonly section .vectors_table };
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/*place in RAM_region { readwrite, block CSTACK, block HEAP };*/
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//place in TCM_region { readwrite };
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/****************************************
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* ROM Section config *
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****************************************/
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keep { section .rom };
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place at start of ROM_region { readonly, section .rom };
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/****************************************
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* BD RAM Section config *
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****************************************/
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keep { section .ram_dedecated_vector_table* };
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define block .vector_table with fixed order{section .ram_dedecated_vector_table*};
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keep { section .ram_user_define_irq_table* };
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define block .user_vector_table with fixed order{section .ram_user_define_irq_table*};
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keep { section .ram_user_define_data_table* };
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define block .user_data_table with fixed order{section .ram_user_define_data_table*};
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define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o,
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section .hal.ram.bss* object hal_pinmux.o,
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section .hal.ram.bss* object diag.o,
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section .hal.ram.bss* object rtl8195a_ssi_rom.o,
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section .hal.ram.bss* object rtl8195a_gpio.o,
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section .hal.ram.bss*,
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section .timer2_7_vector_table.data*,
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section .infra.ram.bss*,
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section .mon.ram.bss*,
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section .wlan_ram_map* object rom_wlan_ram_map.o,
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section .wlan_ram_map*,
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section .libc.ram.bss*
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};
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define block IMAGE1 with fixed order { section LOADER };
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keep { section .fwloader.start_ram.data* };
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define block .fwloader.start.table1 with fixed order{ section .fwloader.start_ram.data* };
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keep { section .fwloader.validate.rodata* };
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define block .fwloader.start.table2 with fixed order{ section .fwloader.validate.rodata* };
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keep { section .fwloader.ram.data* };
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define block .fwloader_ram.data with fixed order{ section .fwloader.ram.data*,
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section .data*,
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// section .bss*,
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section .rodata*
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};
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define block .fwloader_ram.bss with fixed order{
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section .bss*
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};
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keep { section .fwloader.ram.start* };
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define block .fwloader_ram.text with fixed order{ section .fwloader.ram.start*,
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section .text*
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};
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define block .spi_flash.data with fixed order{ section .hal.flash.data*, section .hal.ram.data*, section .hal.gpio.data* };
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define block .spi_flash.text with fixed order{ section .hal.ram.text*, section .hal.flash.text*, section .hal.gpio.text*, };
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define block FWLOADER with fixed order { block .fwloader.start.table1,
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block .fwloader.start.table2,
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block .fwloader_ram.text,
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block .fwloader_ram.data,
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block .fwloader_ram.bss,
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block .spi_flash.data,
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block .spi_flash.text
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};
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define block .updata_for_ota.data with fixed order{ section .bss* object Update_for_OTA.o };
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keep { section .image2.ram.data* };
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define block .image2.start.table1 with fixed order{ section .image2.ram.data* };
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keep { section .image2.validate.rodata*};
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define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*};
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define block .ram_image2.text with fixed order{ section .infra.ram.start*,
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section .mon.ram.text*
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};
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define block .heap with fixed order{ section .heap* };
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place at start of BD_RAM_region { readwrite,
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block .vector_table,
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block .user_vector_table,
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block .user_data_table,
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block .rom.bss,
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block IMAGE1,
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block .heap
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};
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place at start of FWLOADER_region { readwrite, block FWLOADER };
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place at end of IMG2_TEMP_region { readwrite, block .updata_for_ota.data};
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define block .ram.data with fixed order{ section .iar.init_table };
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define block IMAGE2 with fixed order { block .image2.start.table1, block .image2.start.table2, block .ram_image2.text, block .ram.data };
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define block .ram.bss with fixed order{
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section COMMON,
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section .bdsram.data*
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};
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define block .bf_data with fixed order{ section .bfsram.data* };
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place at start of IMG2_TEMP_region { readwrite,
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block IMAGE2,
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block .ram.bss,
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block .bf_data
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};
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define exported symbol __rom_bss_start__ = 0x10000300; // use in rom
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define exported symbol __rom_bss_end__ = 0x10000bc8; // use in rom
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define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom
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define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code
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// unnecessay symbol
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define exported symbol ShowRamBuildInfo=0;
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define exported symbol En32KCalibration=0;
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define exported symbol _AppStart=0;
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define exported symbol vPortSVCHandler=0;
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define exported symbol xPortSysTickHandler=0;
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define exported symbol xPortPendSVHandler=0;
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define exported symbol vTaskDelete=0;
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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//define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
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define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000;
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define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF;
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define symbol __ICFEDIT_region_BD_RAM_start__ = 0x10000000;
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define symbol __ICFEDIT_region_BD_RAM_end__ = 0x10005FFF;
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define symbol __ICFEDIT_region_FWLOADER_start__ = 0x10006000;
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define symbol __ICFEDIT_region_FWLOADER_end__ = 0x1000DFFF;
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define symbol __ICFEDIT_region_IMG2_TEMP_start__ = 0x1000E000;
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define symbol __ICFEDIT_region_IMG2_TEMP_end__ = 0x1006FFFF;
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/*-Sizes-*/
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/*define symbol __ICFEDIT_size_cstack__ = 0x400;*/
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/*define symbol __ICFEDIT_size_heap__ = 0x800;*/
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__];
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define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__];
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define region FWLOADER_region = mem:[from __ICFEDIT_region_FWLOADER_start__ to __ICFEDIT_region_FWLOADER_end__];
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define region IMG2_TEMP_region = mem:[from __ICFEDIT_region_IMG2_TEMP_start__ to __ICFEDIT_region_IMG2_TEMP_end__];
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/*define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };*/
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/*define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };*/
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//initialize by copy { readwrite };
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//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
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//do not initialize { section * };
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//place at address mem:__ICFEDIT_intvec_start__ { readonly section .vectors_table };
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/*place in RAM_region { readwrite, block CSTACK, block HEAP };*/
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//place in TCM_region { readwrite };
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/****************************************
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* ROM Section config *
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****************************************/
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keep { section .rom };
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place at start of ROM_region { readonly, section .rom };
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/****************************************
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* BD RAM Section config *
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****************************************/
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keep { section .ram_dedecated_vector_table* };
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define block .vector_table with fixed order{section .ram_dedecated_vector_table*};
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keep { section .ram_user_define_irq_table* };
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define block .user_vector_table with fixed order{section .ram_user_define_irq_table*};
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keep { section .ram_user_define_data_table* };
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define block .user_data_table with fixed order{section .ram_user_define_data_table*};
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define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o,
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section .hal.ram.bss* object hal_pinmux.o,
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section .hal.ram.bss* object diag.o,
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section .hal.ram.bss* object rtl8195a_ssi_rom.o,
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section .hal.ram.bss* object rtl8195a_gpio.o,
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section .hal.ram.bss*,
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section .timer2_7_vector_table.data*,
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section .infra.ram.bss*,
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section .mon.ram.bss*,
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section .wlan_ram_map* object rom_wlan_ram_map.o,
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section .wlan_ram_map*,
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section .libc.ram.bss*
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};
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define block IMAGE1 with fixed order { section LOADER };
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keep { section .fwloader.start_ram.data* };
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define block .fwloader.start.table1 with fixed order{ section .fwloader.start_ram.data* };
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keep { section .fwloader.validate.rodata* };
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define block .fwloader.start.table2 with fixed order{ section .fwloader.validate.rodata* };
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keep { section .fwloader.ram.data* };
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define block .fwloader_ram.data with fixed order{ section .fwloader.ram.data*,
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section .data*,
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// section .bss*,
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section .rodata*
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};
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define block .fwloader_ram.bss with fixed order{
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section .bss*
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};
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keep { section .fwloader.ram.start* };
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define block .fwloader_ram.text with fixed order{ section .fwloader.ram.start*,
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section .text*
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};
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define block .spi_flash.data with fixed order{ section .hal.flash.data*, section .hal.ram.data*, section .hal.gpio.data* };
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define block .spi_flash.text with fixed order{ section .hal.ram.text*, section .hal.flash.text*, section .hal.gpio.text*, };
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define block FWLOADER with fixed order { block .fwloader.start.table1,
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block .fwloader.start.table2,
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block .fwloader_ram.text,
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block .fwloader_ram.data,
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block .fwloader_ram.bss,
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block .spi_flash.data,
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block .spi_flash.text
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};
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define block .updata_for_ota.data with fixed order{ section .bss* object Update_for_OTA.o };
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keep { section .image2.ram.data* };
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define block .image2.start.table1 with fixed order{ section .image2.ram.data* };
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keep { section .image2.validate.rodata*};
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define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*};
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define block .ram_image2.text with fixed order{ section .infra.ram.start*,
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section .mon.ram.text*
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};
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define block .heap with fixed order{ section .heap* };
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place at start of BD_RAM_region { readwrite,
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block .vector_table,
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block .user_vector_table,
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block .user_data_table,
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block .rom.bss,
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block IMAGE1,
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block .heap
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};
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place at start of FWLOADER_region { readwrite, block FWLOADER };
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place at end of IMG2_TEMP_region { readwrite, block .updata_for_ota.data};
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define block .ram.data with fixed order{ section .iar.init_table };
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define block IMAGE2 with fixed order { block .image2.start.table1, block .image2.start.table2, block .ram_image2.text, block .ram.data };
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define block .ram.bss with fixed order{
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section COMMON,
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section .bdsram.data*
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};
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define block .bf_data with fixed order{ section .bfsram.data* };
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place at start of IMG2_TEMP_region { readwrite,
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block IMAGE2,
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block .ram.bss,
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block .bf_data
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};
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define exported symbol __rom_bss_start__ = 0x10000300; // use in rom
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define exported symbol __rom_bss_end__ = 0x10000bc8; // use in rom
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define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom
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define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code
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||||
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// unnecessay symbol
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define exported symbol ShowRamBuildInfo=0;
|
||||
define exported symbol En32KCalibration=0;
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||||
define exported symbol _AppStart=0;
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||||
define exported symbol vPortSVCHandler=0;
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||||
define exported symbol xPortSysTickHandler=0;
|
||||
define exported symbol xPortPendSVHandler=0;
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define exported symbol vTaskDelete=0;
|
||||
define exported symbol RtlUpSemaFromISR=0;
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||||
@@ -1,132 +1,132 @@
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/*
|
||||
* Routines to access hardware
|
||||
*
|
||||
* Copyright (c) 2015 Realtek Semiconductor Corp.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*/
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||||
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||||
#include "rtl8195a.h"
|
||||
#include "build_info.h"
|
||||
#include "PinNames.h"
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#include "serial_api.h"
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||||
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||||
extern void serial_init (serial_t *obj, PinName tx, PinName rx);
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||||
extern void serial_free (serial_t *obj);
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extern void serial_baud (serial_t *obj, int baudrate);
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extern void serial_format (serial_t *obj, int data_bits, SerialParity parity, int stop_bits);
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||||
extern int main(void);
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||||
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||||
void iar_data_init_fw_loader(void);
|
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void fw_loader_main(void);// __attribute__ ((weak));
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||||
|
||||
#pragma section=".image2.start.table1"
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||||
#pragma section=".fwloader_ram.bss"
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||||
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||||
FW_LOADER_START_RAM_FUN_SECTION
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||||
RAM_START_FUNCTION gFWLoaderEntryFun0 = {fw_loader_main};
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||||
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||||
u8* __image4_entry_func__;
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||||
u8* __image4_validate_code__;
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||||
u8* __fwloader_bss_start__;
|
||||
u8* __fwloader_bss_end__;
|
||||
|
||||
FW_LOADER_VALID_PATTEN_SECTION const u8 RAM_FW_LOADER_VALID_PATTEN[20] = {
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||||
'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff,
|
||||
(FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff),
|
||||
(FW_SUBVERSION&0xff), ((FW_SUBVERSION >> 8)&0xff),
|
||||
(FW_CHIP_ID&0xff), ((FW_CHIP_ID >> 8)&0xff),
|
||||
(FW_CHIP_VER),
|
||||
(FW_BUS_TYPE),
|
||||
(FW_INFO_RSV1),
|
||||
(FW_INFO_RSV2),
|
||||
(FW_INFO_RSV3),
|
||||
(FW_INFO_RSV4)
|
||||
};
|
||||
/**
|
||||
* @brief Main program.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void fw_loader_main(void)
|
||||
{
|
||||
#if CONFIG_SPIC_EN && SPIC_CALIBRATION_IN_NVM
|
||||
SpicNVMCalLoadAll();
|
||||
#endif
|
||||
#if defined ( __ICCARM__ )
|
||||
iar_data_init_fw_loader();
|
||||
#endif
|
||||
u32 Image2Len, Image2Addr, ImageIndex, SpicBitMode, SpicImageIndex;
|
||||
u32 Image2LoadAddr = 0x13000;
|
||||
DBG_8195A("===== Enter FW Loader Image ====\n");
|
||||
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
main();
|
||||
#endif
|
||||
|
||||
IGMAE4:
|
||||
PRAM_START_FUNCTION Image4EntryFun=(PRAM_START_FUNCTION)__image4_entry_func__;
|
||||
|
||||
Image2Len = HAL_READ32(SPI_FLASH_BASE, Image2LoadAddr);
|
||||
Image2Addr = HAL_READ32(SPI_FLASH_BASE, (Image2LoadAddr+0x4));
|
||||
|
||||
DBG_8195A("Flash FW Loader:Addr 0x%x, Len %d, Load to SRAM 0x%x\n", Image2LoadAddr, Image2Len, Image2Addr);
|
||||
|
||||
SpicImageIndex = 0;
|
||||
for (ImageIndex = 0x10 + Image2LoadAddr; ImageIndex < (Image2Len + Image2LoadAddr + 0x10); ImageIndex = ImageIndex + 4) {
|
||||
HAL_WRITE32(Image2Addr, SpicImageIndex,
|
||||
HAL_READ32(SPI_FLASH_BASE, ImageIndex));
|
||||
|
||||
SpicImageIndex += 4;
|
||||
}
|
||||
|
||||
|
||||
#ifdef CONFIG_SDR_EN
|
||||
u32 Image3LoadAddr;
|
||||
u32 Image3Len;
|
||||
u32 Image3Addr;
|
||||
|
||||
Image3LoadAddr = Image2LoadAddr + Image2Len+0x10;
|
||||
Image3Len = HAL_READ32(SPI_FLASH_BASE, Image3LoadAddr);
|
||||
Image3Addr = HAL_READ32(SPI_FLASH_BASE, Image3LoadAddr + 0x4);
|
||||
|
||||
if( (Image3Len==0xFFFFFFFF) || (Image3Len==0) || (Image3Addr!=0x30000000)){
|
||||
DBG_8195A("No Image3\n\r");
|
||||
}else{
|
||||
DBG_8195A("Image3 length: 0x%x, Image3 Addr: 0x%x\n",Image3Len, Image3Addr);
|
||||
SpicImageIndex = 0;
|
||||
|
||||
for (ImageIndex = 0x10 + Image3LoadAddr;
|
||||
ImageIndex < (Image3Len + Image3LoadAddr + 0x10);
|
||||
ImageIndex = ImageIndex + 4) {
|
||||
HAL_WRITE32(Image3Addr, SpicImageIndex,
|
||||
HAL_READ32(SPI_FLASH_BASE, ImageIndex));
|
||||
|
||||
SpicImageIndex += 4;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
//3 3) Jump to image 4
|
||||
DBG_8195A("InfraStart: %p, Img2 Sign %s \n", __image4_entry_func__, (char*)__image4_validate_code__);
|
||||
if (_strcmp((char *)__image4_validate_code__, "RTKWin")) {
|
||||
while (1) {
|
||||
DBG_8195A("Invalid Image4 Signature\n");
|
||||
RtlConsolRom(1000);//each delay is 100us
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
deinit_platform_bootloader();
|
||||
#endif
|
||||
Image4EntryFun->RamStartFun();
|
||||
}
|
||||
|
||||
void iar_data_init_fw_loader(void)
|
||||
{
|
||||
__image4_entry_func__ = (u8*)__section_begin(".image2.start.table1");
|
||||
__image4_validate_code__ = __image4_entry_func__+4;//(u8*)__section_begin(".image2.start.table2");
|
||||
__fwloader_bss_start__ = (u8*)__section_begin(".fwloader_ram.bss");
|
||||
__fwloader_bss_end__ = (u8*)__section_end(".fwloader_ram.bss");
|
||||
}
|
||||
/*
|
||||
* Routines to access hardware
|
||||
*
|
||||
* Copyright (c) 2015 Realtek Semiconductor Corp.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*/
|
||||
|
||||
#include "rtl8195a.h"
|
||||
#include "build_info.h"
|
||||
#include "PinNames.h"
|
||||
#include "serial_api.h"
|
||||
|
||||
extern void serial_init (serial_t *obj, PinName tx, PinName rx);
|
||||
extern void serial_free (serial_t *obj);
|
||||
extern void serial_baud (serial_t *obj, int baudrate);
|
||||
extern void serial_format (serial_t *obj, int data_bits, SerialParity parity, int stop_bits);
|
||||
extern int main(void);
|
||||
|
||||
void iar_data_init_fw_loader(void);
|
||||
void fw_loader_main(void);// __attribute__ ((weak));
|
||||
|
||||
#pragma section=".image2.start.table1"
|
||||
#pragma section=".fwloader_ram.bss"
|
||||
|
||||
FW_LOADER_START_RAM_FUN_SECTION
|
||||
RAM_START_FUNCTION gFWLoaderEntryFun0 = {fw_loader_main};
|
||||
|
||||
u8* __image4_entry_func__;
|
||||
u8* __image4_validate_code__;
|
||||
u8* __fwloader_bss_start__;
|
||||
u8* __fwloader_bss_end__;
|
||||
|
||||
FW_LOADER_VALID_PATTEN_SECTION const u8 RAM_FW_LOADER_VALID_PATTEN[20] = {
|
||||
'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff,
|
||||
(FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff),
|
||||
(FW_SUBVERSION&0xff), ((FW_SUBVERSION >> 8)&0xff),
|
||||
(FW_CHIP_ID&0xff), ((FW_CHIP_ID >> 8)&0xff),
|
||||
(FW_CHIP_VER),
|
||||
(FW_BUS_TYPE),
|
||||
(FW_INFO_RSV1),
|
||||
(FW_INFO_RSV2),
|
||||
(FW_INFO_RSV3),
|
||||
(FW_INFO_RSV4)
|
||||
};
|
||||
/**
|
||||
* @brief Main program.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void fw_loader_main(void)
|
||||
{
|
||||
#if CONFIG_SPIC_EN && SPIC_CALIBRATION_IN_NVM
|
||||
SpicNVMCalLoadAll();
|
||||
#endif
|
||||
#if defined ( __ICCARM__ )
|
||||
iar_data_init_fw_loader();
|
||||
#endif
|
||||
u32 Image2Len, Image2Addr, ImageIndex, SpicBitMode, SpicImageIndex;
|
||||
u32 Image2LoadAddr = 0x13000;
|
||||
DBG_8195A("===== Enter FW Loader Image ====\n");
|
||||
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
main();
|
||||
#endif
|
||||
|
||||
IGMAE4:
|
||||
PRAM_START_FUNCTION Image4EntryFun=(PRAM_START_FUNCTION)__image4_entry_func__;
|
||||
|
||||
Image2Len = HAL_READ32(SPI_FLASH_BASE, Image2LoadAddr);
|
||||
Image2Addr = HAL_READ32(SPI_FLASH_BASE, (Image2LoadAddr+0x4));
|
||||
|
||||
DBG_8195A("Flash FW Loader:Addr 0x%x, Len %d, Load to SRAM 0x%x\n", Image2LoadAddr, Image2Len, Image2Addr);
|
||||
|
||||
SpicImageIndex = 0;
|
||||
for (ImageIndex = 0x10 + Image2LoadAddr; ImageIndex < (Image2Len + Image2LoadAddr + 0x10); ImageIndex = ImageIndex + 4) {
|
||||
HAL_WRITE32(Image2Addr, SpicImageIndex,
|
||||
HAL_READ32(SPI_FLASH_BASE, ImageIndex));
|
||||
|
||||
SpicImageIndex += 4;
|
||||
}
|
||||
|
||||
|
||||
#ifdef CONFIG_SDR_EN
|
||||
u32 Image3LoadAddr;
|
||||
u32 Image3Len;
|
||||
u32 Image3Addr;
|
||||
|
||||
Image3LoadAddr = Image2LoadAddr + Image2Len+0x10;
|
||||
Image3Len = HAL_READ32(SPI_FLASH_BASE, Image3LoadAddr);
|
||||
Image3Addr = HAL_READ32(SPI_FLASH_BASE, Image3LoadAddr + 0x4);
|
||||
|
||||
if( (Image3Len==0xFFFFFFFF) || (Image3Len==0) || (Image3Addr!=0x30000000)){
|
||||
DBG_8195A("No Image3\n\r");
|
||||
}else{
|
||||
DBG_8195A("Image3 length: 0x%x, Image3 Addr: 0x%x\n",Image3Len, Image3Addr);
|
||||
SpicImageIndex = 0;
|
||||
|
||||
for (ImageIndex = 0x10 + Image3LoadAddr;
|
||||
ImageIndex < (Image3Len + Image3LoadAddr + 0x10);
|
||||
ImageIndex = ImageIndex + 4) {
|
||||
HAL_WRITE32(Image3Addr, SpicImageIndex,
|
||||
HAL_READ32(SPI_FLASH_BASE, ImageIndex));
|
||||
|
||||
SpicImageIndex += 4;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
//3 3) Jump to image 4
|
||||
DBG_8195A("InfraStart: %p, Img2 Sign %s \n", __image4_entry_func__, (char*)__image4_validate_code__);
|
||||
if (_strcmp((char *)__image4_validate_code__, "RTKWin")) {
|
||||
while (1) {
|
||||
DBG_8195A("Invalid Image4 Signature\n");
|
||||
RtlConsolRom(1000);//each delay is 100us
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
deinit_platform_bootloader();
|
||||
#endif
|
||||
Image4EntryFun->RamStartFun();
|
||||
}
|
||||
|
||||
void iar_data_init_fw_loader(void)
|
||||
{
|
||||
__image4_entry_func__ = (u8*)__section_begin(".image2.start.table1");
|
||||
__image4_validate_code__ = __image4_entry_func__+4;//(u8*)__section_begin(".image2.start.table2");
|
||||
__fwloader_bss_start__ = (u8*)__section_begin(".fwloader_ram.bss");
|
||||
__fwloader_bss_end__ = (u8*)__section_end(".fwloader_ram.bss");
|
||||
}
|
||||
|
||||
@@ -1,50 +1,50 @@
|
||||
|
||||
#include "stdint.h"
|
||||
#include "mico.h"
|
||||
#include "heap_reuse.h"
|
||||
|
||||
extern void insert_heap(void *pv, int len);
|
||||
#pragma section=".bootup_reuse"
|
||||
#pragma section=".ram.bss"
|
||||
#pragma section=".elink_reuse"
|
||||
#pragma section=".softap_reuse"
|
||||
|
||||
void free_memory_reuse(void)
|
||||
{
|
||||
uint32_t len;
|
||||
void *start;
|
||||
|
||||
start = __section_end(".bootup_reuse");
|
||||
len = (uint32_t)__section_begin(".ram.bss") - (uint32_t)start;
|
||||
|
||||
printf("free heap reuse: %p %d\r\n", start, len);
|
||||
insert_heap((void *)start, (int)len);
|
||||
}
|
||||
|
||||
void bootup_region_reuse(void)
|
||||
{
|
||||
printf("bootup region %p-%d \r\n",
|
||||
(void *)__section_begin(".bootup_reuse"), (int)__section_size(".bootup_reuse"));
|
||||
insert_heap((void *)__section_begin(".bootup_reuse"), (int)__section_size(".bootup_reuse"));
|
||||
}
|
||||
|
||||
void elink_region_reuse(void)
|
||||
{
|
||||
static int elink_done = 0;
|
||||
if (elink_done == 1)
|
||||
return;
|
||||
insert_heap((void *)__section_begin(".elink_reuse"), (int)__section_size(".elink_reuse"));
|
||||
elink_done = 1;
|
||||
}
|
||||
|
||||
void softap_region_reuse(void)
|
||||
{
|
||||
static int alink_done = 0;
|
||||
if (alink_done == 1)
|
||||
return;
|
||||
insert_heap((void *)__section_begin(".softap_reuse"), (int)__section_size(".softap_reuse"));
|
||||
alink_done = 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
#include "stdint.h"
|
||||
#include "mico.h"
|
||||
#include "heap_reuse.h"
|
||||
|
||||
extern void insert_heap(void *pv, int len);
|
||||
#pragma section=".bootup_reuse"
|
||||
#pragma section=".ram.bss"
|
||||
#pragma section=".elink_reuse"
|
||||
#pragma section=".softap_reuse"
|
||||
|
||||
void free_memory_reuse(void)
|
||||
{
|
||||
uint32_t len;
|
||||
void *start;
|
||||
|
||||
start = __section_end(".bootup_reuse");
|
||||
len = (uint32_t)__section_begin(".ram.bss") - (uint32_t)start;
|
||||
|
||||
printf("free heap reuse: %p %d\r\n", start, len);
|
||||
insert_heap((void *)start, (int)len);
|
||||
}
|
||||
|
||||
void bootup_region_reuse(void)
|
||||
{
|
||||
printf("bootup region %p-%d \r\n",
|
||||
(void *)__section_begin(".bootup_reuse"), (int)__section_size(".bootup_reuse"));
|
||||
insert_heap((void *)__section_begin(".bootup_reuse"), (int)__section_size(".bootup_reuse"));
|
||||
}
|
||||
|
||||
void elink_region_reuse(void)
|
||||
{
|
||||
static int elink_done = 0;
|
||||
if (elink_done == 1)
|
||||
return;
|
||||
insert_heap((void *)__section_begin(".elink_reuse"), (int)__section_size(".elink_reuse"));
|
||||
elink_done = 1;
|
||||
}
|
||||
|
||||
void softap_region_reuse(void)
|
||||
{
|
||||
static int alink_done = 0;
|
||||
if (alink_done == 1)
|
||||
return;
|
||||
insert_heap((void *)__section_begin(".softap_reuse"), (int)__section_size(".softap_reuse"));
|
||||
alink_done = 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -1,20 +1,20 @@
|
||||
#ifndef __HEAP_REUSE_H__
|
||||
#define __HEAP_REUSE_H__
|
||||
/* yhb defined, ref micoLinkerForIAR.icf
|
||||
* some memory region can be used as HEAP when there will not used any more.
|
||||
*/
|
||||
|
||||
|
||||
/* call it After mico MFG test and force OTA */
|
||||
void bootup_region_reuse(void);
|
||||
|
||||
/* call it in configure mode; or after ota check in work mode */
|
||||
void tota_region_reuse(void);
|
||||
|
||||
/* call it in work mode; or configure mode with alink mode */
|
||||
void elink_region_reuse(void);
|
||||
|
||||
/* call it in work mode; or configure mode with easylink mode */
|
||||
void alink_region_reuse(void);
|
||||
|
||||
#endif
|
||||
#ifndef __HEAP_REUSE_H__
|
||||
#define __HEAP_REUSE_H__
|
||||
/* yhb defined, ref micoLinkerForIAR.icf
|
||||
* some memory region can be used as HEAP when there will not used any more.
|
||||
*/
|
||||
|
||||
|
||||
/* call it After mico MFG test and force OTA */
|
||||
void bootup_region_reuse(void);
|
||||
|
||||
/* call it in configure mode; or after ota check in work mode */
|
||||
void tota_region_reuse(void);
|
||||
|
||||
/* call it in work mode; or configure mode with alink mode */
|
||||
void elink_region_reuse(void);
|
||||
|
||||
/* call it in work mode; or configure mode with easylink mode */
|
||||
void alink_region_reuse(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,261 +1,261 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
|
||||
/*
|
||||
code<EFBFBD><EFBFBD><EFBFBD><EFBFBD> Heap <20><><EFBFBD>壺
|
||||
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0x1000)<29><>mico_ping.o MICOMfgTest.o MICOForceOTA.o 0xebc
|
||||
2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0x4000)<29><>Alink.o AlinkSoftAP.o dhcp-server-main.o dhcp-server.o zconfig.o zconfig.a 0x3d44
|
||||
3<EFBFBD><EFBFBD>mxchip<EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0x3000)<29><>EasyLink.o smart_config.o 0x2de0
|
||||
4<EFBFBD><EFBFBD>thread ota(0x1000): thread_ota.o 0xeb4
|
||||
|
||||
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD>壺
|
||||
<EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>code
|
||||
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ: <20><><EFBFBD><EFBFBD>thread ota
|
||||
mxchip<69><70><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>alink<6E><6B><EFBFBD><EFBFBD>code
|
||||
alink<6E><6B><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>mxchip<69><70><EFBFBD><EFBFBD>code
|
||||
2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>ģʽcode<64><65>
|
||||
*/
|
||||
|
||||
//define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
|
||||
define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000;
|
||||
define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF;
|
||||
define symbol __ICFEDIT_region_ROM_USED_RAM_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_ROM_USED_RAM_end__ = 0x10005FFF;
|
||||
define symbol __ICFEDIT_region_FWLOADER_start__ = 0x10006000;
|
||||
define symbol __ICFEDIT_region_FWLOADER_end__ = 0x1000DFFF;
|
||||
//define symbol __ICFEDIT_region_RECY_RAM_start__ = 0x10002090;
|
||||
//define symbol __ICFEDIT_region_RECY_RAM_end__ = 0x100037FF;
|
||||
define symbol __ICFEDIT_region_BD_RAM_start__ = 0x1000E000;
|
||||
define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
/*define symbol __ICFEDIT_size_cstack__ = 0x400;*/
|
||||
/*define symbol __ICFEDIT_size_heap__ = 0x800;*/
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__];
|
||||
define region ROM_USED_RAM_region = mem:[from __ICFEDIT_region_ROM_USED_RAM_start__ to __ICFEDIT_region_ROM_USED_RAM_end__];
|
||||
//define region RECY_RAM_region = mem:[from __ICFEDIT_region_RECY_RAM_start__ to __ICFEDIT_region_RECY_RAM_end__];
|
||||
define region FWLOADER_region = mem:[from __ICFEDIT_region_FWLOADER_start__ to __ICFEDIT_region_FWLOADER_end__];
|
||||
define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__];
|
||||
//define region HEAP_region = mem:[from __ICFEDIT_region_HEAP_RAM_start__ to __ICFEDIT_region_HEAP_RAM_end__];
|
||||
|
||||
/*define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };*/
|
||||
/*define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };*/
|
||||
|
||||
//initialize by copy { readwrite };
|
||||
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
|
||||
|
||||
//do not initialize { section * };
|
||||
|
||||
//place at address mem:__ICFEDIT_intvec_start__ { readonly section .vectors_table };
|
||||
|
||||
|
||||
/*place in RAM_region { readwrite, block CSTACK, block HEAP };*/
|
||||
place in TCM_region { readwrite };
|
||||
|
||||
/****************************************
|
||||
* ROM Section config *
|
||||
****************************************/
|
||||
keep { section .rom };
|
||||
place at start of ROM_region { readonly, section .rom };
|
||||
|
||||
/****************************************
|
||||
* BD RAM Section config *
|
||||
****************************************/
|
||||
keep { section .ram_dedecated_vector_table* };
|
||||
define block .vector_table with fixed order{section .ram_dedecated_vector_table*};
|
||||
|
||||
keep { section .ram_user_define_irq_table* };
|
||||
define block .user_vector_table with fixed order{section .ram_user_define_irq_table*};
|
||||
|
||||
keep { section .ram_user_define_data_table* };
|
||||
define block .user_data_table with fixed order{section .ram_user_define_data_table*};
|
||||
|
||||
define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o,
|
||||
section .hal.ram.bss* object hal_pinmux.o,
|
||||
section .hal.ram.bss* object diag.o,
|
||||
section .hal.ram.bss* object rtl8195a_ssi_rom.o,
|
||||
section .hal.ram.bss* object rtl8195a_gpio.o,
|
||||
section .hal.ram.bss*,
|
||||
section .timer2_7_vector_table.data*,
|
||||
section .infra.ram.bss*,
|
||||
section .mon.ram.bss*,
|
||||
section .wlan_ram_map* object rom_wlan_ram_map.o,
|
||||
section .wlan_ram_map*,
|
||||
section .libc.ram.bss*,
|
||||
};
|
||||
|
||||
keep { section .start.ram.data* };
|
||||
define block .ram.start.table with fixed order{ section .start.ram.data* };
|
||||
|
||||
keep { section .image1.validate.rodata* };
|
||||
keep { section .infra.ram.data* };
|
||||
keep { section .timer.ram.data* };
|
||||
keep { section .hal.ram.data* };
|
||||
define block .ram_image1.data with fixed order{ section .image1.validate.rodata*,
|
||||
section .infra.ram.data*,
|
||||
section .timer.ram.data*,
|
||||
section .cutb.ram.data*,
|
||||
section .hal.ram.data* object rom.o, // for standard libaray __impure_data_ptr
|
||||
section .cutc.ram.data*,
|
||||
section .hal.ram.data*
|
||||
};
|
||||
define block .ram_image1.bss with fixed order{ //section .hal.flash.data*,
|
||||
section .hal.sdrc.data*
|
||||
};
|
||||
|
||||
define block .ram_image1.text with fixed order{ section .hal.ram.text*,
|
||||
section .hal.sdrc.text*,
|
||||
//section .text* object startup.o,
|
||||
section .infra.ram.text*,
|
||||
};
|
||||
|
||||
define block IMAGE1 with fixed order { section LOADER };
|
||||
define block IMAGE1_DBG with fixed order { block .ram.start.table, block .ram_image1.data, block .ram_image1.bss, block .ram_image1.text };
|
||||
|
||||
place at start of ROM_USED_RAM_region { readwrite,
|
||||
block .vector_table,
|
||||
block .user_vector_table,
|
||||
block .user_data_table,
|
||||
block .rom.bss,
|
||||
block IMAGE1
|
||||
};
|
||||
|
||||
keep { section .fwloader.start_ram.data* };
|
||||
define block .fwloader.start.table1 with fixed order{ section .fwloader.start_ram.data* };
|
||||
|
||||
keep { section .fwloader.validate.rodata* };
|
||||
define block .fwloader.start.table2 with fixed order{ section .fwloader.validate.rodata* };
|
||||
|
||||
//keep { section .fwloader.ram.data* };
|
||||
//define block .fwloader_ram.data with fixed order{ section .fwloader.ram.data*,
|
||||
// section .data* object fw_loader_main.o,
|
||||
// section .bss* object fw_loader_main.o,
|
||||
// section .rodata* object fw_loader_main.o
|
||||
// };
|
||||
|
||||
//keep { section .fwloader.ram.start* };
|
||||
//define block .fwloader_ram.text with fixed order{
|
||||
// section .text* object fw_loader_main.o
|
||||
// };
|
||||
|
||||
|
||||
|
||||
define block FWLOADER with fixed order { block .fwloader.start.table1,
|
||||
block .fwloader.start.table2,
|
||||
// block .fwloader_ram.text,
|
||||
// block .fwloader_ram.data
|
||||
};
|
||||
|
||||
place at start of FWLOADER_region { readwrite, block FWLOADER };
|
||||
|
||||
// yhb defined
|
||||
define block .elink_reuse with fixed order{
|
||||
object EasyLink.o,
|
||||
object smart_config.o,
|
||||
};
|
||||
define block .softap_reuse with fixed order{
|
||||
object Alink.o,
|
||||
object AlinkSoftAP.o,
|
||||
object dhcp-server-main.o,
|
||||
object dhcp-server.o,
|
||||
object rtw_ap.o,
|
||||
object zconfig.o,
|
||||
object zconfig_ieee80211.o,
|
||||
object zconfig_protocol.o,
|
||||
object zconfig_utils.o,
|
||||
object zconfig_vendor_mico.o,
|
||||
};
|
||||
define block .bootup_reuse with fixed order{
|
||||
object MICOMfgTest.o,
|
||||
object MICOForceOTA.o,
|
||||
object mico_ping.o,
|
||||
};
|
||||
|
||||
keep { section .image2.ram.data* };
|
||||
define block .image2.start.table1 with fixed order{ section .image2.ram.data* };
|
||||
|
||||
keep { section .image2.validate.rodata*, section .custom.validate.rodata* };
|
||||
define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*, section .custom.validate.rodata* };
|
||||
|
||||
define block SHT$$PREINIT_ARRAY { preinit_array };
|
||||
define block SHT$$INIT_ARRAY { init_array };
|
||||
define block CPP_INIT with fixed order { block SHT$$PREINIT_ARRAY,
|
||||
block SHT$$INIT_ARRAY };
|
||||
|
||||
define block .ram_image2.text with fixed order{ section .infra.ram.start*,
|
||||
section .rodata*,
|
||||
block CPP_INIT,
|
||||
section .mon.ram.text*,
|
||||
section .hal.flash.text*,
|
||||
section .hal.gpio.text*,
|
||||
section .text*,
|
||||
section CODE,
|
||||
section .otg.rom.text,
|
||||
section Veneer object startup.o,
|
||||
section __DLIB_PERTHREAD,
|
||||
//section .mdns.text
|
||||
};
|
||||
|
||||
define block .ram.data with fixed order{ section .data*,
|
||||
section DATA,
|
||||
section .ram.otg.data.a,
|
||||
section .iar.init_table,
|
||||
//section .mdns.data
|
||||
};
|
||||
|
||||
define block IMAGE2 with fixed order { block .image2.start.table1, block .image2.start.table2, block .ram_image2.text, block .ram.data };
|
||||
|
||||
define block .ram.bss with fixed order{ section .bss*,
|
||||
section .ssl_ram_map,
|
||||
section .hal.flash.data*,
|
||||
section .hal.gpio.data*,
|
||||
section COMMON,
|
||||
section .bdsram.data*,
|
||||
section .bss* object heap_5.o
|
||||
};
|
||||
define block .bf_data with fixed order{ section .bfsram.data* };
|
||||
define block .heap with fixed order{ section .heap* };
|
||||
define block .stack_dummy with fixed order { section .stack };
|
||||
place at start of BD_RAM_region { readwrite,
|
||||
block IMAGE2,
|
||||
block .elink_reuse,
|
||||
block .softap_reuse,
|
||||
block .bootup_reuse,
|
||||
};
|
||||
|
||||
//place at address mem:0x10052b00 { readwrite,
|
||||
place at end of BD_RAM_region { readwrite,
|
||||
block .ram.bss,
|
||||
block .bf_data,
|
||||
};
|
||||
|
||||
|
||||
/* TCM placement */
|
||||
define overlay TCM_overlay { section .tcm.heap,
|
||||
section .tcm.bss,
|
||||
block .heap,
|
||||
block .stack_dummy
|
||||
};
|
||||
/* dummy code placement */
|
||||
define overlay TCM_overlay { block IMAGE1_DBG };
|
||||
place at start of TCM_region { readwrite,
|
||||
overlay TCM_overlay
|
||||
};
|
||||
|
||||
define exported symbol __rom_bss_start__ = 0x10000300; // use in rom
|
||||
define exported symbol __rom_bss_end__ = 0x10000bc8; // use in rom
|
||||
define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom
|
||||
define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code
|
||||
define exported symbol _rtl_impure_ptr = 0x10001c60; // for standard library
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
|
||||
/*
|
||||
code<EFBFBD><EFBFBD><EFBFBD><EFBFBD> Heap <20><><EFBFBD>壺
|
||||
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0x1000)<29><>mico_ping.o MICOMfgTest.o MICOForceOTA.o 0xebc
|
||||
2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0x4000)<29><>Alink.o AlinkSoftAP.o dhcp-server-main.o dhcp-server.o zconfig.o zconfig.a 0x3d44
|
||||
3<EFBFBD><EFBFBD>mxchip<EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0x3000)<29><>EasyLink.o smart_config.o 0x2de0
|
||||
4<EFBFBD><EFBFBD>thread ota(0x1000): thread_ota.o 0xeb4
|
||||
|
||||
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD>壺
|
||||
<EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>code
|
||||
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ: <20><><EFBFBD><EFBFBD>thread ota
|
||||
mxchip<69><70><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>alink<6E><6B><EFBFBD><EFBFBD>code
|
||||
alink<6E><6B><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>mxchip<69><70><EFBFBD><EFBFBD>code
|
||||
2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>ģʽcode<64><65>
|
||||
*/
|
||||
|
||||
//define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
|
||||
define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000;
|
||||
define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF;
|
||||
define symbol __ICFEDIT_region_ROM_USED_RAM_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_ROM_USED_RAM_end__ = 0x10005FFF;
|
||||
define symbol __ICFEDIT_region_FWLOADER_start__ = 0x10006000;
|
||||
define symbol __ICFEDIT_region_FWLOADER_end__ = 0x1000DFFF;
|
||||
//define symbol __ICFEDIT_region_RECY_RAM_start__ = 0x10002090;
|
||||
//define symbol __ICFEDIT_region_RECY_RAM_end__ = 0x100037FF;
|
||||
define symbol __ICFEDIT_region_BD_RAM_start__ = 0x1000E000;
|
||||
define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
/*define symbol __ICFEDIT_size_cstack__ = 0x400;*/
|
||||
/*define symbol __ICFEDIT_size_heap__ = 0x800;*/
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__];
|
||||
define region ROM_USED_RAM_region = mem:[from __ICFEDIT_region_ROM_USED_RAM_start__ to __ICFEDIT_region_ROM_USED_RAM_end__];
|
||||
//define region RECY_RAM_region = mem:[from __ICFEDIT_region_RECY_RAM_start__ to __ICFEDIT_region_RECY_RAM_end__];
|
||||
define region FWLOADER_region = mem:[from __ICFEDIT_region_FWLOADER_start__ to __ICFEDIT_region_FWLOADER_end__];
|
||||
define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__];
|
||||
//define region HEAP_region = mem:[from __ICFEDIT_region_HEAP_RAM_start__ to __ICFEDIT_region_HEAP_RAM_end__];
|
||||
|
||||
/*define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };*/
|
||||
/*define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };*/
|
||||
|
||||
//initialize by copy { readwrite };
|
||||
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
|
||||
|
||||
//do not initialize { section * };
|
||||
|
||||
//place at address mem:__ICFEDIT_intvec_start__ { readonly section .vectors_table };
|
||||
|
||||
|
||||
/*place in RAM_region { readwrite, block CSTACK, block HEAP };*/
|
||||
place in TCM_region { readwrite };
|
||||
|
||||
/****************************************
|
||||
* ROM Section config *
|
||||
****************************************/
|
||||
keep { section .rom };
|
||||
place at start of ROM_region { readonly, section .rom };
|
||||
|
||||
/****************************************
|
||||
* BD RAM Section config *
|
||||
****************************************/
|
||||
keep { section .ram_dedecated_vector_table* };
|
||||
define block .vector_table with fixed order{section .ram_dedecated_vector_table*};
|
||||
|
||||
keep { section .ram_user_define_irq_table* };
|
||||
define block .user_vector_table with fixed order{section .ram_user_define_irq_table*};
|
||||
|
||||
keep { section .ram_user_define_data_table* };
|
||||
define block .user_data_table with fixed order{section .ram_user_define_data_table*};
|
||||
|
||||
define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o,
|
||||
section .hal.ram.bss* object hal_pinmux.o,
|
||||
section .hal.ram.bss* object diag.o,
|
||||
section .hal.ram.bss* object rtl8195a_ssi_rom.o,
|
||||
section .hal.ram.bss* object rtl8195a_gpio.o,
|
||||
section .hal.ram.bss*,
|
||||
section .timer2_7_vector_table.data*,
|
||||
section .infra.ram.bss*,
|
||||
section .mon.ram.bss*,
|
||||
section .wlan_ram_map* object rom_wlan_ram_map.o,
|
||||
section .wlan_ram_map*,
|
||||
section .libc.ram.bss*,
|
||||
};
|
||||
|
||||
keep { section .start.ram.data* };
|
||||
define block .ram.start.table with fixed order{ section .start.ram.data* };
|
||||
|
||||
keep { section .image1.validate.rodata* };
|
||||
keep { section .infra.ram.data* };
|
||||
keep { section .timer.ram.data* };
|
||||
keep { section .hal.ram.data* };
|
||||
define block .ram_image1.data with fixed order{ section .image1.validate.rodata*,
|
||||
section .infra.ram.data*,
|
||||
section .timer.ram.data*,
|
||||
section .cutb.ram.data*,
|
||||
section .hal.ram.data* object rom.o, // for standard libaray __impure_data_ptr
|
||||
section .cutc.ram.data*,
|
||||
section .hal.ram.data*
|
||||
};
|
||||
define block .ram_image1.bss with fixed order{ //section .hal.flash.data*,
|
||||
section .hal.sdrc.data*
|
||||
};
|
||||
|
||||
define block .ram_image1.text with fixed order{ section .hal.ram.text*,
|
||||
section .hal.sdrc.text*,
|
||||
//section .text* object startup.o,
|
||||
section .infra.ram.text*,
|
||||
};
|
||||
|
||||
define block IMAGE1 with fixed order { section LOADER };
|
||||
define block IMAGE1_DBG with fixed order { block .ram.start.table, block .ram_image1.data, block .ram_image1.bss, block .ram_image1.text };
|
||||
|
||||
place at start of ROM_USED_RAM_region { readwrite,
|
||||
block .vector_table,
|
||||
block .user_vector_table,
|
||||
block .user_data_table,
|
||||
block .rom.bss,
|
||||
block IMAGE1
|
||||
};
|
||||
|
||||
keep { section .fwloader.start_ram.data* };
|
||||
define block .fwloader.start.table1 with fixed order{ section .fwloader.start_ram.data* };
|
||||
|
||||
keep { section .fwloader.validate.rodata* };
|
||||
define block .fwloader.start.table2 with fixed order{ section .fwloader.validate.rodata* };
|
||||
|
||||
//keep { section .fwloader.ram.data* };
|
||||
//define block .fwloader_ram.data with fixed order{ section .fwloader.ram.data*,
|
||||
// section .data* object fw_loader_main.o,
|
||||
// section .bss* object fw_loader_main.o,
|
||||
// section .rodata* object fw_loader_main.o
|
||||
// };
|
||||
|
||||
//keep { section .fwloader.ram.start* };
|
||||
//define block .fwloader_ram.text with fixed order{
|
||||
// section .text* object fw_loader_main.o
|
||||
// };
|
||||
|
||||
|
||||
|
||||
define block FWLOADER with fixed order { block .fwloader.start.table1,
|
||||
block .fwloader.start.table2,
|
||||
// block .fwloader_ram.text,
|
||||
// block .fwloader_ram.data
|
||||
};
|
||||
|
||||
place at start of FWLOADER_region { readwrite, block FWLOADER };
|
||||
|
||||
// yhb defined
|
||||
define block .elink_reuse with fixed order{
|
||||
object EasyLink.o,
|
||||
object smart_config.o,
|
||||
};
|
||||
define block .softap_reuse with fixed order{
|
||||
object Alink.o,
|
||||
object AlinkSoftAP.o,
|
||||
object dhcp-server-main.o,
|
||||
object dhcp-server.o,
|
||||
object rtw_ap.o,
|
||||
object zconfig.o,
|
||||
object zconfig_ieee80211.o,
|
||||
object zconfig_protocol.o,
|
||||
object zconfig_utils.o,
|
||||
object zconfig_vendor_mico.o,
|
||||
};
|
||||
define block .bootup_reuse with fixed order{
|
||||
object MICOMfgTest.o,
|
||||
object MICOForceOTA.o,
|
||||
object mico_ping.o,
|
||||
};
|
||||
|
||||
keep { section .image2.ram.data* };
|
||||
define block .image2.start.table1 with fixed order{ section .image2.ram.data* };
|
||||
|
||||
keep { section .image2.validate.rodata*, section .custom.validate.rodata* };
|
||||
define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*, section .custom.validate.rodata* };
|
||||
|
||||
define block SHT$$PREINIT_ARRAY { preinit_array };
|
||||
define block SHT$$INIT_ARRAY { init_array };
|
||||
define block CPP_INIT with fixed order { block SHT$$PREINIT_ARRAY,
|
||||
block SHT$$INIT_ARRAY };
|
||||
|
||||
define block .ram_image2.text with fixed order{ section .infra.ram.start*,
|
||||
section .rodata*,
|
||||
block CPP_INIT,
|
||||
section .mon.ram.text*,
|
||||
section .hal.flash.text*,
|
||||
section .hal.gpio.text*,
|
||||
section .text*,
|
||||
section CODE,
|
||||
section .otg.rom.text,
|
||||
section Veneer object startup.o,
|
||||
section __DLIB_PERTHREAD,
|
||||
//section .mdns.text
|
||||
};
|
||||
|
||||
define block .ram.data with fixed order{ section .data*,
|
||||
section DATA,
|
||||
section .ram.otg.data.a,
|
||||
section .iar.init_table,
|
||||
//section .mdns.data
|
||||
};
|
||||
|
||||
define block IMAGE2 with fixed order { block .image2.start.table1, block .image2.start.table2, block .ram_image2.text, block .ram.data };
|
||||
|
||||
define block .ram.bss with fixed order{ section .bss*,
|
||||
section .ssl_ram_map,
|
||||
section .hal.flash.data*,
|
||||
section .hal.gpio.data*,
|
||||
section COMMON,
|
||||
section .bdsram.data*,
|
||||
section .bss* object heap_5.o
|
||||
};
|
||||
define block .bf_data with fixed order{ section .bfsram.data* };
|
||||
define block .heap with fixed order{ section .heap* };
|
||||
define block .stack_dummy with fixed order { section .stack };
|
||||
place at start of BD_RAM_region { readwrite,
|
||||
block IMAGE2,
|
||||
block .elink_reuse,
|
||||
block .softap_reuse,
|
||||
block .bootup_reuse,
|
||||
};
|
||||
|
||||
//place at address mem:0x10052b00 { readwrite,
|
||||
place at end of BD_RAM_region { readwrite,
|
||||
block .ram.bss,
|
||||
block .bf_data,
|
||||
};
|
||||
|
||||
|
||||
/* TCM placement */
|
||||
define overlay TCM_overlay { section .tcm.heap,
|
||||
section .tcm.bss,
|
||||
block .heap,
|
||||
block .stack_dummy
|
||||
};
|
||||
/* dummy code placement */
|
||||
define overlay TCM_overlay { block IMAGE1_DBG };
|
||||
place at start of TCM_region { readwrite,
|
||||
overlay TCM_overlay
|
||||
};
|
||||
|
||||
define exported symbol __rom_bss_start__ = 0x10000300; // use in rom
|
||||
define exported symbol __rom_bss_end__ = 0x10000bc8; // use in rom
|
||||
define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom
|
||||
define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code
|
||||
define exported symbol _rtl_impure_ptr = 0x10001c60; // for standard library
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,179 +1,185 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file platform.h
|
||||
* @author William Xu
|
||||
* @version V1.0.0
|
||||
* @date 05-May-2014
|
||||
* @brief This file provides all MICO Peripherals defined for current platform.
|
||||
******************************************************************************
|
||||
*
|
||||
* The MIT License
|
||||
* Copyright (c) 2014 MXCHIP Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
|
||||
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/******************************************************
|
||||
* Macros
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Constants
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Enumerations
|
||||
******************************************************/
|
||||
|
||||
|
||||
#define MICO_UNUSED 0xFF
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_SYS_LED,
|
||||
//MICO_RF_LED,
|
||||
|
||||
MICO_GPIO_1 ,
|
||||
MICO_GPIO_2,
|
||||
MICO_GPIO_3,
|
||||
MICO_GPIO_4,
|
||||
MICO_GPIO_5,
|
||||
MICO_GPIO_6,
|
||||
MICO_GPIO_7,
|
||||
MICO_GPIO_8,
|
||||
MICO_GPIO_9,
|
||||
MICO_GPIO_10,
|
||||
MICO_GPIO_11,
|
||||
MICO_GPIO_12,
|
||||
MICO_GPIO_13,
|
||||
MICO_GPIO_14,
|
||||
MICO_GPIO_15,
|
||||
MICO_GPIO_16,
|
||||
MICO_GPIO_17,
|
||||
MICO_GPIO_18,
|
||||
MICO_GPIO_19,
|
||||
MICO_GPIO_20,
|
||||
MICO_GPIO_21,
|
||||
MICO_GPIO_22,
|
||||
MICO_GPIO_23,
|
||||
MICO_GPIO_24,
|
||||
MICO_GPIO_25,
|
||||
|
||||
MICO_GPIO_MAX, /* Denotes the total number of GPIO port aliases. Not a valid GPIO alias */
|
||||
MICO_GPIO_NONE,
|
||||
} mico_gpio_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_SPI_1,
|
||||
MICO_SPI_MAX, /* Denotes the total number of SPI port aliases. Not a valid SPI alias */
|
||||
MICO_SPI_NONE,
|
||||
} mico_spi_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_I2C_1,
|
||||
MICO_I2C_MAX, /* Denotes the total number of I2C port aliases. Not a valid I2C alias */
|
||||
MICO_I2C_NONE,
|
||||
} mico_i2c_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_PWM_1,
|
||||
MICO_PWM_2,
|
||||
MICO_PWM_3,
|
||||
MICO_PWM_4,
|
||||
MICO_PWM_MAX, /* Denotes the total number of PWM port aliases. Not a valid PWM alias */
|
||||
MICO_PWM_NONE,
|
||||
} mico_pwm_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_ADC_1,
|
||||
MICO_ADC_2,
|
||||
MICO_ADC_3,
|
||||
MICO_ADC_MAX, /* Denotes the total number of ADC port aliases. Not a valid ADC alias */
|
||||
MICO_ADC_NONE,
|
||||
} mico_adc_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_UART_1,
|
||||
MICO_UART_MAX, /* Denotes the total number of UART port aliases. Not a valid UART alias */
|
||||
MICO_UART_NONE,
|
||||
} mico_uart_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_FLASH_EMBEDDED,
|
||||
MICO_FLASH_SPI,
|
||||
MICO_FLASH_MAX,
|
||||
MICO_FLASH_NONE,
|
||||
} mico_flash_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_PARTITION_USER_MAX
|
||||
} mico_user_partition_t;
|
||||
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
#define STDIO_UART MICO_UART_1
|
||||
#define STDIO_UART_BAUDRATE (921600)
|
||||
#else
|
||||
#define STDIO_UART MICO_UART_NONE
|
||||
#define STDIO_UART_BAUDRATE (115200)
|
||||
#endif
|
||||
|
||||
#define UART_FOR_APP MICO_UART_1
|
||||
#define MFG_TEST MICO_UART_1
|
||||
#define MFG_BAUDRATE 921600
|
||||
//#define CLI_UART MICO_UART_1
|
||||
|
||||
/* Components connected to external I/Os*/
|
||||
#define Standby_SEL (MICO_GPIO_NONE)
|
||||
#define MICO_RF_LED (MICO_GPIO_NONE)
|
||||
|
||||
/* I/O connection <-> Peripheral Connections */
|
||||
#define MICO_I2C_CP (MICO_I2C_1)
|
||||
|
||||
#define USE_MICO_SPI_FLASH
|
||||
|
||||
#define MICO_FLASH_FOR_PARA MICO_FLASH_SPI
|
||||
#define PARA_START_ADDRESS (uint32_t)0x00000000
|
||||
#define PARA_END_ADDRESS (uint32_t)0x00000FFF
|
||||
#define PARA_FLASH_SIZE (PARA_END_ADDRESS - PARA_START_ADDRESS + 1) /* 4k bytes*/
|
||||
|
||||
#define BOOT_SEL MICO_GPIO_19
|
||||
#define MFG_SEL MICO_GPIO_20
|
||||
#define EasyLink_BUTTON MICO_GPIO_23
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /*extern "C" */
|
||||
#endif
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file platform.h
|
||||
* @author William Xu
|
||||
* @version V1.0.0
|
||||
* @date 05-May-2014
|
||||
* @brief This file provides all MICO Peripherals defined for current platform.
|
||||
******************************************************************************
|
||||
*
|
||||
* The MIT License
|
||||
* Copyright (c) 2014 MXCHIP Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
|
||||
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/******************************************************
|
||||
* Macros
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Constants
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Enumerations
|
||||
******************************************************/
|
||||
|
||||
|
||||
#define MICO_UNUSED 0xFF
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_SYS_LED,
|
||||
//MICO_RF_LED,
|
||||
|
||||
MICO_GPIO_1 ,
|
||||
MICO_GPIO_2,
|
||||
MICO_GPIO_3,
|
||||
MICO_GPIO_4,
|
||||
MICO_GPIO_5,
|
||||
MICO_GPIO_6,
|
||||
MICO_GPIO_7,
|
||||
MICO_GPIO_8,
|
||||
MICO_GPIO_9,
|
||||
MICO_GPIO_10,
|
||||
MICO_GPIO_11,
|
||||
MICO_GPIO_12,
|
||||
MICO_GPIO_13,
|
||||
MICO_GPIO_14,
|
||||
MICO_GPIO_15,
|
||||
MICO_GPIO_16,
|
||||
MICO_GPIO_17,
|
||||
MICO_GPIO_18,
|
||||
MICO_GPIO_19,
|
||||
MICO_GPIO_20,
|
||||
MICO_GPIO_21,
|
||||
MICO_GPIO_22,
|
||||
MICO_GPIO_23,
|
||||
MICO_GPIO_24,
|
||||
MICO_GPIO_25,
|
||||
|
||||
MICO_GPIO_MAX, /* Denotes the total number of GPIO port aliases. Not a valid GPIO alias */
|
||||
MICO_GPIO_NONE,
|
||||
} mico_gpio_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_SPI_1,
|
||||
MICO_SPI_MAX, /* Denotes the total number of SPI port aliases. Not a valid SPI alias */
|
||||
MICO_SPI_NONE,
|
||||
} mico_spi_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_I2C_1,
|
||||
MICO_I2C_MAX, /* Denotes the total number of I2C port aliases. Not a valid I2C alias */
|
||||
MICO_I2C_NONE,
|
||||
} mico_i2c_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_IIS_MAX, /* Denotes the total number of IIS port aliases. Not a valid IIS alias */
|
||||
MICO_IIS_NONE,
|
||||
} mico_iis_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_PWM_1,
|
||||
MICO_PWM_2,
|
||||
MICO_PWM_3,
|
||||
MICO_PWM_4,
|
||||
MICO_PWM_MAX, /* Denotes the total number of PWM port aliases. Not a valid PWM alias */
|
||||
MICO_PWM_NONE,
|
||||
} mico_pwm_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_ADC_1,
|
||||
MICO_ADC_2,
|
||||
MICO_ADC_3,
|
||||
MICO_ADC_MAX, /* Denotes the total number of ADC port aliases. Not a valid ADC alias */
|
||||
MICO_ADC_NONE,
|
||||
} mico_adc_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_UART_1,
|
||||
MICO_UART_MAX, /* Denotes the total number of UART port aliases. Not a valid UART alias */
|
||||
MICO_UART_NONE,
|
||||
} mico_uart_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_FLASH_EMBEDDED,
|
||||
MICO_FLASH_SPI,
|
||||
MICO_FLASH_MAX,
|
||||
MICO_FLASH_NONE,
|
||||
} mico_flash_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MICO_PARTITION_USER_MAX
|
||||
} mico_user_partition_t;
|
||||
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
#define STDIO_UART MICO_UART_1
|
||||
#define STDIO_UART_BAUDRATE (921600)
|
||||
#else
|
||||
#define STDIO_UART MICO_UART_NONE
|
||||
#define STDIO_UART_BAUDRATE (115200)
|
||||
#endif
|
||||
|
||||
#define UART_FOR_APP MICO_UART_1
|
||||
#define MFG_TEST MICO_UART_1
|
||||
#define MFG_BAUDRATE 921600
|
||||
//#define CLI_UART MICO_UART_1
|
||||
|
||||
/* Components connected to external I/Os*/
|
||||
#define Standby_SEL (MICO_GPIO_NONE)
|
||||
#define MICO_RF_LED (MICO_GPIO_NONE)
|
||||
|
||||
/* I/O connection <-> Peripheral Connections */
|
||||
#define MICO_I2C_CP (MICO_I2C_1)
|
||||
|
||||
#define USE_MICO_SPI_FLASH
|
||||
|
||||
#define MICO_FLASH_FOR_PARA MICO_FLASH_SPI
|
||||
#define PARA_START_ADDRESS (uint32_t)0x00000000
|
||||
#define PARA_END_ADDRESS (uint32_t)0x00000FFF
|
||||
#define PARA_FLASH_SIZE (PARA_END_ADDRESS - PARA_START_ADDRESS + 1) /* 4k bytes*/
|
||||
|
||||
#define BOOT_SEL MICO_GPIO_19
|
||||
#define MFG_SEL MICO_GPIO_20
|
||||
#define EasyLink_BUTTON MICO_GPIO_23
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /*extern "C" */
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1,129 +1,129 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file platform_config.h
|
||||
* @author William Xu
|
||||
* @version V1.0.0
|
||||
* @date 05-May-2014
|
||||
* @brief This file provides common configuration for current platform.
|
||||
******************************************************************************
|
||||
*
|
||||
* The MIT License
|
||||
* Copyright (c) 2014 MXCHIP Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
|
||||
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef __PLATFORM_COMMON_CONFIG_H__
|
||||
#define __PLATFORM_COMMON_CONFIG_H__
|
||||
#pragma once
|
||||
|
||||
/******************************************************
|
||||
* Macros
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Constants
|
||||
******************************************************/
|
||||
|
||||
#define HARDWARE_REVISION "3081B"
|
||||
#define DEFAULT_NAME "EMW3081B Module"
|
||||
#define MODEL "EMW3081B"
|
||||
|
||||
/*ChangeLog: 3.0.1: ymode receive, erase length is the real received file size.*/
|
||||
#define Bootloader_REVISION "v3.1.1" // 3081A 2 sections
|
||||
|
||||
/* MICO RTOS tick rate in Hz */
|
||||
#define MICO_DEFAULT_TICK_RATE_HZ (1000)
|
||||
/************************************************************************
|
||||
* Uncomment to disable watchdog. For debugging only */
|
||||
//#define MICO_DISABLE_WATCHDOG
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to disable standard IO, i.e. printf(), etc. */
|
||||
//#define MICO_DISABLE_STDIO
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to disable MCU powersave API functions */
|
||||
#ifdef BOOTLOADER
|
||||
#define MICO_DISABLE_MCU_POWERSAVE
|
||||
#endif
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable MCU real time clock */
|
||||
#define MICO_ENABLE_MCU_RTC
|
||||
|
||||
/************************************************************************
|
||||
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
|
||||
#define RestoreDefault_TimeOut (3000)
|
||||
|
||||
/************************************************************************
|
||||
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
|
||||
#define MCU_CLOCK_HZ (120000000)
|
||||
|
||||
/************************************************************************
|
||||
* How many bits are used in NVIC priority configuration */
|
||||
#define CORTEX_NVIC_PRIO_BITS (4)
|
||||
|
||||
/************************************************************************
|
||||
* Enable write protection to write-disabled embedded flash sectors */
|
||||
//#define MCU_EBANLE_FLASH_PROTECT
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable go to bootloader mode when stdio received many continuous spaces. */
|
||||
#define MICO_ENABLE_STDIO_TO_BOOT
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable MXCHIP MFG Test to output the CRC value of the firmware. */
|
||||
#define MFG_TEST_PRINT_CRC
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable Bootloader call user defined tick function. */
|
||||
#define BOOTLOADER_USER_TICK
|
||||
|
||||
/******************************************************
|
||||
* MCU Constants and Options
|
||||
*
|
||||
* NOTE: The clock configuration utility from ST is used to calculate these values
|
||||
* http://www.st.com/st-web-ui/static/active/en/st_prod_software_internet/resource/technical/software/utility/stsw-stm32090.zip
|
||||
******************************************************/
|
||||
|
||||
|
||||
//#define MICO_USE_BUILTIN_RF_DRIVER
|
||||
|
||||
|
||||
/******************************************************
|
||||
* Enumerations
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Type Definitions
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Structures
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Global Variables
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Function Declarations
|
||||
******************************************************/
|
||||
#endif
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file platform_config.h
|
||||
* @author William Xu
|
||||
* @version V1.0.0
|
||||
* @date 05-May-2014
|
||||
* @brief This file provides common configuration for current platform.
|
||||
******************************************************************************
|
||||
*
|
||||
* The MIT License
|
||||
* Copyright (c) 2014 MXCHIP Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is furnished
|
||||
* to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
|
||||
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef __PLATFORM_COMMON_CONFIG_H__
|
||||
#define __PLATFORM_COMMON_CONFIG_H__
|
||||
#pragma once
|
||||
|
||||
/******************************************************
|
||||
* Macros
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Constants
|
||||
******************************************************/
|
||||
|
||||
#define HARDWARE_REVISION "3081B"
|
||||
#define DEFAULT_NAME "EMW3081B Module"
|
||||
#define MODEL "EMW3081B"
|
||||
|
||||
/*ChangeLog: 3.0.1: ymode receive, erase length is the real received file size.*/
|
||||
#define Bootloader_REVISION "v3.1.1" // 3081A 2 sections
|
||||
|
||||
/* MICO RTOS tick rate in Hz */
|
||||
#define MICO_DEFAULT_TICK_RATE_HZ (1000)
|
||||
/************************************************************************
|
||||
* Uncomment to disable watchdog. For debugging only */
|
||||
//#define MICO_DISABLE_WATCHDOG
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to disable standard IO, i.e. printf(), etc. */
|
||||
//#define MICO_DISABLE_STDIO
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to disable MCU powersave API functions */
|
||||
#ifdef BOOTLOADER
|
||||
#define MICO_DISABLE_MCU_POWERSAVE
|
||||
#endif
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable MCU real time clock */
|
||||
#define MICO_ENABLE_MCU_RTC
|
||||
|
||||
/************************************************************************
|
||||
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
|
||||
#define RestoreDefault_TimeOut (3000)
|
||||
|
||||
/************************************************************************
|
||||
* Restore default and start easylink after press down EasyLink button for 3 seconds. */
|
||||
#define MCU_CLOCK_HZ (120000000)
|
||||
|
||||
/************************************************************************
|
||||
* How many bits are used in NVIC priority configuration */
|
||||
#define CORTEX_NVIC_PRIO_BITS (4)
|
||||
|
||||
/************************************************************************
|
||||
* Enable write protection to write-disabled embedded flash sectors */
|
||||
//#define MCU_EBANLE_FLASH_PROTECT
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable go to bootloader mode when stdio received many continuous spaces. */
|
||||
#define MICO_ENABLE_STDIO_TO_BOOT
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable MXCHIP MFG Test to output the CRC value of the firmware. */
|
||||
#define MFG_TEST_PRINT_CRC
|
||||
|
||||
/************************************************************************
|
||||
* Uncomment to enable Bootloader call user defined tick function. */
|
||||
#define BOOTLOADER_USER_TICK
|
||||
|
||||
/******************************************************
|
||||
* MCU Constants and Options
|
||||
*
|
||||
* NOTE: The clock configuration utility from ST is used to calculate these values
|
||||
* http://www.st.com/st-web-ui/static/active/en/st_prod_software_internet/resource/technical/software/utility/stsw-stm32090.zip
|
||||
******************************************************/
|
||||
|
||||
|
||||
//#define MICO_USE_BUILTIN_RF_DRIVER
|
||||
|
||||
|
||||
/******************************************************
|
||||
* Enumerations
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Type Definitions
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Structures
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Global Variables
|
||||
******************************************************/
|
||||
|
||||
/******************************************************
|
||||
* Function Declarations
|
||||
******************************************************/
|
||||
#endif
|
||||
|
||||
|
||||
Reference in New Issue
Block a user