mirror of
https://github.com/pengwon/epd42.git
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256 lines
8.9 KiB
ArmAsm
256 lines
8.9 KiB
ArmAsm
; Copyright (c) 2015, Nordic Semiconductor ASA
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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;
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; * Redistributions of source code must retain the above copyright notice, this
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; list of conditions and the following disclaimer.
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;
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; * Redistributions in binary form must reproduce the above copyright notice,
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; this list of conditions and the following disclaimer in the documentation
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; and/or other materials provided with the distribution.
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;
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; * Neither the name of Nordic Semiconductor ASA nor the names of its
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; contributors may be used to endorse or promote products derived from
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; this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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; NOTE: Template files (including this one) are application specific and therefore
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; expected to be copied into the application project folder prior to its use!
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; Description message
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IF :DEF: __STACK_SIZE
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Stack_Size EQU __STACK_SIZE
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ELSE
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Stack_Size EQU 4096
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ENDIF
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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IF :DEF: __HEAP_SIZE
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Heap_Size EQU __HEAP_SIZE
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ELSE
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Heap_Size EQU 4096
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ENDIF
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler
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DCD NMI_Handler
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DCD HardFault_Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler
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DCD SysTick_Handler
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; External Interrupts
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DCD POWER_CLOCK_IRQHandler
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DCD RADIO_IRQHandler
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DCD UART0_IRQHandler
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DCD SPI0_TWI0_IRQHandler
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DCD SPI1_TWI1_IRQHandler
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DCD 0 ; Reserved
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DCD GPIOTE_IRQHandler
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DCD ADC_IRQHandler
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DCD TIMER0_IRQHandler
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DCD TIMER1_IRQHandler
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DCD TIMER2_IRQHandler
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DCD RTC0_IRQHandler
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DCD TEMP_IRQHandler
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DCD RNG_IRQHandler
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DCD ECB_IRQHandler
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DCD CCM_AAR_IRQHandler
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DCD WDT_IRQHandler
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DCD RTC1_IRQHandler
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DCD QDEC_IRQHandler
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DCD LPCOMP_IRQHandler
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DCD SWI0_IRQHandler
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DCD SWI1_IRQHandler
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DCD SWI2_IRQHandler
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DCD SWI3_IRQHandler
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DCD SWI4_IRQHandler
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DCD SWI5_IRQHandler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
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NRF_POWER_RAMONB_ADDRESS EQU 0x40000554 ; NRF_POWER->RAMONB address
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NRF_POWER_RAMONx_RAMxON_ONMODE_Msk EQU 0x3 ; All RAM blocks on in onmode bit mask
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
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LDR R0, =NRF_POWER_RAMON_ADDRESS
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LDR R2, [R0]
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ORRS R2, R2, R1
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STR R2, [R0]
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LDR R0, =NRF_POWER_RAMONB_ADDRESS
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LDR R2, [R0]
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ORRS R2, R2, R1
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STR R2, [R0]
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT POWER_CLOCK_IRQHandler [WEAK]
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EXPORT RADIO_IRQHandler [WEAK]
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EXPORT UART0_IRQHandler [WEAK]
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EXPORT SPI0_TWI0_IRQHandler [WEAK]
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EXPORT SPI1_TWI1_IRQHandler [WEAK]
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EXPORT GPIOTE_IRQHandler [WEAK]
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EXPORT ADC_IRQHandler [WEAK]
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EXPORT TIMER0_IRQHandler [WEAK]
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EXPORT TIMER1_IRQHandler [WEAK]
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EXPORT TIMER2_IRQHandler [WEAK]
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EXPORT RTC0_IRQHandler [WEAK]
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EXPORT TEMP_IRQHandler [WEAK]
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EXPORT RNG_IRQHandler [WEAK]
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EXPORT ECB_IRQHandler [WEAK]
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EXPORT CCM_AAR_IRQHandler [WEAK]
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EXPORT WDT_IRQHandler [WEAK]
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EXPORT RTC1_IRQHandler [WEAK]
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EXPORT QDEC_IRQHandler [WEAK]
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EXPORT LPCOMP_IRQHandler [WEAK]
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EXPORT SWI0_IRQHandler [WEAK]
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EXPORT SWI1_IRQHandler [WEAK]
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EXPORT SWI2_IRQHandler [WEAK]
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EXPORT SWI3_IRQHandler [WEAK]
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EXPORT SWI4_IRQHandler [WEAK]
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EXPORT SWI5_IRQHandler [WEAK]
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POWER_CLOCK_IRQHandler
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RADIO_IRQHandler
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UART0_IRQHandler
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SPI0_TWI0_IRQHandler
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SPI1_TWI1_IRQHandler
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GPIOTE_IRQHandler
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ADC_IRQHandler
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TIMER0_IRQHandler
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TIMER1_IRQHandler
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TIMER2_IRQHandler
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RTC0_IRQHandler
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TEMP_IRQHandler
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RNG_IRQHandler
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ECB_IRQHandler
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CCM_AAR_IRQHandler
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WDT_IRQHandler
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RTC1_IRQHandler
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QDEC_IRQHandler
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LPCOMP_IRQHandler
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SWI0_IRQHandler
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SWI1_IRQHandler
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SWI2_IRQHandler
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SWI3_IRQHandler
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SWI4_IRQHandler
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SWI5_IRQHandler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, = (Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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