diff --git a/Keil_5/ble_app_peripheral.uvoptx b/Keil_5/ble_app_peripheral.uvoptx
index 0579de1..c162e6a 100644
--- a/Keil_5/ble_app_peripheral.uvoptx
+++ b/Keil_5/ble_app_peripheral.uvoptx
@@ -120,7 +120,7 @@
0
DLGUARM
- d
+
0
@@ -149,6 +149,14 @@
+
+
+ 1
+ 0
+ 0x07f8ff00
+ 0
+
+
0
diff --git a/pinout_0.xlsx b/pinout_0.xlsx
new file mode 100644
index 0000000..40bdaf1
Binary files /dev/null and b/pinout_0.xlsx differ
diff --git a/pinout_1.xlsx b/pinout_1.xlsx
new file mode 100644
index 0000000..bbd2b19
Binary files /dev/null and b/pinout_1.xlsx differ
diff --git a/src/epd/epd.h b/src/epd/epd.h
index c3ac9cb..092af19 100644
--- a/src/epd/epd.h
+++ b/src/epd/epd.h
@@ -17,11 +17,12 @@ int gpio_get(int index);
// spi flash
-int fspi_init(u32 gpio_word);
-int epcs_readid(void);
-int epcs_sector_erase(int addr);
-int epcs_page_write(int addr, u8 *buf, int size);
-int epcs_read(int addr, int len, u8 *buf);
+int fspi_config(u32 gpio_word);
+int fspi_init(void);
+int sf_readid(void);
+int sf_sector_erase(int addr);
+int sf_page_write(int addr, u8 *buf, int size);
+int sf_read(int addr, int len, u8 *buf);
// epd_hw
void epd_hw_init(u32 config0, u32 config1);
diff --git a/src/epd/spi_flash.c b/src/epd/spi_flash.c
index 3e87e50..f14edfe 100644
--- a/src/epd/spi_flash.c
+++ b/src/epd/spi_flash.c
@@ -3,230 +3,222 @@
+#define SPI_CTRL0 *(volatile unsigned short*)(0x50001200)
+#define SPI_RXTX0 *(volatile unsigned short*)(0x50001202)
+#define SPI_RXTX1 *(volatile unsigned short*)(0x50001204)
+#define SPI_IACK *(volatile unsigned short*)(0x50001206)
+#define SPI_CTRL1 *(volatile unsigned short*)(0x50001208)
+
static int spio_clk;
static int spio_cs;
static int spio_di;
static int spio_do;
+#define BIT_8 0
+#define BIT_16 1
+#define BIT_32 2
+
+static int spi_bitmode;
+
/******************************************************************************/
-#define FSPI_DELAY 10
+#define FSPI_CS(n) gpio_set(spio_cs, (n));
-void fspi_delay(void)
+void fspi_set_bitmode(int mode)
{
- int i;
+ spi_bitmode = mode;
- for(i=0; i>16;
}
+ SPI_RXTX0 = data;
+ while((SPI_CTRL0&0x2000)==0);
+ SPI_IACK = 0;
+
+ data = SPI_RXTX0;
+ if(spi_bitmode==BIT_8){
+ data &= 0xff;
+ }else if(spi_bitmode==BIT_32){
+ data |= (SPI_RXTX1)<<16;
+ }
return data;
}
-int fspi_init(u32 gpio_word)
+int fspi_config(u32 gpio_word)
{
spio_clk = (gpio_word>>24)&0xff;
spio_cs = (gpio_word>>16)&0xff;
- spio_di = (gpio_word>> 8)&0xff;
- spio_do = (gpio_word>> 0)&0xff;
+ spio_do = (gpio_word>> 8)&0xff;
+ spio_di = (gpio_word>> 0)&0xff;
+
+ return 0;
+}
+
+
+int fspi_init(void)
+{
+ SetBits16(CLK_PER_REG, SPI_ENABLE, 1);
- gpio_config(spio_clk, 0x0300, 0);
gpio_config(spio_cs, 0x0300, 1);
- gpio_config(spio_di, 0x0300, 1);
- gpio_config(spio_do, 0x0100, 1);
-
+ gpio_config(spio_clk, 0x0307, 0);
+ gpio_config(spio_do, 0x0306, 1);
+ gpio_config(spio_di, 0x0105, 1);
+
+ SPI_CTRL0 = 0x0010;
+ fspi_set_bitmode(BIT_32);
+
FSPI_CS(0);
- fspi_delay();
- fspi_trans(0xab);
+ fspi_trans(0xab000000);
FSPI_CS(1);
return 0;
}
+int fspi_exit(void)
+{
+ SPI_CTRL0 = 0;
+ SetBits16(CLK_PER_REG, SPI_ENABLE, 0);
+
+ gpio_config(spio_cs, 0x0300, 1);
+ gpio_config(spio_clk, 0x0300, 0);
+ gpio_config(spio_do, 0x0300, 0);
+ gpio_config(spio_di, 0x0100, 0);
+ return 0;
+}
+
+
/******************************************************************************/
/* SPI flash */
/******************************************************************************/
-int epcs_readid(void)
+int sf_readid(void)
{
- int mid, pid;
-
+ fspi_set_bitmode(BIT_32);
FSPI_CS(0);
- fspi_delay();
-
- fspi_trans(0x90);
- fspi_trans(0);
- fspi_trans(0);
- fspi_trans(0);
-
- mid = fspi_trans(0);
- pid = fspi_trans(0);
-
+ fspi_trans(0x90000000);
+ int id = fspi_trans(0);
FSPI_CS(1);
- fspi_delay();
- return (mid<<8)|pid;
+ return id;
}
-int epcs_status(void)
+int sf_status(void)
{
int status;
+ fspi_set_bitmode(BIT_16);
FSPI_CS(0);
- fspi_delay();
- fspi_trans(0x05);
- status = fspi_trans(0);
+ status = fspi_trans(0x0500);
FSPI_CS(1);
- fspi_delay();
return status;
}
-int epcs_wstat(int stat)
+int sf_wstat(int stat)
{
+
// status write enable
+ fspi_set_bitmode(BIT_8);
FSPI_CS(0);
- fspi_delay();
fspi_trans(0x50);
FSPI_CS(1);
- fspi_delay();
+ fspi_set_bitmode(BIT_16);
FSPI_CS(0);
- fspi_delay();
- fspi_trans(0x01);
- fspi_trans(stat);
+ fspi_trans(0x0100|stat);
FSPI_CS(1);
- fspi_delay();
return 0;
}
-int epcs_wen(int en)
+int sf_wen(int en)
{
+ fspi_set_bitmode(BIT_8);
FSPI_CS(0);
- fspi_delay();
if(en)
fspi_trans(0x06);
else
fspi_trans(0x04);
FSPI_CS(1);
- fspi_delay();
return 0;
}
-int epcs_wait()
+int sf_wait()
{
int status;
while(1){
- status = epcs_status();
+ status = sf_status();
if((status&1)==0)
break;
- fspi_delay();
}
return 0;
}
-int epcs_sector_erase(int addr)
+int sf_sector_erase(int addr)
{
- epcs_wen(1);
+ sf_wen(1);
+ fspi_set_bitmode(BIT_32);
FSPI_CS(0);
- fspi_delay();
-
- fspi_trans(0x20);
- fspi_trans((addr>>16)&0xff);
- fspi_trans((addr>> 8)&0xff);
- fspi_trans((addr>> 0)&0xff);
-
+ fspi_trans(0x20000000|addr);
FSPI_CS(1);
- fspi_delay();
- epcs_wait();
+ sf_wait();
return 0;
}
-int epcs_page_write(int addr, u8 *buf, int size)
+int sf_page_write(int addr, u8 *buf, int size)
{
int i;
- epcs_wen(1);
+ sf_wen(1);
+ fspi_set_bitmode(BIT_32);
FSPI_CS(0);
- fspi_delay();
- fspi_trans(0x02);
- fspi_trans((addr>>16)&0xff);
- fspi_trans((addr>> 8)&0xff);
- fspi_trans((addr>> 0)&0xff);
-
- for(i=0; i>16)&0xff);
- fspi_trans((addr>> 8)&0xff);
- fspi_trans((addr>> 0)&0xff);
+ fspi_trans(0x03000000|addr);
- fspi_trans(0);
-
- for(i=0; i