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https://github.com/jam422470459/EPD-nRF52-hema213.git
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move components to SDK dir
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209
SDK/12.3.0_d7731ad/components/toolchain/system_nrf52840.c
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209
SDK/12.3.0_d7731ad/components/toolchain/system_nrf52840.c
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/* Copyright (c) 2012 ARM LIMITED
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* * Neither the name of ARM nor the names of its contributors may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include "nrf.h"
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#include "system_nrf52840.h"
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/*lint ++flb "Enter library region" */
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#define __SYSTEM_CLOCK_64M (64000000UL)
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static bool errata_36(void);
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static bool errata_98(void);
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static bool errata_103(void);
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static bool errata_115(void);
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static bool errata_120(void);
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#if defined ( __CC_ARM )
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uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
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#elif defined ( __ICCARM__ )
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__root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
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#elif defined ( __GNUC__ )
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uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
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#endif
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void SystemCoreClockUpdate(void)
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{
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SystemCoreClock = __SYSTEM_CLOCK_64M;
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}
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void SystemInit(void)
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{
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/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_36()){
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NRF_CLOCK->EVENTS_DONE = 0;
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NRF_CLOCK->EVENTS_CTTO = 0;
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NRF_CLOCK->CTIV = 0;
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}
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/* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_98()){
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*(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
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}
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/* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_103()){
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NRF_CCM->MAXPACKETSIZE = 0xFBul;
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}
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/* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_115()){
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*(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
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}
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/* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_120()){
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*(volatile uint32_t *)0x40029640ul = 0x200ul;
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}
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/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
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* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
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* operations are not used in your code. */
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#if (__FPU_USED == 1)
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SCB->CPACR |= (3UL << 20) | (3UL << 22);
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__DSB();
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__ISB();
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#endif
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/* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
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two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
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normal GPIOs. */
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#if defined (CONFIG_NFCT_PINS_AS_GPIOS)
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if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NVIC_SystemReset();
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}
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#endif
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/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
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defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
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reserved for PinReset and not available as normal GPIO. */
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#if defined (CONFIG_GPIO_AS_PINRESET)
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if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
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((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_UICR->PSELRESET[0] = 18;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_UICR->PSELRESET[1] = 18;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NVIC_SystemReset();
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}
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#endif
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/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
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Specification to see which one). */
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#if defined (ENABLE_SWO)
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
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NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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#endif
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/* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
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Specification to see which ones). */
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#if defined (ENABLE_TRACE)
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
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NRF_P0->PIN_CNF[7] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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NRF_P1->PIN_CNF[9] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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#endif
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SystemCoreClockUpdate();
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}
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static bool errata_36(void)
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{
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if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
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return true;
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}
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return false;
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}
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static bool errata_98(void)
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{
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if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
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return true;
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}
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return false;
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}
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static bool errata_103(void)
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{
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if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
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return true;
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}
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return false;
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}
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static bool errata_115(void)
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{
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if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
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return true;
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}
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return false;
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}
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static bool errata_120(void)
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{
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if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
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return true;
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}
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return false;
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}
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/*lint --flb "Leave library region" */
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