mirror of
https://github.com/tsl0922/EPD-nRF5.git
synced 2025-12-06 15:42:48 +08:00
cleanup driver init code
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@@ -82,16 +82,6 @@ void SSD1619_Init()
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EPD_WriteCommand(CMD_SW_RESET);
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SSD1619_WaitBusy(200);
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EPD_WriteCommand(CMD_ANALOG_BLOCK_CTRL);
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EPD_WriteByte(0x54);
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EPD_WriteCommand(CMD_DIGITAL_BLOCK_CTRL);
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EPD_WriteByte(0x3B);
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EPD_WriteCommand(CMD_DRIVER_CTRL);
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EPD_WriteByte((EPD->height - 1) % 256);
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EPD_WriteByte((EPD->height - 1) / 256);
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EPD_WriteByte(0x00);
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EPD_WriteCommand(CMD_BORDER_CTRL);
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EPD_WriteByte(0x01);
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EPD_WriteCommand(CMD_TSENSOR_CTRL);
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@@ -105,8 +95,8 @@ static void SSD1619_Refresh(void)
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epd_model_t *EPD = epd_get();
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EPD_WriteCommand(CMD_DISP_CTRL1);
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EPD_WriteByte(0x80); // Inverse RED RAM
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EPD_WriteByte(0x00); // Single chip application
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EPD_WriteByte(EPD->bwr ? 0x80 : 0x40);
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EPD_WriteByte(0x00);
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NRF_LOG_DEBUG("[EPD]: refresh begin\n");
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NRF_LOG_DEBUG("[EPD]: temperature: %d\n", SSD1619_Read_Temp());
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28
EPD/UC8176.c
28
EPD/UC8176.c
@@ -46,16 +46,6 @@
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#define CMD_CCSET 0xE0 // Cascade Setting
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#define CMD_TSSET 0xE5 // Force Temperauture
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// PSR registers
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#define PSR_RES1 BIT(7)
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#define PSR_RES0 BIT(6)
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#define PSR_REG BIT(5)
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#define PSR_BWR BIT(4)
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#define PSR_UD BIT(3)
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#define PSR_SHL BIT(2)
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#define PSR_SHD BIT(1)
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#define PSR_RST BIT(0)
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static void UC8176_WaitBusy(uint16_t timeout)
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{
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EPD_WaitBusy(LOW, timeout);
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@@ -104,24 +94,12 @@ void UC8176_Refresh(void)
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void UC8176_Init()
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{
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epd_model_t *EPD = epd_get();
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EPD_Reset(HIGH, 10);
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epd_model_t *EPD = epd_get();
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uint8_t psr = PSR_UD | PSR_SHL | PSR_SHD | PSR_RST;
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if (!EPD->bwr) psr |= PSR_BWR;
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if (EPD->width == 320 && EPD->height == 300) {
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psr |= PSR_RES0;
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} else if (EPD->width == 320 && EPD->height == 240) {
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psr |= PSR_RES1;
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} else if (EPD->width == 200 && EPD->height == 300) {
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psr |= PSR_RES1 | PSR_RES0;
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} else {
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// default to 400x300
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}
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NRF_LOG_DEBUG("[EPD]: PSR=%02x\n", psr);
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EPD_WriteCommand(CMD_PSR);
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EPD_WriteByte(psr);
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EPD_WriteByte(EPD->bwr ? 0x0F : 0x1F);
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EPD_WriteCommand(CMD_CDI);
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EPD_WriteByte(EPD->bwr ? 0x77 : 0x97);
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